Discussed the memory hierarchy, the characteristics of memory like location, unit of data transfer, access method, and performance. Then demonstrate the design of both RAM and ROM chip. Shows how to configure the memory unit composed of both RAM and ROM using multiple RAM and ROM chips i n hardware. Finally, demonstrate the design of the magnetic disks

1. Memory Organization
Dr. Prasenjit Dey

2. Contents
• Characteristics of Memory
• Memory Hierarchy
• Physical types of memory
• Description of a RAM and ROM chip
• Hardware implementation of Memory unit from multiple RAM & ROM chips
• Design of a Magnetic Disks/Magnetic Tape
Dr.PrasenjitDey

3. Characteristics
• Location
• CPU (cache)
• Internal (main memory)
• External (auxiliary memory)
• Data transfer unit
• Main memory - > words (4bytes in general)
• Secondary memory -> blocks
• Access method
• Associative: Accessed data only by checking the content of a portion of word, access time is independent of location of data, e.g.,
cache memory (001 10001)
• Random: Accessed data by exact memory location, access time is independent of location of data, e.g., RAM
• Direct: Accessed block wise by first getting the block number and then performing a sequential search, e.g., Magnetic Disks
• Sequential: Start at the beginning and read through in order, access time is dependent on location of data, e.g., Magnetic Tape
• Performance
• Access time: The time required to reach into the location of the data after getting the address location from CPU
• Memory Cycle time: It is the combination of data access time and data retrieval time (access time + retrieval time)
• Transfer Rate: the rate at which data is transferred
Dr.PrasenjitDey

4. Types of Memory
CPU: performs all arithmetic & logical operations within the computer with the help of control
unit
Main Memory: memory unit that communicates directly with the CPU
Auxiliary Memory : memory unit that communicates indirectly with the CPU via main memory
Cache Memory: Stays in-between CPU and main memory, faster than main memory
Memory organization is the study of development of a memory management system in which
memory units are organized in such a manner that it improves the overall data access time with
less cost
Dr.PrasenjitDey
Secondary
memory
Magnetic
Disks
Magnetic
Disks
Main
Memory
CPU/Processor
Arithmetic
and
Logic unit
Control
Unit Cache
Memory

5. Memory Hierarchy
Dr.PrasenjitDey
Magnetic Tape
Optical Disks
Magnetic Disks
Main Memory
L3 Cache
L2 Cache
L1 Cache
Registers
Cost
Speed
Slow
Fast
Low
High
Capacity

6. Physical type of Memory
• Semiconductor (inboard memory)
• RAM (Random Access Memory)
• SRAM (Static RAM)
• DRAM (Dynamic RAM)
• ROM (Read Only Memory)
• PROM (Programmable ROM)
• EPROM (Erasable Programmable ROM)
• EEPROM (Electrically Erasable Programmable ROM)
• Magnetic
• Disks
• Tapes
• Optical
• CD
• DVD
Dr.PrasenjitDey

7. RAM
Static RAM
1. Flip-flops made of transistors store
bits
2. No discharging, so no refreshing
3. Complex construction and more costly
4. Per bit are more
5. Fast as no refreshing is required
6. Cache
Dynamic RAM
1. semiconductor capacitors store bits
while charging
2. Capacitors discharges, need to charge
periodically
3. Simple construction and Less costly
4. Per bit are less
5. Slow due to periodic refreshing
6. Main memory
Dr.PrasenjitDey

8. ROM
• Read only, written once by the manufacturer (expensive)
• Non volatile
• Micro-programmed
• Contains Bootstrap loader program
• The program which is responsible for loading the operating system into the main memory and boot the system
• Contain subroutine Libraries
Dr.PrasenjitDey
Types
EPROM
(Erasable Programmable ROM)
Erased by UV
EEPROM
(Electrically Erasable Programmable ROM)PROM
(Programmable ROM)

9. Cache
• Sits between main memory and CPU
• Fast
• Capacity small
• Made of SRAM
• May present in CPU chip, e.g., L1, L2 cache or module L3 cache
• Most frequently used item of main memory stored in cache memory for faster access by CPU
• CPU first checks cache memory for the data content
• If present (Cache hit) collect the data from cache memory (faster access time)
• If not available in cache (Cache miss), then collects the data from main memory (slower access time) and copy
the data into cache for future references
Dr.PrasenjitDey
CPU Cache
(SRAM)
Main Memory
(DRAM)

10. Description of a RAM and ROM chip
Let us consider a RAM chip of size: 128 X 8
• Number of data contents: 128 = 27
• Address bus size = 7 bits
• address lines =7
• Each data content of size: 8
• Data bus size = 8 bit
• data lines = 8
• Let us consider a ROM chip of size: 512 X 8
Number of data contents: 512 = 29
• Address bus size = 9 bits
• address lines =9
• Each data content of size: 8
• Data bus size = 8 bit
• data lines = 8
Dr.PrasenjitDey
128x8
RAM
CS1
CS2
RD
WR
AD7
Chip select 1
Chip select 2
Read
Write
7-bit address bus
CS1 CS2 RD WR Function State of data bus
0 0 X X NA High-impedance
0 1 X X NA High-impedance
1 1 X X NA High-impedance
1 0 0 0 NA High-impedance
1 0 1 0 Read Data loaded into RAM from data bus
1 0 0 1 Write Data loaded into data bus from RAM
Data
bus
512x8
ROM
CS1
CS2
AD9
Chip select 1
Chip select 2
9-bit address bus
Data
bus

11. Hardware implementation of Memory unit
Dr.PrasenjitDey
128x8
RAM
CS1
CS2
RD
WR
AD7
Data
512x8
ROM
CS1
CS2
AD7
AD(8)
AD(9)
Data
128x8
RAM
CS1
CS2
RD
WR
AD7
Data
128x8
RAM
CS1
CS2
RD
WR
AD7
Data
128x8
RAM
CS1
CS2
RD
WR
AD7
Data
Data bus
Control circuit
RD WR7-19 81016-11
Decoder
Let us configure a memory units of 512 bytes of
RAM and 512bytes of ROM
• 4 x 128 bytes RAM
• 1 x 512 byte ROM
1. 7 address buses are needed to select a
memory address from a 128byte RAM
• Refer AD[7-1] to select a memory location in a
RAM chip
2. 2 address buses are needed to select any 1
of the RAM chip from 4 RAM chips
• Refer AD[9-8] to select a RAM chip
• Use a 2 x 4 Decoder,
• AD[9 8] = (00) --> RAM chip 1
• AD[9 8] = (01) --> RAM chip 2
• AD[9 8] = (10) --> RAM chip 3
• AD[9 8] = (11) --> RAM chip 4
3. Use AD[10] to Select either RAM or ROM
• If AD[10] = = 0, enable RAM
• If AD[10] = = 1, enable ROM
4. 9 address buses are needed to select a
memory address from a 512byte ROM
• Refer AD[9-1] to select a memory location in a
ROM chip
unused
8 bits

12. Auxiliary Memory: Magnetic Disks
Dr.PrasenjitDey
• Magnetic disks looks like a cylinder consists
read/write heads and platters
• Cylinder is a cylindrical intersection through the
stack of platters in a disk, centered around the
disk's spindle
• Platter consists of tracks and sectors
• Tracks: a circular strip of physical data blocks called
track
• Sectors: An angular component, slice of a track
• selects which data block in the track is to be addressed
• Addressing method
• Cylinder-head-sector (CHS)