Phase locked loop is a technique usually used to perform indirect digital frequency synthesizer for
most RF transceivers. A fractional-N phase locked loop frequency synthesizer has been used in recent years
since it achieves fine resolution and large loop bandwidth . This paper presents the design and simulation of a
fractional-N phase locked loop frequency synthesizer using sigma-delta modulation for bluetooth standard
systems with a frequency range from 2402 to 2480MHz. Loop filter and Sigma-Delta modulator are the most
important factors in improving the performance of fractional-N phase locked loop. The digital Sigma-Delta
modulator provides a useful noise shaping for the phase noise introduced by the fractional division operation,
while the loop filter bandwidth limits the speed of switching time between the synthesized frequencies. A forth
order passive loop filter was implemented at bandwidth equal to 200 KHz, 50° phase margin, and a second
order single loop modulator with 4-level quantizer was used to control the frequency divider. Simulation results
showed that the system is stable, and there is no fractional spurs in the output spectrum of the fractional-N
phase locked loop.
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 16-21)Adnan Zafar
Lecture No 16: https://youtu.be/22XDP-_UKbg
Lecture No 17: https://youtu.be/CikQYWnvKdU
Lecture No 18: https://youtu.be/eT9sDYN4U30
Lecture No 19: https://youtu.be/7-jw3w9snik
Lecture No 20: https://youtu.be/kLmVgGSmfLE
Lecture No 21: https://youtu.be/Mm445diiQpM
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 22-30)Adnan Zafar
Lecture No 22: https://youtu.be/z3gia8eHEOo
Lecture No 23: https://youtu.be/tFZuaZ4i89I
Lecture No 24: https://youtu.be/BIcjuUxb6aE
Lecture No 25: https://youtu.be/ZPvO4CubmME
Lecture No 26: https://youtu.be/CxUWW4Uh5Gk
Lecture No 27: https://youtu.be/OZ2TwSXkeVw
Lecture No 28: https://youtu.be/HGYXtSvisRY
Lecture No 29: https://youtu.be/W1ehHa0AUnk
Lecture No 30: https://youtu.be/q5gh3tQ7aLk
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 10-15)Adnan Zafar
Lecture No 10: https://youtu.be/LIh9yo4rphU
Lecture No 11: https://youtu.be/rOpNHZiRxgg
Lecture No 12: https://youtu.be/sytUNcVKokY
Lecture No 13: https://youtu.be/YN0eAGYNWK4
Lecture No 14: https://youtu.be/OvCjohzmsPU
Lecture No 15: https://youtu.be/TBPeBhRoD90
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 31-39)Adnan Zafar
The document discusses sampling and analog-to-digital conversion. It explains the sampling theorem, which states that a signal can be reconstructed perfectly from samples taken at a minimum rate of twice the signal's bandwidth. It describes how sampling a signal results in multiplying it by an impulse train. It also discusses practical considerations in signal reconstruction using non-ideal interpolation filters and equalizers. Realizing reconstruction filters in hardware is challenging due to the non-realizability of ideal filters. Aliasing can also occur if the signal is not perfectly band-limited and the sampling rate is below the Nyquist rate.
Delta modulation is a technique to convert analog to digital and vice versa. It works by sending only the change in amplitude of the analog signal in 1 bit. The analog signal is approximated by a series of segments and each segment is compared to the original to determine amplitude change. Only the change information is transmitted. Matlab code was used to demonstrate delta modulation of a 50Hz wave with 2000Hz sampling. The input signal was encoded, transmitted as 1 bit, and then decoded and filtered with a low pass filter. Practical observations showed the effect of different sampling frequencies on the output waveforms. Though modulation and demodulation is simple, delta modulation introduces noise which makes it less desirable for voice transmission.
This document discusses and compares filter banks and Mel-Frequency Cepstral Coefficients (MFCCs) for speech processing in machine learning applications. It explains that both methods involve framing a speech signal, applying a Fourier transform to obtain the power spectrum, and then extracting features using filters. For MFCCs, the filters are applied on a Mel scale and then a discrete cosine transform is used to decorrelate the coefficients. While MFCCs were popular for older models, filter banks are becoming more common for deep learning as the models can handle correlated inputs better. In the end, filter banks are recommended if the model isn't sensitive to correlation, while MFCCs remain useful if the model is sensitive to correlated
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 16-21)Adnan Zafar
Lecture No 16: https://youtu.be/22XDP-_UKbg
Lecture No 17: https://youtu.be/CikQYWnvKdU
Lecture No 18: https://youtu.be/eT9sDYN4U30
Lecture No 19: https://youtu.be/7-jw3w9snik
Lecture No 20: https://youtu.be/kLmVgGSmfLE
Lecture No 21: https://youtu.be/Mm445diiQpM
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 22-30)Adnan Zafar
Lecture No 22: https://youtu.be/z3gia8eHEOo
Lecture No 23: https://youtu.be/tFZuaZ4i89I
Lecture No 24: https://youtu.be/BIcjuUxb6aE
Lecture No 25: https://youtu.be/ZPvO4CubmME
Lecture No 26: https://youtu.be/CxUWW4Uh5Gk
Lecture No 27: https://youtu.be/OZ2TwSXkeVw
Lecture No 28: https://youtu.be/HGYXtSvisRY
Lecture No 29: https://youtu.be/W1ehHa0AUnk
Lecture No 30: https://youtu.be/q5gh3tQ7aLk
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 10-15)Adnan Zafar
Lecture No 10: https://youtu.be/LIh9yo4rphU
Lecture No 11: https://youtu.be/rOpNHZiRxgg
Lecture No 12: https://youtu.be/sytUNcVKokY
Lecture No 13: https://youtu.be/YN0eAGYNWK4
Lecture No 14: https://youtu.be/OvCjohzmsPU
Lecture No 15: https://youtu.be/TBPeBhRoD90
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 31-39)Adnan Zafar
The document discusses sampling and analog-to-digital conversion. It explains the sampling theorem, which states that a signal can be reconstructed perfectly from samples taken at a minimum rate of twice the signal's bandwidth. It describes how sampling a signal results in multiplying it by an impulse train. It also discusses practical considerations in signal reconstruction using non-ideal interpolation filters and equalizers. Realizing reconstruction filters in hardware is challenging due to the non-realizability of ideal filters. Aliasing can also occur if the signal is not perfectly band-limited and the sampling rate is below the Nyquist rate.
Delta modulation is a technique to convert analog to digital and vice versa. It works by sending only the change in amplitude of the analog signal in 1 bit. The analog signal is approximated by a series of segments and each segment is compared to the original to determine amplitude change. Only the change information is transmitted. Matlab code was used to demonstrate delta modulation of a 50Hz wave with 2000Hz sampling. The input signal was encoded, transmitted as 1 bit, and then decoded and filtered with a low pass filter. Practical observations showed the effect of different sampling frequencies on the output waveforms. Though modulation and demodulation is simple, delta modulation introduces noise which makes it less desirable for voice transmission.
This document discusses and compares filter banks and Mel-Frequency Cepstral Coefficients (MFCCs) for speech processing in machine learning applications. It explains that both methods involve framing a speech signal, applying a Fourier transform to obtain the power spectrum, and then extracting features using filters. For MFCCs, the filters are applied on a Mel scale and then a discrete cosine transform is used to decorrelate the coefficients. While MFCCs were popular for older models, filter banks are becoming more common for deep learning as the models can handle correlated inputs better. In the end, filter banks are recommended if the model isn't sensitive to correlation, while MFCCs remain useful if the model is sensitive to correlated
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 4-9)Adnan Zafar
Lecture No 4: https://youtu.be/E3QT55J9uWs
Lecture No 5: https://youtu.be/pb7GdbcLnI0
Lecture No 6: https://youtu.be/aFXr1ufTF7Q
Lecture No 7: https://youtu.be/1Yt6ZCKhcYg
Lecture No 8: https://youtu.be/I8UWw3DC19Y
Lecture No 9: https://youtu.be/zRKFi3dotEc
This document discusses carrier synchronization techniques in digital communication systems. It begins with an introduction to the need for carrier recovery and symbol synchronization at the receiver. It then covers maximum likelihood estimation of signal parameters including carrier phase. Next, it describes carrier phase estimation using a phase-locked loop and decision-directed loops. It explains how the phase-locked loop works to continuously track and update the carrier phase estimate. Finally, it provides an example of decision-directed carrier phase estimation for a double-sideband suppressed carrier pulse amplitude modulation signal.
IRJET- MASH 1-2 Delta Sigma Modulator with Quantizer for Fractional-N Frequen...IRJET Journal
This document describes a fractional-N frequency synthesizer modeled using a proposed MASH 1-2 delta sigma modulator with a quantizer. The modulator is used to control a multi-modulus frequency divider in the synthesizer in order to analyze spur and phase noise. Simulation results show that with a reference frequency of 20MHz, divider modulus of 10 and a fractional constant of 0.5, the synthesizer achieves a frequency range of 200MHz to 220MHz with 2MHz resolution. The proposed MASH 1-2 modulator achieves a phase noise of -44dBc/Hz at 220MHz, which is an improvement over conventional higher order delta sigma modulators.
This presentation include the basic concept of communication, modulation techniques in analog and digital. ADC (Analog to Digital Conversion) and Demodulation schemes
1) The document discusses digital transmission of analog signals using techniques like Pulse Code Modulation (PCM), Differential Pulse Code Modulation (DPCM), and Delta Modulation (DM).
2) PCM involves sampling the analog signal, quantizing the sample amplitudes, and encoding the quantized values into binary codewords.
3) Nyquist sampling theorem states that if a signal is bandlimited to W Hz, it can be reconstructed perfectly from samples taken at a rate of at least 2W samples/second.
Introduction to modulation and demodulationMahmut Yildiz
The document provides an overview of communication systems and modulation techniques. It begins with an introduction to communication systems and discusses analogue modulation techniques including AM, FM, and PAM. It then covers sampling systems, principles of noise, pulse code modulation, and digital communication techniques like ASK, FSK, and PSK. The document recommends some reference textbooks and further discusses modulation and demodulation, summarizing various modulation types and techniques.
Intersymbol interference caused by multipath in band limited frequency selective time dispersive channels distorts the transmitted signal, causing bit error at receiver. ISI is the major obstacle to high speed data transmission over wireless channels. Channel estimation is a technique used to combat the intersymbol interference. The objective of this paper is to improve channel estimation accuracy in MIMO-OFDM system by using modified variable step size leaky Least Mean Square (MVSSLLMS) algorithm proposed for MIMO OFDM System. So we are going to analyze Bit Error Rate for different signal to noise ratio, also compare the proposed scheme with standard LMS channel estimation method.
This document provides an outline and overview of phase-locked loops (PLLs) and carrier synchronization in digital communication systems. It discusses analog and digital PLLs, including their components and characteristics. First-order and second-order PLLs are examined in detail. The document also introduces carrier synchronization techniques used in both wired and wireless communication systems.
Performance of MMSE Denoise Signal Using LS-MMSE TechniqueIJMER
This paper presents performance of mmse denoises signal using consistent cycle spinning (ccs) and least square (LS) techniques. In the past decade, TV denoise technique is used to reduced the noisy signal. The main drawback is the low quality signal and high MMSE signal. Presently, we
proposed the CCS-MMSE and LS-MMSE technique .The CCS-MMSE technique consists of two steps. They are wavelet based denoise and consistent cycle spinning. The wavelet denoise is powerful decorrelating effect on many signal domains. The consistent cycle spinning is used to estimation the
MMSE in the signal domain. The LS-MMSE is better estimation of MMSE signal domain compare to
CCS-MMSE.The experimental result shows the average MMSE reduction using various techniques.
This document is a lab report describing frequency modulation and detection using MATLAB. It includes:
1) Frequency modulating a carrier signal with a message signal in MATLAB and plotting the modulated signal in time and frequency domains using different modulation indexes to demonstrate narrowband, wideband, and carrier-dropped scenarios.
2) Using Simulink to frequency modulate a square wave message onto a carrier signal with a VCO and partially demodulating using slope detection.
3) Generating white noise in MATLAB, plotting it in time and frequency domains, and finding its autocorrelation function.
Performance Evaluation of Different QAM Techniques Using Matlab/Simulink full...vnktrjr
This document discusses the performance evaluation of different quadrature amplitude modulation (QAM) techniques using MATLAB/Simulink. It aims to develop a Simulink model to simulate various QAM modulation and demodulation schemes at bit rates ranging from 8 to 256 bits. The model transmits a randomly generated signal through an additive white Gaussian noise channel. It then measures the bit error rate versus the ratio of bit energy to noise power spectral density to evaluate each QAM technique's performance. The document explains QAM modulation mathematically and discusses signal constellations for different QAM orders. It also outlines the methodology and implementation of the Simulink model, including the use of a random integer generator and additive white Gaussian noise channel.
This document summarizes research on reducing peak-to-average power ratio (PAPR) in orthogonal frequency division multiplexing (OFDM) systems. It discusses using a companding technique with Gaussian distribution to compress the signal before transmission and decompress it upon reception. The key aspects covered are: applying a compander and decompander with Gaussian distribution parameters at the transmitter and receiver; how the central limit theorem allows the sum of subcarriers to approximate a Gaussian distribution for large numbers; and how this technique reduces PAPR by increasing average power while keeping peak power the same. Performance is analyzed by simulating PAPR and bit error rate with and without companding under different parameters.
This document discusses delta modulation and adaptive delta modulation techniques for analogue to digital conversion.
Delta modulation encodes the difference between the input signal and a reference signal into a single bit per sample, creating a staircase-like approximation of the original signal. Adaptive delta modulation varies the step size according to the input signal level to prevent slope overload. Differential pulse code modulation encodes the difference between the current and predicted sample values, sending this difference value instead of absolute sample amplitudes.
1) The document describes an experiment on Quadrature Amplitude Modulation (QAM).
2) QAM is introduced as a digital modulation technique that modulates two analog/digital messages by changing the amplitude of two carrier waves that are out of phase.
3) Matlab code is provided to simulate QAM modulation and demodulation of signals with different frequencies to demonstrate how QAM works.
This document describes a course on topics in digital communications from June 2013 to February 2014. The course covers channel estimation techniques for various channel models, including single-tap channels and intersymbol interference channels. It discusses estimating channel coefficients using pilot symbols and maximum likelihood estimation. Channel estimation is applied to tasks such as symbol demodulation, equalization, and echo cancellation.
1. The document describes an experiment demonstrating principles of direct sequence spread spectrum (DSSS) transmission.
2. In DSSS, a signal's power is spread over a wide bandwidth of frequencies, making it less susceptible to noise and interference. A DSSS transmitter uses a modulated signal and a pseudorandom number (PN) sequence to spread the signal.
3. At the receiver, the PN sequence acts as a key to de-spread the signal. It must match the transmitter in clock, bit pattern, and alignment with the transmitted sequence. MATLAB code is provided to generate and modulate a DSSS signal for demonstration purposes.
This document provides an overview of frequency planning in cellular networks. It discusses key concepts like frequency reuse, co-channel interference, system capacity, and design criteria. An optimal frequency plan requires minimizing interference between co-channel and adjacent channel cells. Frequency planning involves dividing the available spectrum into channels and allocating different sets of channels to nearby base stations to reduce interference. The document also provides examples of calculating cluster size and frequency allocation patterns.
This document discusses channel equalization techniques for digital communication systems. It describes four main threats in digital communication channels: inter-symbol interference, multipath propagation, co-channel interference, and noise. It then explains various linear equalization techniques like LMS and NLMS adaptive filters that can be used to mitigate inter-symbol interference. Finally, it discusses the need for non-linear equalizers and how multilayer perceptron neural networks can be used for non-linear channel equalization.
PAPR REDUCTION OF OFDM SIGNAL BY USING COMBINED HADAMARD AND MODIFIED MEU-LAW...IJCNCJournal
Orthogonal frequency division multiplexing (OFDM) is a technique which gives high quality of service (QOS) to the users by mitigating the fading signals as well as high data rates in multimedia services. However, the peak-to-average power ratio (PAPR) is a technical challenge that reduces the efficiency of RF power amplifiers. In this paper, we propose the combined Hadamard transform and modified meu-law companding transform method in order to lessen the effects of the peak-to-average power ratio of the
OFDM signal. Simulation results show that the proposed scheme reduces PAPR compared to other companding techniques as well as the Hadamard transform technique when used on its own.
Performance Evaluation of Iterative Receiver using 16-QAM and 16-PSK Modulati...IRJET Journal
This document presents a study evaluating the performance of an iterative receiver for Flip-OFDM modulation using 16-QAM and 16-PSK modulation schemes in optical wireless communication (OWC) systems. The proposed iterative receiver is compared to a conventional receiver that directly subtracts the negative signal frame from the positive frame. Simulation results show that the iterative receiver provides significantly lower bit error rates than the conventional receiver for both modulation schemes. Specifically, the improvement in bit error rate is larger at lower signal-to-noise ratios. The study thus demonstrates that the iterative receiver fully exploits the signal structure to improve performance over the conventional approach in Flip-OFDM for OWC.
Design of 17-Bit Audio Band Delta-Sigma Analog to Digital ConverterKarthik Rathinavel
• Systematically designed a delta sigma ADC with CIFF modular architecture in MATLAB Simulink with an ENOB of 19-bits.
• Designed a decimation filter to remove noise in the digital output of the delta sigma modulator.
• Observed the effect of non-idealities on the modulator such as finite gain, finite bandwidth, slew rate, analog noise and capacitor mismatch.
First order sigma delta modulator with low-power consumption implemented in a...eSAT Journals
Abstract
This paper presents a design of a switched-capacitor discrete time 1st order Delta-Sigma modulator used for a resolution of 8 bits
Sigma-Delta analog to digital converter. For lower power consumption, the use of operational transconductance amplifier is
necessary in order to provide wide output voltage swing and moderate DC gain. Simulation results showed that with 0.35um CMOS
technology, 80 KHz signal bandwidth and oversampling rate of 64, the modulator achieved 49.25 dB Signal to Noise Ratio (SNR) and
the power consumption was 5.5 mW under ±1.5V supply voltage .
Index terms: Analog-to-Digital conversion, Delta-Sigma modulation, CMOS technology, Transconductance operational
amplifier.
Communication Systems_B.P. Lathi and Zhi Ding (Lecture No 4-9)Adnan Zafar
Lecture No 4: https://youtu.be/E3QT55J9uWs
Lecture No 5: https://youtu.be/pb7GdbcLnI0
Lecture No 6: https://youtu.be/aFXr1ufTF7Q
Lecture No 7: https://youtu.be/1Yt6ZCKhcYg
Lecture No 8: https://youtu.be/I8UWw3DC19Y
Lecture No 9: https://youtu.be/zRKFi3dotEc
This document discusses carrier synchronization techniques in digital communication systems. It begins with an introduction to the need for carrier recovery and symbol synchronization at the receiver. It then covers maximum likelihood estimation of signal parameters including carrier phase. Next, it describes carrier phase estimation using a phase-locked loop and decision-directed loops. It explains how the phase-locked loop works to continuously track and update the carrier phase estimate. Finally, it provides an example of decision-directed carrier phase estimation for a double-sideband suppressed carrier pulse amplitude modulation signal.
IRJET- MASH 1-2 Delta Sigma Modulator with Quantizer for Fractional-N Frequen...IRJET Journal
This document describes a fractional-N frequency synthesizer modeled using a proposed MASH 1-2 delta sigma modulator with a quantizer. The modulator is used to control a multi-modulus frequency divider in the synthesizer in order to analyze spur and phase noise. Simulation results show that with a reference frequency of 20MHz, divider modulus of 10 and a fractional constant of 0.5, the synthesizer achieves a frequency range of 200MHz to 220MHz with 2MHz resolution. The proposed MASH 1-2 modulator achieves a phase noise of -44dBc/Hz at 220MHz, which is an improvement over conventional higher order delta sigma modulators.
This presentation include the basic concept of communication, modulation techniques in analog and digital. ADC (Analog to Digital Conversion) and Demodulation schemes
1) The document discusses digital transmission of analog signals using techniques like Pulse Code Modulation (PCM), Differential Pulse Code Modulation (DPCM), and Delta Modulation (DM).
2) PCM involves sampling the analog signal, quantizing the sample amplitudes, and encoding the quantized values into binary codewords.
3) Nyquist sampling theorem states that if a signal is bandlimited to W Hz, it can be reconstructed perfectly from samples taken at a rate of at least 2W samples/second.
Introduction to modulation and demodulationMahmut Yildiz
The document provides an overview of communication systems and modulation techniques. It begins with an introduction to communication systems and discusses analogue modulation techniques including AM, FM, and PAM. It then covers sampling systems, principles of noise, pulse code modulation, and digital communication techniques like ASK, FSK, and PSK. The document recommends some reference textbooks and further discusses modulation and demodulation, summarizing various modulation types and techniques.
Intersymbol interference caused by multipath in band limited frequency selective time dispersive channels distorts the transmitted signal, causing bit error at receiver. ISI is the major obstacle to high speed data transmission over wireless channels. Channel estimation is a technique used to combat the intersymbol interference. The objective of this paper is to improve channel estimation accuracy in MIMO-OFDM system by using modified variable step size leaky Least Mean Square (MVSSLLMS) algorithm proposed for MIMO OFDM System. So we are going to analyze Bit Error Rate for different signal to noise ratio, also compare the proposed scheme with standard LMS channel estimation method.
This document provides an outline and overview of phase-locked loops (PLLs) and carrier synchronization in digital communication systems. It discusses analog and digital PLLs, including their components and characteristics. First-order and second-order PLLs are examined in detail. The document also introduces carrier synchronization techniques used in both wired and wireless communication systems.
Performance of MMSE Denoise Signal Using LS-MMSE TechniqueIJMER
This paper presents performance of mmse denoises signal using consistent cycle spinning (ccs) and least square (LS) techniques. In the past decade, TV denoise technique is used to reduced the noisy signal. The main drawback is the low quality signal and high MMSE signal. Presently, we
proposed the CCS-MMSE and LS-MMSE technique .The CCS-MMSE technique consists of two steps. They are wavelet based denoise and consistent cycle spinning. The wavelet denoise is powerful decorrelating effect on many signal domains. The consistent cycle spinning is used to estimation the
MMSE in the signal domain. The LS-MMSE is better estimation of MMSE signal domain compare to
CCS-MMSE.The experimental result shows the average MMSE reduction using various techniques.
This document is a lab report describing frequency modulation and detection using MATLAB. It includes:
1) Frequency modulating a carrier signal with a message signal in MATLAB and plotting the modulated signal in time and frequency domains using different modulation indexes to demonstrate narrowband, wideband, and carrier-dropped scenarios.
2) Using Simulink to frequency modulate a square wave message onto a carrier signal with a VCO and partially demodulating using slope detection.
3) Generating white noise in MATLAB, plotting it in time and frequency domains, and finding its autocorrelation function.
Performance Evaluation of Different QAM Techniques Using Matlab/Simulink full...vnktrjr
This document discusses the performance evaluation of different quadrature amplitude modulation (QAM) techniques using MATLAB/Simulink. It aims to develop a Simulink model to simulate various QAM modulation and demodulation schemes at bit rates ranging from 8 to 256 bits. The model transmits a randomly generated signal through an additive white Gaussian noise channel. It then measures the bit error rate versus the ratio of bit energy to noise power spectral density to evaluate each QAM technique's performance. The document explains QAM modulation mathematically and discusses signal constellations for different QAM orders. It also outlines the methodology and implementation of the Simulink model, including the use of a random integer generator and additive white Gaussian noise channel.
This document summarizes research on reducing peak-to-average power ratio (PAPR) in orthogonal frequency division multiplexing (OFDM) systems. It discusses using a companding technique with Gaussian distribution to compress the signal before transmission and decompress it upon reception. The key aspects covered are: applying a compander and decompander with Gaussian distribution parameters at the transmitter and receiver; how the central limit theorem allows the sum of subcarriers to approximate a Gaussian distribution for large numbers; and how this technique reduces PAPR by increasing average power while keeping peak power the same. Performance is analyzed by simulating PAPR and bit error rate with and without companding under different parameters.
This document discusses delta modulation and adaptive delta modulation techniques for analogue to digital conversion.
Delta modulation encodes the difference between the input signal and a reference signal into a single bit per sample, creating a staircase-like approximation of the original signal. Adaptive delta modulation varies the step size according to the input signal level to prevent slope overload. Differential pulse code modulation encodes the difference between the current and predicted sample values, sending this difference value instead of absolute sample amplitudes.
1) The document describes an experiment on Quadrature Amplitude Modulation (QAM).
2) QAM is introduced as a digital modulation technique that modulates two analog/digital messages by changing the amplitude of two carrier waves that are out of phase.
3) Matlab code is provided to simulate QAM modulation and demodulation of signals with different frequencies to demonstrate how QAM works.
This document describes a course on topics in digital communications from June 2013 to February 2014. The course covers channel estimation techniques for various channel models, including single-tap channels and intersymbol interference channels. It discusses estimating channel coefficients using pilot symbols and maximum likelihood estimation. Channel estimation is applied to tasks such as symbol demodulation, equalization, and echo cancellation.
1. The document describes an experiment demonstrating principles of direct sequence spread spectrum (DSSS) transmission.
2. In DSSS, a signal's power is spread over a wide bandwidth of frequencies, making it less susceptible to noise and interference. A DSSS transmitter uses a modulated signal and a pseudorandom number (PN) sequence to spread the signal.
3. At the receiver, the PN sequence acts as a key to de-spread the signal. It must match the transmitter in clock, bit pattern, and alignment with the transmitted sequence. MATLAB code is provided to generate and modulate a DSSS signal for demonstration purposes.
This document provides an overview of frequency planning in cellular networks. It discusses key concepts like frequency reuse, co-channel interference, system capacity, and design criteria. An optimal frequency plan requires minimizing interference between co-channel and adjacent channel cells. Frequency planning involves dividing the available spectrum into channels and allocating different sets of channels to nearby base stations to reduce interference. The document also provides examples of calculating cluster size and frequency allocation patterns.
This document discusses channel equalization techniques for digital communication systems. It describes four main threats in digital communication channels: inter-symbol interference, multipath propagation, co-channel interference, and noise. It then explains various linear equalization techniques like LMS and NLMS adaptive filters that can be used to mitigate inter-symbol interference. Finally, it discusses the need for non-linear equalizers and how multilayer perceptron neural networks can be used for non-linear channel equalization.
PAPR REDUCTION OF OFDM SIGNAL BY USING COMBINED HADAMARD AND MODIFIED MEU-LAW...IJCNCJournal
Orthogonal frequency division multiplexing (OFDM) is a technique which gives high quality of service (QOS) to the users by mitigating the fading signals as well as high data rates in multimedia services. However, the peak-to-average power ratio (PAPR) is a technical challenge that reduces the efficiency of RF power amplifiers. In this paper, we propose the combined Hadamard transform and modified meu-law companding transform method in order to lessen the effects of the peak-to-average power ratio of the
OFDM signal. Simulation results show that the proposed scheme reduces PAPR compared to other companding techniques as well as the Hadamard transform technique when used on its own.
Performance Evaluation of Iterative Receiver using 16-QAM and 16-PSK Modulati...IRJET Journal
This document presents a study evaluating the performance of an iterative receiver for Flip-OFDM modulation using 16-QAM and 16-PSK modulation schemes in optical wireless communication (OWC) systems. The proposed iterative receiver is compared to a conventional receiver that directly subtracts the negative signal frame from the positive frame. Simulation results show that the iterative receiver provides significantly lower bit error rates than the conventional receiver for both modulation schemes. Specifically, the improvement in bit error rate is larger at lower signal-to-noise ratios. The study thus demonstrates that the iterative receiver fully exploits the signal structure to improve performance over the conventional approach in Flip-OFDM for OWC.
Design of 17-Bit Audio Band Delta-Sigma Analog to Digital ConverterKarthik Rathinavel
• Systematically designed a delta sigma ADC with CIFF modular architecture in MATLAB Simulink with an ENOB of 19-bits.
• Designed a decimation filter to remove noise in the digital output of the delta sigma modulator.
• Observed the effect of non-idealities on the modulator such as finite gain, finite bandwidth, slew rate, analog noise and capacitor mismatch.
First order sigma delta modulator with low-power consumption implemented in a...eSAT Journals
Abstract
This paper presents a design of a switched-capacitor discrete time 1st order Delta-Sigma modulator used for a resolution of 8 bits
Sigma-Delta analog to digital converter. For lower power consumption, the use of operational transconductance amplifier is
necessary in order to provide wide output voltage swing and moderate DC gain. Simulation results showed that with 0.35um CMOS
technology, 80 KHz signal bandwidth and oversampling rate of 64, the modulator achieved 49.25 dB Signal to Noise Ratio (SNR) and
the power consumption was 5.5 mW under ±1.5V supply voltage .
Index terms: Analog-to-Digital conversion, Delta-Sigma modulation, CMOS technology, Transconductance operational
amplifier.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
A Low power discrete time sigma delta ADC consisting of a second order sigma delta modulator and third order Cascaded Integrated Comb (CIC) filter is proposed. The second order modulator is designed to work at a signal band of 20K Hz at an oversampling ratio of 64 with a sampling frequency of 2.56 MHz. It achieves a signal to noise ratio of 85.2dB and a resolution of 14 bits. The CIC digital filter is designed to implement a decimation factor of 64, operating at a maximum sampling frequency of 2.56 MHz. A second order sigma delta modulator is implemented in 0.18micron CMOS technology using full custom design and the third order digital CIC decimation filter is implemented in verilog HDL. The complete Sigma Delta ADC, consisting of analog block of second order modulator and digital block of decimator consumes a
total power 1.96mW.
Behavioral Analysis of Second Order Sigma-Delta Modulator for Low frequency A...IOSR Journals
This document discusses behavioral analysis of a second order sigma-delta modulator for low frequency applications. It describes various non-idealities that can occur in switched capacitor sigma-delta modulators, including clock jitter, thermal noise, operational amplifier noise, finite DC gain, finite bandwidth, and slew rate. Mathematical models are presented for each non-ideality, and it is noted that accurate time domain simulation accounting for these effects is needed to optimize performance. The rest of the document will focus on simulating a second order sigma-delta modulator in MATLAB Simulink to analyze the individual and combined effects of the non-idealities on the modulator's performance for signal bandwidths up to 4 kHz.
This document describes the VLSI implementation of a fractional-N phase locked loop (PLL) frequency synthesizer using 45nm technology. It discusses the design and simulation of the key PLL components including the phase detector, loop filter, voltage controlled oscillator, and sigma-delta modulator. The layout of the overall fractional-N PLL integrated circuit is presented, which consists of 23 NMOS and 23 PMOS transistors. Simulation results show the PLL locks onto an output frequency of 2.5GHz while consuming only 53.239μwatts of power.
RF Mixed Signal Guidi-McIllree-StannardJohn Stannard
The document summarizes the design of a DSP-based modem developed jointly by the University of South Australia and JNS Electronics for high data-rate transmission applications. Key aspects of the modem design include:
1) Achieving high spectral efficiency to minimize spurious emissions outside frequency bands, addressing both microwave terrestrial and satellite communications.
2) The modulator and demodulator blocks, including digital modulation schemes like 8PSK and 16QAM for spectral efficiency and error correction coding.
3) The upconverter and downconverter designs which meet Australia's tight emission specifications and minimize phase noise and filtering distortions.
4) The digital aspects of the modem including filters, synchronization algorithms, and specialized hardware like FPG
Digital Implementation of Costas Loop with Carrier RecoveryIJERD Editor
Demodulator circuit is a basic building block of wireless communication. Digital implementation of
demodulator is attracting more attention for the significant advantages of digital systems than analog systems.
The carrier signal extraction is the main problem in synchronous demodulation in design of demodulator based
on Software Defined Radio. When transmitter or receiver in motion, it is difficult for demodulator to generate
carrier signal same in frequency and phase as transmitter carrier signal due to Doppler shift and Doppler rate.
Here the digital implementation of Costas loop for QPSK demodulation in continuous mode is discussed with
carrier recovery using phase locked loop.
The document discusses several topics in digital signal processing including polyphase decomposition, discrete cosine transform (DCT), Gibbs phenomenon, and oversampled analog-to-digital converters (ADCs). Polyphase decomposition allows for more efficient implementation of decimation and interpolation filters. DCT is used for image compression and represents data in the frequency domain using cosine waves. Gibbs phenomenon causes ripples near discontinuities that cannot be fully removed. Oversampling ADCs sample at a higher rate than Nyquist to reduce noise and simplify anti-aliasing filters.
This document summarizes a research paper that compares different digital filtering techniques for removing noise from electrocardiogram (ECG) signals. It describes how finite impulse response (FIR) filters were designed using various windowing techniques, including rectangular, Hamming, Hanning, and Blackman windows. Infinite impulse response (IIR) filters and wavelet transforms were also evaluated for denoising ECG signals. The performance of the different filtering approaches were compared based on the power spectral density and average power of the signals before and after filtering. The paper found that an FIR filter designed with the Kaiser window showed the best results for noise removal from ECG signals.
This document summarizes the design and analysis of a digital fixed notch filter using MATLAB. The purpose of the notch filter is to remove a narrowband interference signal at 90MHz while leaving the broadband signal unchanged. An elliptic design method and direct form II structure are used to design a second-order notch filter with center frequency of 90MHz. The filter performance is analyzed by varying the quality factor from 2 to 100,000 and evaluating responses like pole-zero plot, magnitude response, and step response. Higher quality factors result in sharper notch responses but increased complexity. A quality factor of 100,000 provides the best noise rejection with minimal settling time and complexity for a second-order filter.
Design of Continuous Time Multibit Sigma Delta ADC for Next Generation Wirele...IJERA Editor
This paper presents the design of CT ΣΔ modulator which can provide high DR and SNR over a 20 MHz signal bandwidth. So far all the CT SDM uses either feedback or feedforward loop filter architecture. The proposed topology is a 3rd order low-pass sigma-delta modulator, which employs a combination of feedforward and feedback schemes. Loop filter is designed as RC integrators due to its high linearity and easy interface. The design starts from system level using Matlab/Simulink. Then, the first integrator in the loop, which is the most critical block in the modulator, is implemented at transistor level using Cadence Virtuoso 180 nm CMOS technology.
In this paper, a low pass filter based on T-Shaped resonator is presented. The T-Shaped resonator consists of meandered lines and rectangular patches. Also, the LC model and transfer function of the proposed resonator is presented. For suppression of spurious harmonics, a bandstop structure consists of hexangular patches and open stubs has been utilized. Finally, the wide stopband microstrip lowpass filter with cutoff frequency 2.72 GHz has been simulated, fabricated and measured. The LPF has good characteristics such as wide stopband and insertion loss lower than 0.18 dB in the passband region. The rejection level is less than -20 dB from 2.98 up to 21.3 GHz. The filter size is 10.5 mm×12.7 mm, or 0.131 λg× 0.158 λg, where λg is the guided wavelength. The measured and simulated results of the filter is in good agreement with each other, which show the merits of low insertion loss and wide stopband.
Designing and Performance Evaluation of 64 QAM OFDM SystemIOSR Journals
Abstract (11Bold) : — In this report, the performance analysis of 64 QAM-OFDM wireless communication
systems affected by AWGN in terms of Symbol Error Rate and Throughput is addressed. 64 QAM (64 ary
Quadrature Amplitude Modulation) is the one of the effective digital modulation technique as it is more power
efficient for larger values of M(64). The MATLAB script based model of the 64 QAM-OFDM system with
normal AWGN channel and Rayleigh fading channel has been made for study error performance and
throughput under different channel conditions. This simulated model maximizes the system throughput in the
presence of narrowband interference, while guaranteeing a SER below a predefined threshold. The SER
calculation is accomplished by means of modelling the decision variable at the receiver as a particular case of
quadratic form D in complex Gaussian random variables. Lastly comparative study of SER performance of 64
QAM-OFDM simulated & 64 QAM-OFDM theoretical under AWGN channel has been given. Also
performance of the system is given in terms of throughput (received bits/ofm symbol) is given in a plot for
different SNR. Keywords (11Bold) –64 QAM, BPSK, OFDM, PDF, SNR.
Designing and Performance Evaluation of 64 QAM OFDM SystemIOSR Journals
In this report, the performance analysis of 64 QAM-OFDM wireless communication
systems affected by AWGN in terms of Symbol Error Rate and Throughput is addressed. 64 QAM (64 ary
Quadrature Amplitude Modulation) is the one of the effective digital modulation technique as it is more power
efficient for larger values of M(64). The MATLAB script based model of the 64 QAM-OFDM system with
normal AWGN channel and Rayleigh fading channel has been made for study error performance and
throughput under different channel conditions. This simulated model maximizes the system throughput in the
presence of narrowband interference, while guaranteeing a SER below a predefined threshold. The SER
calculation is accomplished by means of modelling the decision variable at the receiver as a particular case of
quadratic form D in complex Gaussian random variables. Lastly comparative study of SER performance of 64
QAM-OFDM simulated & 64 QAM-OFDM theoretical under AWGN channel has been given. Also
performance of the system is given in terms of throughput (received bits/ofm symbol) is given in a plot for
different SNR
Software PLL for PLI synchronization, design, modeling and simulation , sozopoldpdobrev
Power-line interference is a common disturbing
factor in almost all two-electrode biosignal acquisition
applications. Many filtering procedures for mains
interference elimination are available, but all of them are
maximally effective when the filter notches are positioned
exactly at the power-line harmonics, i. e. when the sampling rate is synchronous with the power-line frequency. Moreover, various lock-in techniques, su ch as automatic common mode input impedance balance, require precise in-phase and quadrature phase references, synchronous with the power-line interference. This paper describes in depth a design procedure of software PLL, generating synchronous reference to the common mode power-line interference, and achieved from its analog prototype using s to z backward difference transformation. The main advantage of th e presented
approach is that the synchronization is done in software, so it has no production cost. The presented PLL is intended for use in ECG signal processing, but it can be used after easy adaptation in various digital si gnal processing applications, where frequency synchronization is needed.
For ease of analog or digital information transmission and reception, modulation is the foremost important technique. In the present project, we’ll discuss about different modulation scheme in digital mode done by operating a switch/ key by the digital data. As we know, by modifying basic three parameters of the carrier signal, three basic modulation schemes can be obtained; generation and detection of these three modulations are discussed and compared with respect to probability of error or bit error rate (BER).
This document summarizes a digital signal processing project that involves resampling audio signals and modeling signals using autoregressive (AR) processes.
The resampling part involves downsampling two audio signals with correct and incorrect sampling rate conversions. Graphs and analysis show the resampled signals have lower quality and more distortion compared to the originals.
The AR modeling part estimates AR model coefficients from one of the signals using the Yule-Walker equations. A filter is designed to "whiten" the signal, removing noise. Graphs and audio comparison show the filtered signal has less noise but also some quality loss.
This document provides an introduction to oversampling analog-to-digital converters (ADCs). It discusses delta-sigma modulators, which are the core component of oversampling ADCs. A delta-sigma modulator shapes the quantization noise to push it to higher frequencies, achieving high resolution through oversampling. Higher-order delta-sigma modulators provide better noise shaping. The in-band noise of a single-loop delta-sigma modulator is inversely proportional to the oversampling ratio raised to a power related to the modulator order, allowing significant gains in resolution from increased oversampling.
Multisim design and simulation of 2.2 g hz lna for wireless communicationVLSICS Design
This paper presents the work done on the design and simulation of a high frequency low noise amplifier for
wireless communication. The purpose of the amplifier is to amplify the received RF path of a wireless
network. With high gain, high sensitivity and low noise using Bipolar Junction transistor (BJT). The design
methodology requires analysis of the transistor for stability, proper matching, network selection and
fabrication. The BJT transistor was chosen for the design of the LNA due to its low noise and good gain at
high frequency. These properties were confirmed using some measurement techniques including Network
Analyzer, frequency analyzer Probe and Oscilloscope for the simulation and practical testing of the
amplifier to verify the performance of the designed High frequency Low noise amplifier. The design goals
of noise figure of 0.52dB-0.7dB and bias conditions are Vcc = 3.5 V and Icc= 55 mA to produce 16.8 dB
gain across the 0.4–2.2GHz band.
Similar to Design and Simulation Fractional-N Phase Locked Loop Frequency Synthesizer using Sigma-Delta modulator for Bluetooth Systems (20)
Efforts made in many countries to stop the COVID-19 pandemic include vaccinations. However,
public skepticism about vaccines is a pressing issue for health authorities. With the COVID-19 vaccine
available,
SARS-CoV-2, as the causative agent of COVID-19, has spread throughout the world after becoming
a pandemic in March 2020. In the midst of the ongoing COVID-19 pandemic, we are also faced with another
serious health problem
This paper discusses the construction and implementation of a system for the measurement of
electrical power parameters; amperage and voltage of the hybrid system photovoltaic solar-wind, to evaluate
the system parameters and performance. The basis of the development of the measuring apparatus is the use of
an Arduino Mega 2560 to provide the interface between the electrical circuits of the sensors and the dynamics
of the voltage-amperage as well as collect data in an analog format as well as development of functional
dependence relationships. The collected data is converted into digital format and stored it in an Excel format
through the "PLX-DAQ Spreadsheet" that connects the Arduino and the PC for display and analysis of the
system parameters. The proposed technique for power measurements of AC and DC proved to be reliable and
can predict the power amperage and voltage within relative error of 1.63 % for AC and 4.16% for DC,
respectively.
The optimum speed required for mass-size reduction of shells to produce most sizes that are small
comparable with kernel sizes; coupled with retention of kernel wholeness in cracked palm nut mixture under
repeated impact was investigated. This is to enhance whole kernel separation by dry method, reduce maintenance
and production cost of palm kernel oil (PK0); and lower the risk of oil rancidity associated with split kernel
production and wet method of separation. A static nut cracker and centrifugal nut cracker were used in this study as
Test Rigs while sieves were used to grade cracked shells and whole kernels. The data generated were evaluated. A
model was developed for energy via speed required to retain kernels wholeness following repeated impact in the
crackers. Technical analysis revealed that the maximum allowable speed to retain kernel wholeness is 27.93 m/s;
the minimum allowable average speed to fragment cracked shells is 24.95 m/s. Further analysis showed that the
optimum speed and energy required for cracked nut mixture under repeated impact to have kernel wholeness
retention and production of small sizes of cracked shells relative to kernel sizes are 25.71 m/s and 0.4 J,
respectively.
This review was written to provide a comprehensive summary of the suggested etiologies of Chronic Kidney
Disease of Unknown Etiology (CKDu) in Sri Lanka. In this review, Chronic Kidney Disease (CKD) is explained
in detail and its known etiologies are discussed. CKDu is defined and its epidemiology is discussed, with the
compilation of statistic from over 15 research papers through the years 2000 to present.
This work contributes to the monitoring of water pollution of some selected Dams in Katsina
State, North western Nigeria by assessing the degree of heavy metal pollution in the Dams sediment samples.
The study was conducted in the year 2017 within some selected Dams in the State (Ajiwa, Zobe,
Sabke/Dannakola) that are beehives of fishing and Agricultural activities in Katsina State. Analysis for the
concentration of these heavy metals; Cr, Cd, Fe, Ni, Mn, Pb and Zn was conducted by the use of AAS (by
Atomic Absorption Spectrophotometry) method. Several indices were used to assess the metal contamination
levels in the sediment samples, namely; Geo-accumulation Index (Igeo), Enrichment Factor (EF),
Contamination Factor (CF), Degree of Contamination (Cd), Pollution Load Index (PLI) and Potential
Ecological Risk Index (PERI). The result of this study has shown that generally among the heavy metals
evaluated, the highest concentration was observed for Fe (range: 2.6718-4.2830 ppm), followed by Zn (range:
0.4265-0.7376 ppm), Cr (range: 0.1106-0.1836 ppm), Cd (range: 0.1333-0.1273 ppm) and Mn (range: 0.1136-
0.1271 ppm). While Pb has the lowest concentration (range: 0.0472-0.0598 ppm). For all the site sampled the
heavy metal Ni was below detection level (BDL). From the results of heavy metals I-geo values, according to
Muller’s classification, all the sediment samples from the selected dams were unpolluted (class 0). The result for
the enrichment factor has shown that for all the selected dam sediment samples the heavy metals show
deficiency to minimal enrichment. Also based on the contamination factors for all sediment samples the heavy
metal Cd has a CF values range of 0.5430-0.6665 (~1), indicating that the sediment samples are moderately
contaminated with Cd. In contrast, the rest of the heavy metals exhibit low contamination in general. The value
of PLI ranges from 0.2408 to 0.4935, indicating unpolluted to moderate pollution. The Eri values for all
samples are all < 40, presenting low ecological risk. The results suggest that the sediment samples from the
selected dams in Katsina state has low contamination by the heavy metals evaluated.
Using QR Decomposition to calculate the sum of squares of a model has a limitation that the number of rows,
which is also the number of observations or responses, has to be greater than the total number of parameters used in the
model. The main goal in the experimental design model, as a part of the Linear Model, is to analyze the estimable function
of the parameters used in the model. In order not to deal with generalized invers, partitioned design matrix may be used
instead. This partitioned design matrix method may be used to calculate the sum of squares of the models whenever the total
number of parameters is greater than the number of observations. It can also be used to find the degrees of freedom of each
source of variation components. This method is discussed in a Balanced Nested-Factorial Experimental Design.
Introduction:It has been proven twice that the Hambantota District has the highest life expectancy in male
population. This study focused to find and identify reasons for Hambantota District people to have high life
expectancy at birth.
Methodology: Research was carried out in both qualitative and quantitative phases in five MOH (Medical
Health Officer) divisions in HambantotaDistrict. Study focused on 3 age categories, 55-65 Years, 66-75 Years,
and above 76 Years. Main objectives and key information areas are Life Style and Social Behaviors, Food
Consumption and Diet, Familial Trait and Physical and Mental Health.
Findings: Majority of the male population have educated up to grade 5and most are engaged in the agriculture
while others engaged in fishery and self-employment etc. Almost everyone reachestheir workplaces by foot or by
bicycle. Many of them work less than six hours. They spend their free time with their family members and watch
TV. Most of them do not consume alcohol and smoke. Almost everyone take part in social activities. Majority eat
red rice for all three meals. Almost everyone eats fish every day. They have a high salt intake. Their parents and
ancestors have also have had a high life expectancy. Only a minority suffer from chronic illnesses. They all have
a good physical and mental health condition. They spend happy and relaxed lifestyle.
Conclusion: Healthy diet, low alcohols consumption and smoking, high iodine intake, physical activeness and
their social wellbeing effect for high life expectancy within the male population of selected five MOH divisions
in Hambantota District. They have a free and happy life. Genetics of these people also may contribute for high
life expectancy. Abundance of neem trees in this area also may effect on their high life expectancy.
A clay deposit in Chavakali of western Kenya was evaluated for its potential as refractory raw
material. The collected clay sample was crushed, sieved and the chemical composition determined in
percentage weight (wt %) of (SiO2, Al2O3, Fe2O3, etc) using Atomic Absorption Spectrophotometer (AAS). The
samples were moulded into rectangular shaped bricks of 40mm height, 40mm width and 80mm length, allowed
to dry and later fired up to a temperature of 10000C. Refractory properties like Compressive strength,
Hardness, Linear shrinkage on firing, Apparent porosity and Density were determined using standard
techniques. The result of chemical analysis indicated that the clay was composed of Silica (SiO2), 67.3%;
Alumina (Al2O3), 16.67%; Iron Oxide (Fe2O3), 3.87%; Calcium Oxide (CaO), 0.37%; Potassium Oxide (K2O),
2.30%; Sodium Oxide (Na2O), 1.39%; and other traces. The physical and mechanical tests show that the clay
has Cold Crushing Strength of 10.36MPa, Hardness of 40.080 GPa, Linear shrinkage of 6.17%, Apparent
Porosity of 32.71% and Bulk Density of 2.77g/cm3
. Chavakali clay can make better local refractory
Nihon University challenged world record of the human-powered aircraft flight based on the
regulation of Fédération Aérionautique Internationale in Kasumigaura Lake, Japan, 2014. The wing fell off in
midair immediately after take-off, the pilot landed to the lake for safety. So, the challenge failed. It guessed the
operational errors were correlated with the wing falling in midair, which had not happened in our experience.
The flight recording camera and the salvaged airplane were investigated. The fault tree analysis was conducted
for cause investigation. The wing falling was the result as the chain destruction starting from the coupling parts
being damaged in take-off. The defective take-off was caused by composite factors on only operational errors.
The risk that the ultralight airplane might disintegrate in midair by only operational error became apparent.
Due to the large-scale exploitation of mineral resources and the unreasonable human activities, the
geological disasters in Jiaozuo City have become increasingly prominent and the degree of harm increased. This
leds to a tremendous threat to human life and property safety. Jiaozuo City, the main types of geological
disasters, landslides, ground subsidence, debris flow and ground fissures. It has great significance to the
development of the city and the protection of people's life and property to explore the hidden dangers of
geological disasters and actively take preventive and control measures. The establishment of geological
hazard group measurement system of prevention and control to achieve the timely detection of geological
disasters, rapid early warning and effective avoidance.
Dangerous gas explosion accidents result in considerable amount of casualties and property damage.
Hence, an investigation on the generation of poisonous gases in gas explosions exerts important implications
for accident prevention and control and in the decision-making processes of fire rescue. Therefore, a gas
explosion piping test system is established in this paper. Experimental research on gas explosion is conducted by
selecting methane/air premixed gases with concentrations of 7%, 9%, 11%, 13%, and 15% in the gas explosive
range. This research aims to reveal the regularity of CO generation after gas explosion in pipelines.
Experimental results showed that when the gas concentration is small (< 9%), 1500–3000 ppm CO will be
produced. When the gas concentration is large (> 9%), the CO amount will reach 3000–40000 ppm. The
variation trend in CO concentration and the quantity of explosive gas are also obtained.
1) The document examines the influence of entry speed on water entry phenomena through experimental visualization of the flow field above the water surface. Entry speeds ranged from 0.2 to 1.5 km/s.
2) It was found that above a critical entry speed, the vertical velocity of the water splash tip was linearly proportional to its vertical location, and the ratio of initial splash velocity to entry speed was constant.
3) A shock wave was driven above the water surface even for subsonic entry speeds, and its propagation followed a scaling law for explosive shock waves where projectile kinetic energy replaced explosive energy.
Pingdingshan Coal Mine district is one of the six mining areas of Henan Province, which is a
large coal base in China. After 60 years of exploitation, it has brought great benefits, at the same time,
serious geological disasters have been occurred. It has seriously damaged the normal production of the
masses, life, restricting the development of Pingdingshan coal mine economy. In this paper, the
geological disasters such as ground collapse, ground fissures and ground subsidence in Pingdingshan coal
mine are analyzed, and the degree of geological disasters in the mining area is analyzed in combination
with the severely affected mining area. Finally, reasonable and feasible countermeasures have been put
forward.
Kelud volcano is located in East Java Province, Indonesia. According to Geochemical study of
Kelud Volcano, it could be divided into 3 periods which are Kelud I (older than 100 ky BP), Kelud II (40 – 100
ky BP), and Kelud III (younger than 40 ky BP). A specific petrogenesis of Kelud are dominatad by magma
mixing and fractional crystalization. New petrological data from Kelud volcano was taken through products of
the eruption in 1990 (Vulkanian type), 2007 (Lava plug forming) and 2014 (Plinian type). Petrographic study
on these rocks showed that reverse and oscilatory zoning on plagioclases, Shieve-like and corroded textures on
plagioclases and pyroxenes are common. However, normal zoning textures were also found on plagioclases and
pyroxenes. Whole rock study on these rocks showed all rocks were classified into Basalt to Andesite in
composition with calc-alkaline group. The study indicated that their magma origin derrived from slab with
fractional crystallization during in the magma reservoir, and magma mixing processes are dominant expecially
in magma pockets. Concequently, the magma origin and petrogenesis of Kelud magma after the 1966 eruption
are still the same as those of old magma of Kelud.
Black cotton soils are among a group of soils termed as problematic soils. These soils have
undesirable characteristics in relation to construction works and therefore need some form of improvement
when encountered in construction projects. Techniques for improvement of black cotton soils include
replacement, moisture control or adding a stabilizer. Cement and/or lime has been commonly used in soil
stabilization for ages. However, due to the associated cost, required quality control and the need to utilize waste
materials in construction, new stabilizing materials are emerging. This paper presents a study on application of
quarry dust for improving properties of black cotton soil in Mbeya region, Tanzania. The targeted improvement
was to achieve minimum acceptable characteristics for road subgrade as per Tanzania standards. It was
determined that 40% by weight of quarry dust added to the black cotton soil was able to improve the
characteristics by increasing CBR value from 3.8 to 15.7 and reducing PI from 32% to 15%. It will be worthy
studying the cost implication of the suggested improvement in relation to other techniques before application of
the study findings.
High intensity rain and morphometri in Padang city cause at Arau. Morphometri
geomorphologi that is related to wide of, river network, stream pattern and gradien of river. The form wide
of DAS will be by stream pattern and level.This will influence to the number of rain. Make an index to
closeness of stream depict closeness of river stream at one particular DAS. Speed of river stream influenced
by storey, level steepness of river. Steepness storey, level is comparison of difference height of river
downstream and upstream. Ever greater of steepness of river stream, excelsior speed of river stream that
way on the contrary. High to lower speed of river stream influence occurence of floods, more than anything
else if when influenced by debit big. By using rainfall from year 2005 to year 2015, and use Thiessen method
got a rainfall. Use the DEM IFSAR, analysed sofware ARGIS, and with from earth map, the result got DAS
in at condition of floods gristle and sedimentation. There are band evakuasi for resident which data in
floods area.
The chemical (extractives and lignin) content and histological property (microscopic structure)
of tissues of Ricinodendron heudelotii (Baill, Pierre ex Pax), an angiosperm, were investigated for its potential
as a fibrous raw material for pulp and paper production. Bolts of about 70 cm were cut from the felled trees at
three different merchantable height levels of 10%, 50%, and 90% to obtain: corewood, middlewood and
outerwood samples. The fiber characteristics of the selected trees viz: the fiber length, fibre diameter and lumen
diameter were measured while the cell wall thickness was derived from the measured fibre dimensions. The
average fiber length, cell wall thickness, and lumen width, were 1.40 mm, 4.6 µm, and 32.3 µm, respectively.
The extractive and lignin contents were determined. Klason lignin content was about 30%. Extractive content of
R. heudelotii ranged from 0.41 to 0.5%. Based on these findings R. heudelotii is suitable for pulp and paper
production.
The prolific Niger Delta Basin is a mature petroleum province. Therefore, further prospectivity in
the basin lies within deeper plays which are high pressure and high temperature (HPHT) targets. One of the
main characteristics of the Niger Delta is its unique diachronous tripartite stratigraphy. Its gross onshore and
shallow offshore lithostratigraphy consists of the deep-seated Akata Formation and is virtually exclusively
shale, the petroliferous paralic Agbada Formation in which sand/shale proportion systematically increases
upward, and at the top the Benin Formation composed almost exclusively of sand. This stratigraphic pattern is
not exactly replicated in the deep offshore part of the delta.
A low-carbon steel wire of AISI 1022 is used to easily fabricate into self-drilling tapping screws,
which are widely used for construction works. The majority of carbonitriding activity is performed to improve
the wear resistance without affecting the soft, tough interior of the screws in self-drilling operation. In this
study, Taguchi technique is used to obtain optimum carbonitriding conditions to improve the mechanical
properties of AISI 1022 self-drilling tapping screws. The carbonitriding qualities of self-drilling tapping screws
are affected by various factors, such as quenching temperature, carbonitriding time, atmosphere composition
(carbon potential and ammonia level), tempering temperature and tempering time. The quality characteristics of
carbonitrided tapping screws, such as case hardness and core hardness, are investigated, and so are their
process capabilities. It is experimentally revealed that the factors of carbonitriding time and tempering
temperature are significant for case hardness. The optimum mean case hardness is 649.2HV. For the case
hardness, the optimum process-capability ratio increases by about 200% compared to the original result. The
new carbonitriding parameter settings evidently improve the performance measures over their values at the
original settings. The strength of the carbonitrided AISI 1022 self-drilling tapping screws is effectively improved.
More from International journal of scientific and technical research in engineering (IJSTRE) (20)
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As digital technology becomes more deeply embedded in power systems, protecting the communication
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Design and Simulation Fractional-N Phase Locked Loop Frequency Synthesizer using Sigma-Delta modulator for Bluetooth Systems
1. International journal of scientific and technical research in engineering (IJSTRE)
www.ijstre.com Volume 2 Issue 1 ǁ January 2017.
Manuscript id. 151474674 www.ijstre.com Page 30
Design and Simulation Fractional-N Phase Locked Loop
Frequency Synthesizer using Sigma-Delta modulator for
Bluetooth Systems
Harith Nazar Mustafa Al-Nuaimi
College of electronics and communication engineering Süleyman Demirel University
Abstract—Phase locked loop is a technique usually used to perform indirect digital frequency synthesizer for
most RF transceivers. A fractional-N phase locked loop frequency synthesizer has been used in recent years
since it achieves fine resolution and large loop bandwidth . This paper presents the design and simulation of a
fractional-N phase locked loop frequency synthesizer using sigma-delta modulation for bluetooth standard
systems with a frequency range from 2402 to 2480MHz. Loop filter and Sigma-Delta modulator are the most
important factors in improving the performance of fractional-N phase locked loop. The digital Sigma-Delta
modulator provides a useful noise shaping for the phase noise introduced by the fractional division operation,
while the loop filter bandwidth limits the speed of switching time between the synthesized frequencies. A forth
order passive loop filter was implemented at bandwidth equal to 200 KHz, 50° phase margin, and a second
order single loop modulator with 4-level quantizer was used to control the frequency divider. Simulation results
showed that the system is stable, and there is no fractional spurs in the output spectrum of the fractional-N
phase locked loop.
Keywords-Phase Locked Loop; Sigma-Delta modulation; Frequency Synthesizer; Fractional-N; Phase Noise
I. INTRODUCTION
A phase locked loop (PLL) can be divided into two architectures, an integer-N PLL and a fractional-N PLL.
The main problem of the integer-N PLL is the trade-off between the channel spacing(frequency resolution) and
the loop bandwidth. A small channel spacing or high frequency resolution requires a small reference frequency
( ), but using a small reference frequency leads to two main issues. First, for stability requirement the loop
bandwidth must be smaller than the reference frequency ( ), therefore a low reference frequency
means a small loop bandwidth, and this will result in slow switching time. Second, reducing the reference
frequency causes an increase in the phase noise because of the high division ratio[1]. The fractional-N PLL
solves the trade-off issue found in the integer-N PLL, offering a lower phase noise, higher frequency resolution,
and a larger loop bandwidth. A larger loop bandwidth means faster switching time[2]. The output frequency of
the fractional-N PLL is =(N.α)* , where N is an integer, and α is the fractional part. A dual modulus
divider is used to average many integer divider cycles over time to obtain the desired fractional division ratio. A
simple digitalaccumulator with an overflow controlling the dual modulus divider can be used to get the
fractional ratio[3].Themain problem of this method is that the periodic operation of the dual modulus divider
generates a spurious tones that is called fractional spurs[4].The first fractional spurs located at (α. ); if these
spurs appear inside the loop bandwidth, this problem can be solved by reducing the loop bandwidth to remove
these spurs, but this will increase the switching time. The best method to remove the fractional spurs without
affecting the loop bandwidth is by breaking the periodicity of the dual modulus operation, which is realized by
using a Sigma-Delta Modulation technique.
The Sigma-Delta modulator changes the division ratio between more than two values, so the spurs will
spread over the spectrum. The Sigma-Delta modulator generates a random integer number with an average equal
to the desired fractional ratio(while shaping the quantization noise) and pushes the spurious contents to the
higher frequencies. Then the spurious contents are removed by the loop filter action [3,5].
II. SIGMA-DELTA FRACTIONAL-N FREQUENCY SYNTHESIZER BACKGROUND
A block diagram of the fractional-N PLL frequency synthesizer and the Sigma-Delta Modulation technique
is shown in Fig 1,which consists of Phase Frequency Detector (PFD), Charge Pump (CP), Low Pass Filter
(LPF), Voltage Controlled Oscillator (VCO),and Sigma-Delta modulator. The aim of using fractional-N PLL is
to produce a periodic waveform that is fractional multiples of the reference oscillator ( ).
2. Design and Simulation Fractional-N Phase Locked Loop Frequency Synthesizer using Sigma…..
Manuscript id. 151474674 www.ijstre.com Page 31
Figure 1. Block diagram of Sigma-Delta Fractional-N PLL [6]
The input of Sigma-Delta modulator is the desired fractional division number (α), where the output consists
of a DC component y[n] that is proportional to the input (α),plus the quantization noise introduced due to using
integer divider instead of ideal fractional divider. The frequency divider divides the output frequency (Fout) of
the VCO by +y[n], where is an integer value, and y[n] is the output sequence of the modulator.The
operation of the Sigma-Delta modulator is based on the noise shaping and oversampling property, which means
that the quantization noise around the desired band signal is suppressed by using an integrator and a negative
feedback[6].Fig 2 shows the first order Sigma-Delta modulator, which consists of one difference operator, one
unit delay, one discrete integrator, and one bit quantizer[7].The relation between the input and output is given
by:
Y(z) = X(z) + (1- ) Q(z). (1)
The feedback loop shapes the quantization noise in proportion to (1- ); in other word the error introduced
from the quantizer is pushed to the high frequencies due to the term (1- ), where the input signal to the
modulator is oversampled [8]. The noise shaping property is discussed in reference [9] and the key equations are
shown here:
= 1- (2)
Where z = , then
= (1 - ) (3)
= ( - )(4)
= 2.j. sin(πf ) (5)
Hence the noise shaping function is written as:
(f)= (6)
(f) = 2 ) (7)
Where:
:- clock frequency of Sigma-Delta modulator.
fs= (sampling frequency of Sigma-Delta modulator)
3. Design and Simulation Fractional-N Phase Locked Loop Frequency Synthesizer using Sigma…..
Manuscript id. 151474674 www.ijstre.com Page 32
Figure 2. First Order Sigma-Delta Modulator [7]
Fig3 shows the spectrum of a first order Sigma-Delta noise shaping.
Figure 3. Noise shaping of the 1st
Order Modulator[9]
Where is relatively flat for the frequency range of interest.The second order Sigma-Delta modulator is
shown in Fig 4, where the noise transfer function is:
= (8)
The noise shaping function is:
(f) = (9)
The second order Sigma-Delta modulator provides better noise shaping than the first order as shown in Fig 5.
Figure 4. Second Order Sigma-Delta Modulator [9]
Figure 5. Noise Shaping of 1st
and 2nd
Order Modulator[9]
It is clear from the above figure that at frequenciesf > , the quantization noise increases as frequency increases,
depending on the order of modulator[2].It isworth pointing out that the quantization noise limits the bandwidth
of the fractional-N PLL, therefore the loop bandwidth must be chosen carefully to provide the best suppression
of the quantization noise[10].
4. Design and Simulation Fractional-N Phase Locked Loop Frequency Synthesizer using Sigma…..
Manuscript id. 151474674 www.ijstre.com Page 33
III. DESIGN AND SIMULATION METHODS
The proposed Sigma-Delta fractional-N frequency synthesizer used in this paper is shown in Fig 6.
Figure 6. A circuit of the Sigma-Delta Fractional-N Frequency Synthesizer
This study focuses on the design of the loop filter and the Sigma-Delta modulator to improve the
performance of the frequency synthesizer. The proposed architecture is designed to work at bluetooth
frequencies in the range of 2402 to 2480 MHz with a channel spacing = 1 MHz. The channel spacing specifies
the distance between the channels, so the output frequency will be increased by 1 MHz . The reference
frequency used is 25 MHz.
A second order single loop Sigma-Delta modulator with 4-level quantizer was used to modulate the desired
fractional ratio (α). The modulator, shown in Fig 7, consists of two difference operators, two integrators,
multibit quantizer, and a negative feedback. This modulator generates a sequence of random integer number in
the form -1,0,1,2,0,1,-1,2, ….., so the division ratio changes as 95, 96, 97, 98, 96, 97, 95, 98, …..as shown in
Fig8. The relationship between the input and output isdescribed by the following equations:
(z) = (z). + ( (10)
Where is the quantization noise of the quantizer
Figure 7. Second Order Sigma-Delta Modulator
5. Design and Simulation Fractional-N Phase Locked Loop Frequency Synthesizer using Sigma…..
Manuscript id. 151474674 www.ijstre.com Page 34
Figure 8. Divide Ratio (N)
A fourth order passive loop filter was implemented to have a 200 KHz bandwidth, and 50 phase margin.
This filter provides an effective filtering for the reference spurs, and the noise with offset equal to at least twenty
times the loop bandwidth. The design process is very complicated due to the difficulty in designing a stable loop
filter that has all real components[11]. The loop filter was designed using Dean Banerjee equations andthe
average current to voltage transfer function of the loop filter isdescribed as follows[11]:
H(s)= (11)
Where:
T2 is the zero of the filter = R1.C2(12)
A3=C1.C2.C3.C4.R1.R2.R3 (13)
A2=C1.C2.R1.R2(C3+C4)
+C4.R3(C2.C3.R2+C1.C3.R2+
C1.C2.R1+C2.C3.R1) (14)
A1= C2.R1.(C1+C2+C3)+R2.(C1+C2)
.(C3+C4)+C4.R3(C1+C2+C3)(15)
A0= C1+C2+C3+C4 (16)
A0= (17)
is the gain of the voltage controlled oscillator, is the charge pump current, (T1, T3, T4) are thepoles
of the loop filter. The equations of loop filter components are:
C1= (1+ (18)
C2= (19)
C3= (20)
C4= A0-C1-C2-C3 (21)
6. Design and Simulation Fractional-N Phase Locked Loop Frequency Synthesizer using Sigma…..
Manuscript id. 151474674 www.ijstre.com Page 35
R1= (22)
R2= (23)
R3= (24)
The open loop transfer function of the PLL is written as:
A(s) = (25)
The equations of the coefficients (a, b, c, a1, a2, k0, c3), and the poles (T1, T2, T3) are found in [6].For an
output frequency (Fout)= 2403 MHz, = 210 MHz/v, = 50 µA, the ratio of third pole to the first pole
(T31)= 0.3, the ratio of fourth pole to the third pole (T43)= 0.4. The values of loop filter components are, C1=
9.85 PF, C2= 182.89 PF, C3=1.6 PF, C4= 1.42 PF, R1= 11.986 KΩ, R2= 28.743 KΩ, R3= 42.17 KΩ.
IV. RESULTS AND DISCUSSION
The analysis and design process were done using Advance Design System Program (ADS). This program
gives a simulation results very similar to the implementation results. Fig9depicts the simulated magnitude and
phase response of the open loop transfer function. The bandwidth is 200 KHz as expected, and the phase margin
isapproximately 50° which seems to be an optimal value.A spectrum analyzer with a Gaussian window, and a
100 KHz resolution bandwidth was used to display the spectrum of the VCO output signal. Fig 10 shows the
simulated output spectrum at 2.4 GHz. It can be seen that the synthesized signal is 2403 MHz, and the spectrum
is free from any fractional and reference spurs. This means that the used second order modulator is effective in
removing the fractional spurs.
Figure 9. Open Loop Transfer Function
Figure 10. Spectrum output of the Fractional-N Frequency Synthesizer
The phase noise can be calculated from the spectrum output using the following equation [12]:
Phase noise= -10log(1.2*RBW)
7. Design and Simulation Fractional-N Phase Locked Loop Frequency Synthesizer using Sigma…..
Manuscript id. 151474674 www.ijstre.com Page 36
+1.05 dB+1.45 dB (26)
Where represents the ratio of noise level to carrier level(in dBc), RBW is the resolution bandwidth of
the spectrum analyzer, and (1.05, 1.45) are referred to the peak detector average/rms response and logarithmic
compression of the noise signal peaks of analyzer respectively. Table 1summarizes the measured phase noise at
different offset frequencies.
Table I. Phase noise of a Single Loop Sigma-Delta Fractional N-PLL
The switching time is one of the most important factors in designing fractional-N PLL, since it determines
the required time for the synthesized signal to reach a stable state. The switching time depends on the loop filter
bandwidth, and when the loop bandwidth is increased the switching time will improve. Fig 11 shows the input
voltage of the voltage controlled oscillator versus time. It is clear based on the steady state signal that the
switching time is about 6.5 µsec which seems to be a verygood value.
Figure11. Input voltage of the VCO
Table 2 shows a comparison of the present studyversus other works. It is clear that the spurs noise of our
design is very small or negligible and can be said that the spectrum is almost free from spurs noise. The phase
noise is equal to -90.4 dBc/Hz at 500 KHz offset frequency, which is an acceptable value compared to other
designs. The switching time of 6.5 µsec at 2.4 GHz, is a very good value for bluetooth applications. Reference
[15] achieves a 2 µsec switching time which is very short time. This is because of high loop filter bandwidth,
but high loop bandwidth causes a high spurs noise in the spectrum output as shown by the relatively lower spurs
noise suppression value of -34 dBc. Compared to other works, in our fractional-N PLL frequency synthesizer
weselected the values of bandwidth and phase margin for loop filter very carefully such that the design offers an
excellent switching time, and without spurs noise in the spectrum output.
Table 2. Summary of current research results versus previous published works on fractional-N PLL frequency synthesizer
Offset frequency
(MHz) 0.5 1 3 10 20
Phase noise
(dBc/Hz)
-90.4 -96.3 -113 -138.6 -153
Parameter/
References
[13] [14] [15] [4] This work
Output
frequency
2.4
GHz
2.4
GHz
2.3
GHz
900
MHz
2.4 GHz
Input
frequency
(MHz)
12 18 40 8 25
Bandwidth
(KHz)
975 100 1000 40 200
Phase
noise
(dBc/Hz)
-121
@ 3
MHz
-92.5
@
500
KHz
-122
@ 3
MHz
-122 @
1 MHz,
-135 @
3 MHz
-90.4 @
500 KHz, -
113 @ 3
MHz
Spurs
noise (dBc)
-70 -51 -34 -96 free
Switching
time (µsec)
N/A 55 2 N/A 6.5
8. Design and Simulation Fractional-N Phase Locked Loop Frequency Synthesizer using Sigma…..
Manuscript id. 151474674 www.ijstre.com Page 37
V.CONCLUSION
This paper illustratesthe design of the fractional-N frequency synthesizer using Sigma-Delta modulation
technique. This technique offers a short switching time and a good noise reduction performance. A fourth order
passive loop filter offers the best suppression to the quantization noise at high frequencies. The design process
of the fourth order passive loop filter is very complicated due to the many factors that must be chosen carefully
to have the best performance. The high order single loop Sigma-Delta modulator is conditionally unstable and
very complicated in the design, therefore the second order is preferred due to the better stability. The simulation
results show that the chosen bandwidth and phase margin yield fast switching time, and the modulator has very
good suppression to the fractional spurs.It can be changing the bandwidth or the phase margin of the loop filter
To improve the proposed design.
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