The document discusses logic circuits and summarizes key concepts including: 1. Karnaugh maps are used to minimize Boolean expressions without using algebra by grouping adjacent 1's and X's. They are useful for expressions with 2-4 variables. 2. Truth tables and sum-of-products (SOP) form are introduced to represent logic expressions. Examples show converting between truth tables, SOP expressions, and logic circuits. 3. A worked example of a logic circuit is presented to detect conditions for an automobile alarm based on door, ignition, and headlight switches. 4. Objectives of an experiment on combinational logic circuits are outlined, including deriving and simplifying logic equations, converting

1. DAY 5

2. Danilo M. Miranda, EcE
Associate Professor I
TUP Taguig Campus

3. …REVIEW…

4. EXAMPLES:
1. Simplify the expression :
y =AB’D + AB’D’
= AB’(D+D’) by Postulate 5 a
= AB’
2. Z = (A’+B) (A+B)
= A’A +A’B + BA +BB by dist. Property
= 0 +A’B + AB + B by Post. 5b : Th. 1b
= B (A’ +A) + B by factoring
= B + B by theorem 1a
Z= B

6. Sum – Of – Products
Form:(SOP)
- each of these SOP expressions
consists of two or more AND
terms (products) that are Ored
together.
Examples:
1. ABC + A’BC’
2. AB= A’BC’ + C’D’ +D
3. A’B +CD’+EF+GK+HL’

7. Product – Of – Sums Form(POS)
- it consists of two or more OR
terms (sums) that are ANDed
together.
Examples:
1. (A + B’ +C) ( A+C)
2.(A+B’)(C’+D)F
3.(A+C)(B+D’)(B’+C)(A+D’+E’)

8. 3. Z = ( A + B’ +C )’
= A’ [ ( B’*C)’]
=A’ [ B’’+C’ ]
= A’ [ B + C’ ]
= A’B + A’C’

10. 4. W= [(A+BC)(D+EF)]’
= (A+BC)’ + (D+EF)’
= A’ (BC)’ + D’ (EF)’
= A’ ( B’+C’) + D’(E’+F’)
=A’B’ +A’C’ +D’E’ +D’F’

12. Seat Work:
1. Out = ABCDE
2. OUT = ABCD

15. UNIVERSALITY OF NAND & NOR GATES

16. TODAY’S TOPIC
K-MAP
WORDED PROBLEMS
LOGIC CIRCUITS
TRUTH TABLE
SOP
POS

17. Karnaugh map
A Karnaugh map (K-map) is a pictorial method used to
minimize Boolean expressions without having to use
Boolean algebra theorems and equation manipulations.
A K-map can be thought of as a special version of a
truth table.
Using a K-map, expressions with two to four variables
are easily minimized. Expressions with five to six
variables are more difficult but achievable, and
expressions with seven or more variables are extremely
difficult (if not impossible) to minimize using a K-map.

18. Forming Minimum Sum-of-Products from K-Map
Step 1:
Choose an element of ON-set not already covered by an implicant
Step 2:
Find "maximal" groupings of 1's and X's adjacent to that element.
Remember to consider top/bottom row, left/right column,
adjacencies. (always a power of 2 number of elements).
Repeat Steps 1 and 2 to find all prime implicants
Step 3:
Revist the 1's elements in the K-map. If covered by single prime
implicant, it is essential, and participates in final cover. The 1's it
covers do not need to be revisited
Step 4:
If there remain 1's not covered by essential prime implicants, then
select the smallest number of prime implicants that cover the
remaining 1's

19. Simplification of Boolean Functions
A. The MAP METHOD
* 2 Variables : A, B
10
A’ B’
10
A B’
10
A’ B
10
A B

20. Example a:

21. Example a:
OUT = A’B’ +A’B
= A’

22. Example B:
OUT = A’B’ + AB

23. 3 VARIABLES:

27. OUT = A’B’C’ + A’B’C + AB’C’ +AB’C
= B’

28. 3 VARIABLES:

30. OUT = A’C’+A’B+AC+BC

39. WORDED PROBLEM:
1.) A 4-bit number is represented
as A3 A2 A1 A0, where A3 A2
A1 and A0 represent the
individual bits with A0 equal to
the LSB. Design a logic circuit
that will produce a HIGH output
whenever the binary number is
greater than 0010 and less than
1000.

43. Seat work :
Figure 2. Shows a diagram for an automobile
alarm circuit used to detect certain
understanding conditions. The three switches
are used to indicate the status of the door by
the driver’s seat, the ignition, and the
headlights, respectively. Design the logic
circuit with these three switches as inputs so
that will be activated whenever either of the
following conditions exists:
* The headlights are on while the ignition is
off.
* The door is open while the ignition is on.

45. LET D = DOOR
I = IGNITION
L = LIGHT

46. 3 VARIABLES:

48. Experiment No. 3
Combinational Logic Circuit
General Objectives:
1. To be able to understand the
basic principles and techniques of
Logic Circuit and Switching
theory and its principles.

49. Specific Objectives:
1. To identify IC Pin Configuration
with the aid of ECG (Data Book).
2. To derive and simplify the problem
to its Logical Equation.
3.To convert the original and
simplified equations to its equivalent
Logic Circuits.

50. 4. To tabulate the equivalent Truth
Table.
5. To simulate and troubleshoot the
derived circuits with the.
6. To double check the logic circuits
using POS (Product of Sum) method.

51. Worded Problem:
Design a control logic circuit for a decision
making system that will satisfy the ffg conditions:
Board members %of company share
A 35%
B 25%
C 20%
D 15%
Requirement:
There will one be 1 output if the total votes with
their share is majority.