ppt on k map comparators

1. Digital Electronics Presentation
K-Maps, Comparators: their function, operation
and application
Group members:
Swati
Swati Sahani
Tharunkumar
Vijay Krishna

2. Agenda
➢ Introduction k-map
➢ Min-term and max-term
➢ Function ( SOP and POS )
➢ Gray code
➢ Formation of groups
➢ Don’t care condition
➢ Implicants , prime implicant and falls implicant
➢ Introduction to comparator and it's operation
➢ Function of comparator
➢ Example of comparators

3. K-MAP
What are K-Maps?
How do K-Maps work?
Benefits of using K-Maps
applications of K-Maps

4. What are K-Maps?
Karnaugh Maps (K-Maps) are a graphical
method used in electronics for simplifying and
optimizing Boolean algebra expressions.
Developed by Maurice Karnaugh in 1953.
K-Maps provide a systematic and visual
approach to simplify logical functions,
particularly in the design of digital circuits.

5. Decimal A B C minterm maxterm Function
Example:
0 0 0 0 _ _ _
A . B . C A+B+C
1
1 0 0 1 _ _
A . B . C
_
A+B+C
0
2 0 1 0 _ _
A . B . C
_
A+B+C
0
3 0 1 1 _
A . B . C
_ _
A+B+C
1
4 1 0 0 _ _
A . B . C
_
A+B+C
1
5 1 0 1 _
A . B . C
_ _
A+B+C
0
6 1 1 0 _
A . B . C
_ _
A+B+C
0
7 1 1 1
A . B . C
_ _ _
A+B+C
1

6. _______
minterm = Maxterm
Standard canonical sop form
_ _ _ _ _ _
F ( A , B, C ) = A B C + A B C + A B C + A B C
= m0 + m3 + m4 + m 7
= Σ m ( 0 , 3 , 4 , 7 )
= Σ ( 0, 3 , 4 , 7 )
Standard canonical pos form
_ _ _ _ _ _
F ( A , B, C ) = ( A+ B+C ) . ( A+B+ C ) . ( A+ B +C) . ( A+B+C )
= πM1 . πM2 .π M5 . πM6
= π M( 1 , 2 , 5 , 6 )
= π ( 1 , 2 , 5 , 6 )

7. Decimal binary Gray code
0 0 0 0 0 0 0
1 0 0 1 0 0 1
2 0 1 0 0 1 1
3 0 1 1 0 1 0
4 1 0 0 1 1 0
5 1 0 1 1 1 1
6 1 1 0 1 0 1
7 1 1 1 1 0 0
Gray code (CYCLIC CODE)
❑ RULE OF MINIMIZATION
Less number of groups and bigger group
(term reduction) (number of variable reduction)
REFLECTING
CODE

8. FORMATION OF GROUPS
8 Groups = 3 variables minimize
4 groups = 2 variables minimize
2 groups = 1 variable minimize
1 groups = 0 variable minimize
00
01
11
10
Unity Haming
distance code
Distance binary Gray code
0 0 0 0 0
1 0 1 0 1
2 1 0 1 1
3 1 1 1 0

9. _ _
C D
00
_
C D
01
C D
11
_
C D
10
_ _
A B
00
1 1 1
_
A B
01
1 1 1
A B
11
1 1 1 1
_
A B
10
1
0 1 3 2
4 5 7 6
14
8
13
12 15
9 11 10
F ( A, B, C, D ) = Σ m ( 0 , 1 , 2 , 4 , 6 , 7 , 9 , 12 , 13 , 14 , 15 0)
_ _ _ _
Ans : A D + BC + AB + B C D

10. _ _
C D
00
_
C D
01
C D
11
_
C D
10
_ _
A B
00
1
_
A B
01
1 1 1
A B
11
1 1 1
_
A B
10
1
0 1 3 2
4 5 7 6
14
8
13
12 15
9 11 10
F ( A , B , C , D ) = Σ m ( 1 , 5 , 6 , 7 , 11 , 12 , 13 , 15 )
_ _ _ _
Ans : A C D + A B C + A B C + A C D

11. DON'T CARE CONDITION
➢ Combination of inputs on which the outputs may OR may not depends are called as
don't care conditions .
Find the minimization Boolean expression for the function given as
F ( A, B , C ) = Σ m ( 0 , 2 , 3 , 4 ) + Σ d ( 1 , 6 , 7 )
_ _
B C
0 0
_
B C
0 1
B C
1 1
_
B C
1 0
1 X 1 1
1 X X
0
_
A
1
A 6
2
7
3
5
1
4
0

12. _ _
C D
00
_
C D
01
C D
11
_
C D
10
_ _
A B
00
1 X 1
_
A B
01
X X 1 1
A B
11
X X 1
_
A B
10
1 X
0 1 3 2
4 5 7 6
14
8
13
12 15
9 11 10
F ( A , B , C , D ) : Σ m ( 0 , 3 , 6 , 7 , 9 , 14 ) + Σ d ( 1 , 4, 5 , 11 , 13 , 15 )
_ _
Ans : A C + D + B C

13. _ _
C D
00
_
C D
01
C D
11
_
C D
10
_
A 0
1 1 1
A 1 1 1
0
5 7 6
1 3 2
4
Implicants , prime implicants , Essential prime
implicant and falls implicants
➢ Implicants (min term)
➢ Prime implicants (no. Of possibility of formation of group)
➢ Essential prime implicants (no. Of term which are independent or maximum one
group )
➢ Falls term ( max term )
_ _ _ _ _ _ _
F ( A , B , C ) : A B C + A B C + A B C + A B C + A B C
Ans :
I = 5
P I = 4
E P I = 2

14. 0
13
12
6
7
5
4
2
3
1
10
11
9
8
14
15
_ _
C D
00
_
C D
01
C D
11
_
C D
10
_ _
A B
00
1
_
A B
01
1 1 1
A B
11
1 1 1
_
A B
10
1
Ans :
I = 8
P I = 5
E p I = 4

15. _ _
C D
00
_
C D
01
C D
11
_
C D
10
_ _
A B
00
1 1
_
A B
01
1 1
A B
11
1 1
_
A B
10
1
0
13
12
6
7
5
4
2
3
1
10
11
9
8
14
15
Ans :
I = 7
P I = 6
E p I = 2

16. Advantages:
K-Maps provide a systematic and visual method
for simplifying Boolean expressions.
They offer a straightforward approach to
minimizing logic circuits, reducing the
complexity of designs.
K-Maps are especially beneficial for educational
purposes, aiding students and engineers in
understanding and optimizing digital logic.

17. Applications:
K-Maps are extensively used in
the design and optimization of
digital circuits, such as
combinational logic circuits.
They are particularly useful
when working with multiple
inputs and complex logical
functions.

18. K Map POS Method
Learn how to simplify digital logic expressions
and identify prime implicants using the K map
POS method.

19. Overview of POS Method:
Step 1
Write the Boolean function in its SOP form.
Step 2
Draw the K map and group the
variables according to their values.
Step 3
Identify the prime implicants by
circling the groups that contain all
the 1's in the function.
Step 4
Write the simplified Boolean
function by combining the
prime implicants.

20. Benefits of K Map POS Method
1
Simplifies
Logic
Expressions
The K map POS
method allows
you to simplify
complex logic
expressions
into their most
basic form,
making it easier
to understand
and work with.
2
Reduces
Number of
Terms
By simplifying
the logic
expression, this
method can
help you reduce
the total
number of
terms needed
to represent the
function.
3
Helps Identify
Prime
Implicants
Using the K
map POS
method, you
can easily
identify and
isolate the
prime
implicants in
the function,
making the
simplification
process much
faster.

21. Steps for using K Map POS Method
1 Grouping Variables in the K
Map
Group the variables in the
K map to form groups of
1's.
2
Writing the Logic Expression
in SOP Form
Write the Boolean
function in its sum-of-
products (SOP) form.
3 Finding the Prime Implicants
Identify the prime
implicants by circling the
groups that contain all
the 1's in the function.
4
Simplifying the Logic
Expression
Write the simplified
Boolean function by
combining the prime
implicants.

22. Example 1: 2-variable K Map POS
Method
Step 1:
Grouping
Variables in the
K Map
Group the
variables
according to
their values.
Step 2: Writing
the Logic
Expression in
SOP Form
The Boolean
function is
ABC + AB'C'.
Step 3: Finding
the Prime
Implicants
The prime
implicants are
A and B'
Step 4: Simplifying the
Logic Expression
The simplified
Boolean
function is A +
B'.

23. Example 2: 3-variable K Map POS
Method
Step 1:
Grouping
Variables in
the K Map
Group the variables
according to their
values:
• Group 1: A'C
• Group 2: AC
• Group 3: AB'C'
• Group 4: AB'C
Step 2:
Writing the
Logic
Expression
in SOP Form
The Boolean
function is AB'C' +
ABC + AB'C + A'C.
Step 3:
Finding the
Prime
Implicants
The prime
implicants are A'C,
B'C, and AB.
Step 4:
Simplifying
the Logic
Expression
The simplified
Boolean function is
A'C + B'C + AB.

24. K-maps for Product-of-
Sum Design
• Product-of-sums design uses the same principles, but applied to the zeros
of the function.

25. Designing with Don't-
Care Values
• In some situations, we don't care about the value of a logic function.
• For example, if we use wxyz to represent a number from 0 to 9, we
need not worry about the function value produced for wxyz =
10...15.
• For these situations, the function can be assigned an output in order
to make the resulting circuit as simple as possible
• Suppose we wish to implement the function
f(wxyz)=Sum(3,5,6,7)and we have the don't-care condition of
d=Sum(10,11,12,13,14,15).

26. K-map for POS (Product of Sums):
1.Create the K-map:
1. For each minterm in the truth table, place a 1 in the corresponding cell of the K-map. Leave cells
corresponding to don't care conditions empty.
2. Arrange the minterms in a way that each cell's binary representation differs by only one bit from its adjacent
cells.
2.Group 1s into maximal groups of 1, 2, 4, 8, etc.:
1. Group adjacent 1s (cells with 1) in powers of 2 (1, 2, 4, 8, etc.).
2. Each group should contain 1, 2, 4, 8, or 16 adjacent cells, and the number of cells in a group should be a
power of 2.
3.Label the Groups:
1. Assign a variable for each group, based on the cells' position. Use the variable for the row and column
values.
4.Write the Product of Sums (POS) Expression:
1. For each group, write a sum term for the variables associated with that group.
2. Combine these terms with an OR operation to get the final POS expression.
5.Simplify the Expression:
1. If possible, simplify the POS expression further by combining common terms.

27. The product-of-sums implementation:

28. Implementation:
1.Write the POS Expression:
POS Expression: A'B + AB’
2.Implement with Logic Gates:
A'B + AB' can be implemented using an AND gate and an OR gate.
POS Implementation
In this implementation:
The NOT gate represents the complement of a variable (A' or B').
The AND gate represents the product (A'B).
Another AND gate represents the product (AB').
The OR gate combines the outputs of the two AND gates.
3.Verify with Truth Table:
Create a truth table for the implemented circuit and compare it with the original truth table to ensure correctness.

29. POS FORM
1. 3 variables K-map
F (P, Q, R) = π(0,3,6,7)
From the lilac group, the terms would be
P Q
If we take the complement of these two
P’ Q’
And then sum up them
(P’ + Q’)
From the blue group, the terms would be
B R
When we take the complement of these terms
B’ R’
And then sum them up
(B’ + R’)
From the red group, the terms would be
P’ Q’ R’
If we take the complement of the two terms
P Q R
And then sum them up
(P + Q + R)
If we take the product of these three terms, then we will get this final expression –
(P’ + Q’) (P’ + R’) (P + Q + R)

30. Conclusion:
Recap of the K Map POS
POS Method:
The K map POS method is a powerful technique for
simplifying Boolean functions and identifying prime
implicants. By following a few simple steps, you can
significantly reduce the complexity of any digital logic
expression.
Importance in Digital Logic
Design:
The K map POS method is a
fundamental tool used in the design
and optimization of digital circuits. It
allows engineers to optimize the
circuit's logic by simplifying complex
Boolean functions.

31. Comparators
• What is Comparator?
It is basically a comparing device used to compare the two binary words.
A digital Comparator is a combinational logic circuit.
It can be constructed using AND, NOR,XOR and NOT gates to compare the digital signals
present at the input terminals and give an output depending upon the condition of those
inputs.
Based on Output, there are two types of Comparators:
1. Identity Comparator(single output)
2. Magnitude Comparator(three Outputs)
Comparators are commonly used in decision – making circuit, voltage level detection etc.

32. IDENTITY COMPARATORS
It is a digital comparator which has single output.
It gives high value only when both binary inputs say A and B are equal (either both are
0 or 1).
Logic diagram: 1 bit comparator
A B A=B
0 0 1
0 1 0
1 0 0
1 1 1
Truth Table

33. MAGNITUDE COMPARATOR
It is most commonly used comparator.
It gives three outputs depending upon the comparison of inputs.
It is used to compare two inputs to know whether the input is less than
(A<B) or equals to (A=B) or greater than (A>B).
Logic Gate Diagram: 1- bit magnitude comparator

34. Truth Table For 1- bit Magnitude
Comparator
A B A<B A=B A>B
0 0 0 1 0
0 1 1 0 0
1 0 0 0 1
1 1 0 1 0

35. 2-bit magnitude comparator
• It is used to compare two binary words consisting of two bits.
Logic Gate Diagram:
Block diagram:

36. Truth table for 2-bit comparator
P1 P0 Q1 Q0 P<Q P=Q P>Q
0 0 0 0 0 1 0
0 0 0 1 1 0 0
0 0 1 0 1 0 0
0 0 1 1 1 0 0
0 1 0 0 0 0 1
0 1 0 1 0 1 0
0 1 1 0 1 0 0
0 1 1 1 1 0 0
1 0 0 0 0 0 1
1 0 0 1 0 0 1
1 0 1 0 0 1 0
1 0 1 1 1 0 0
1 1 0 0 0 0 1
1 1 0 1 0 0 1
1 1 1 0 0 0 1
1 1 1 1 0 1 0

37. 4-Bit Magnitude Comparator
• A 4-bit comparator is a digital circuit that compares two 4-bit binary
numbers and determines their relationship (greater than, less than, or
equal). The primary purpose of a 4-bit comparator is to produce
output signals indicating the result of the comparison.
• The two 4-bit numbers A = A3 A2 A1 A0 and B = B3 B2 B1 B0 where A3
and B3 are the most significant bits.
• Here we use IC – 74LS85.

38. • Block Diagram(IC – 74LS85)
• IC 7485 has three cascading
inputs which allow several
comparators to be cascaded,
by cascading several such
comparators, any number
of bits can be compared.

39. • Logical Diagram

40. • Truth table for 4-bit magnitude comparator.

41. n-Bit Magnitude Comparator
• An n-Bit Magnitude Comparator is a digital circuit that compares two
n-bit binary numbers and determines their relative magnitudes. The
term "n-Bit" signifies that the comparator is designed to handle binary
numbers of any bit-width, making it a versatile component in digital
systems. The primary goal of an n-Bit Magnitude Comparator is to
generate outputs indicating whether one number is greater than, less
than, or equal to the other.

42. • Comparing Two n-Bit Words.

43. Comparator Expansion(Cascading
Comparator)
• In addition, it also has three cascading inputs.
• These inputs provides a means for expanding the comparison
operation by cascading two or more 4-bit comparator.
• To expand the comparator, the A<B, A=B, and A>B outputs of the
lower-order comparator are connected to the corresponding cascading
inputs of the next higher-order comparator.
• The lowest-order comparator must have a HIGH on the A=B, and LOWs
an the A<B and A>B inputs as shown before.
• The comparator on the left is comparing the lower-order 8-bit with the
comparator on the right with higher-order 8-bit.

44. Comparator Expansion(Cascading
Comparator)
• The outputs of the lower-order bits are fed to the cascade inputs of
the lower-order bits are fed to the cascade inputs of the comparator
on the right, which is comparing the high-order bits.
• The outputs of the hight-order comparator are the final outputs that
indicate the result of the 8-bit comparison.

45. Comparison of Two 24-Bit Words

46. Application of comparators
• Comparators are used in CPUs and Microcontrollers.
• These are used in control application in which binary numbers
representing physical variables such as temperature, water level etc.
are compared with a reference value.
• Also used in password verification and biometric application.