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Chp2 introduction to the 68000 microprocessor copy

The document provides an introduction to the 68k microprocessor instruction set. It discusses the different types of instructions including data transfer, arithmetic, logical, and bit manipulation instructions. It describes the various addressing modes used by the 68k including register direct, absolute, PC relative, register indirect, and immediate addressing. Examples are given of instructions like MOVE, ADD, SUB, and MUL using different addressing modes and data sizes. The operation of the instruction cycle is explained, showing the fetch, decode, and execute phases for each instruction.

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Introduction to The 68k  P
68k Instruction Set MOVE. B D0 , D1 Opcode Operand Source Destination Size
Assembly Language Progamming Machine Instruction 0011 0000 0000 0011 Types of instruction i.e. addition or subtraction Data size, byte, word or long word The amount of the word in complete instruction Where the data for an instruction (operand) can find 0011 Op-code 000000 First operand 000111 Second operand
Cycle of Instruction Collection Implement
Cycle of Instruction cont… Collection phase: Fill-in program counter with instruction address Collect instruction from memory, put in the instruction register For control the instruction, clean-up PC for next instruction Implement phase: Count for the operation address Collect operation Do the operation Store the product of operation Back to first step
68K Addressing Modes SR USP SP PC Implied Addressing Implied Register #xxx #1-#8 Immediate Data addressing Immediate Quick Immediate (An) (An)+ -(An) d 16 (An) d 8 (An, Xn) Register Indirect Addressing Register Indirect Postincrement Register Indirect Predecrement Register Indirect Register Indirect with Offset Indexed Register Indirect with offset d 16 (PC) d 8 (PC,Xn) Program Counter Relative Addressing Relative with offset Relative with Index Offset xxx.W xxx.L Absolute Data Addressing Absolute Short Absolute Long Dn An Register Direct Addressing Data Register Direct Address Register Direct Syntax Addressing Modes
Register Direct Addressing Data Register Direct MOVE. B D0,D3
Register Direct Addressing Data Register Direct MOVE. W D0,D3 Cont…
Register Direct Addressing Data Register Direct MOVE. L D0,D3 Cont…
Register Direct Addressing Address Register Direct MOVE A .L A3,A0 Cont…
Register Direct Addressing Address Register Direct MOVE A A3,A0 Cont…
Absolute Data Addressing Absolute Long Mode CLR. B $10000 13 55 010002 13 55 010002 51 00 010000  51 42 010000
Absolute Data Addressing Absolute Long Mode CLR. W $10000 Cont… 13 55 010002 13 55 010002 00 00 010000  51 42 010000
Absolute Data Addressing Absolute Long Mode CLR. L $10000 Cont… 00 00 010002 13 55 010002 00 00 010000  51 42 010000
Absolute Data Addressing Absolute Short Mode CLR. B $1000 Cont… 13 55 01002 13 55 01002 51 00 01000  51 42 01000
Absolute Short vs Absolute Long Absolute short: 16-bit (0000~7FFF, 8000~FFFF) Sign extend the 16-bit value into 24-bit (000000~007FFF, FF8000~FFFFFF) Absolute Long: 24-bit(000000~FFFFFF) No sign extension Cont…
PC Relative Addressing PC Relative with Offset MOVE.W $1200(PC) , D5 Assume the instruction is located at $122000 Effective address: $00122002 + $00001200 = $00123202
PC Relative Addressing PC Relative with Offset Cont…
PC Relative Addressing PC Relative with Index and Offset MOVE.L -20(PC,A2.L) ,D5 Assume the instruction is located at $00010200 Effective address: $00010202 + $00020030 + $FFFFFF EC = $0003021E Cont…
PC Relative Addressing PC Relative with Index and Offset Cont…
Register Indirect Addressing MOVE.L D0, ( A0 )
Address Register Indirect Addressing Post-Increment MOVE.W ( A5 )+ ,D0
Address Register Indirect Addressing Predecrement MOVE.W D0, -( A6 )
Address Register Indirect Addressing With Offset MOVE.W 6( A0 ) ,D0
Address Register Indirect Addressing with Index & Offset MOVE.W $10(A0,D0.L) , A1
Immediate Addressing Immediate MOVE.L # $1FFFF , D0 Before:D0 = 12345678 After: D0 = 0001FFFF Note: $ = value for hexadecimal @ = value for octal % = value for binary & or blank = decimal ‘ AB’ = character ASCII
Immediate Addressing Quick Immediate 1. MOVEQ # $2C, D3 Before: D3 = 1234562C After: D3 = 000000 2C 2. MOVEQ # $8F, D3 Before: D3 = 1234568F After: D3 = FFFFFF 8F Cont…
Implied Addressing ANDI #$27, SR MOVE CCR, CODES TRAPV
68K Instruction Set Data transfer Arithmetic Logical Shift and rotate Bit manipulation BCD operations Program control System control
68K Instruction Set Cont… Data Transfer Instructions
68K Instruction Set Cont… Integer Arithmetic Instructions
68K Instruction Set Cont… Compare and Test Instructions
68K Instruction Set Cont… Logic Instructions
68K Instruction Set Cont… Shift Instructions
68K Instruction Set Cont… Rotate Instructions
68K Instruction Set Cont… Bit-Manipulation Instructions
68K Instruction Set Cont… Subroutine Control Instructions
68K Instruction Set Cont… Binary-Coded Decimal Arithmetic Instructions
Data Transfer Instruction Take Data from Memory – Operation Load MOVE. W $10000, D1 51 42 ED FE D1 EF BE ED FE D1 13 55 010002 13 55 010002 51 42 010000 51 42 010000
Data Transfer Instruction Take Data from Memory – Operation Load MOVE. L $1000, D1 Cont… 13 55 51 42 D1 EF BE ED FE D1 13 55 01002 13 55 01002 51 42 01000 51 42 01000
Data Transfer Instruction Take Data from Memory – Operation Load MOVE. B $1000, D1 Cont… 42 BE ED FE D1 EF BE ED FE D1 13 55 01002 13 55 01002 51 42 01000 51 42 01000
Data Transfer Instruction Store Data into Memory – Operation Save MOVE. W D1, $1000 Cont… EF BE ED FE D1 EF BE ED FE D1 13 55 01002 13 55 01002 EF BE 01000 51 42 01000
Data Transfer Instruction Store Data into Memory – Operation Save MOVE. L D1, $1000 Cont… EF BE ED FE D1 EF BE ED FE D1 EF BE 01002 13 55 01002 ED FE 01000 51 42 01000
Data Transfer Instruction Store Data into Memory – Operation Save MOVE. B D1, $1000 Cont… EF BE ED FE D1 EF BE ED FE D1 13 55 01002 13 55 01002 51 EF 01000 51 42 01000
Data Transfer Instruction Moving Memory Data To Memory MOVE. W $1000, $1006 Cont… 51 42 001006 AB 90 001006 02 01 001004 02 01 001004 13 55 001002 13 55 001002 51 42 001000 51 42 001000
Data Transfer Instruction Moving Memory Data To Memory MOVE. B $1000, $1006 Cont… AB 42 001006 AB 90 001006 02 01 001004 02 01 001004 13 55 001002 13 55 001002 51 42 001000 51 42 001000
Data Transfer Instruction Immediate Mode MOVE. B #$F1, D1 Cont… MOVE.B D1, #$F1 F1 BE ED FE D1 EF BE ED FE D1
Data Transfer Instruction MOVEQ Instruction MOVEQ #$F1, D1 Cont… F1 FF FF FF D1 EF BE ED FE D1
Data Transfer Instruction Fill up Memory MOVE.B #$F1, $1000 Cont… AB 90 001006 AB 90 001006 02 01 001004 02 01 001004 13 55 001002 13 55 001002 51 F1 001000 51 42 001000
Data Transfer Instruction EXG Instruction EXG D1, D5 Cont… 30 20 12 12 D5 7C 48 FF 00 D5 7C 48 FF 00 D1 30 20 12 12 D1
Data Transfer Instruction SWAP Instruction SWAP D1 Cont… 34 12 30 20 D1 30 20 34 12 D1
Data Transfer Instruction LEA Instruction – Load Effective Address LEA $00200001, A0 Cont… Similar to: MOVEA.L #00200001, A0 01 00 20 00 A0 02 70 12 00 A0
Data Transfer Instruction LEA Instruction – Load Effective Address LEA (A1), A0 Cont… Similar to: MOVEA.L A1, A0 FF FF 10 00 A1 FF FF 10 00 A1 FF FF 10 00 A0 02 70 12 00 A0
Data Transfer Instruction LEA Instruction – Load Effective Address LEA 8(A0), A1 Cont… 0A 70 12 00 A1 00 40 00 00 A1 02 70 12 00 A0 02 70 12 00 A0
Data Transfer Instruction LEA Instruction – Load Effective Address LEA 8(A0, D4.L), A1 Cont… 0A 90 12 00 A1 00 40 00 00 A1 02 70 12 00 A0 02 70 12 00 A0 00 20 00 00 D4 00 20 00 00 D4
Arithmetic Instruction ADD Instruction Destination + Source  Destination ADD.W D1, D3 ADD.W $1000,$2000 ADD.W $2000, D3 9B 57 CC FD D3 23 01 CC FD D3 78 56 34 12 D1 78 56 34 12 D1
Arithmetic Instruction Data Addition in Memory Problem: A = B + C, where A, B & C are memory Solution: - Copy the first word (B) from memory to register - Add the second word (C) to register - Copy the addition product to the memory Program: MOVE.W B,D1 ; Take B ADD.W C,D1 ; Add with C MOVE.W D1,A ; Store product in A Cont…
Arithmetic Instruction Carry Production (0~255) – Unsigned integers Cont… ADD.B D0, D3 No carry, C = 0 9-bit after addition, C = 1
Arithmetic Instruction Overflow Production (-128~+127) – signed integers Cont…
Arithmetic Instruction ADD.B D0, D3 V = 0, C = 0 V = 0, C = 1 Cont… V = 1, C = 0 V = 1, C = 1
Arithmetic Instruction ADDA Instruction Data size: W, L ADDA.L #$70, A1 Cont… Use ADDQ.L #$1, A1 for value 1~8, it is faster than ADDA.L #$1, A1 A0 20 00 00 A1 30 20 00 00 A1
Arithmetic Instruction SUBA Instruction Data size: W, L SUBA.L #$70,A1 Cont… Use SUBQ.L #$1, A1 for value 1~8, it is faster than SUBA.L #$1, A1 C0 1F 00 00 A1 30 20 00 00 A1
Arithmetic Instruction ADDQ Instruction ADDQ.W #3,D6 Cont… 1~8 only 02 57 34 12 D6 FF 56 34 12 D6
Arithmetic Instruction ADDQ vs MOVEQ Cont… L only B, W, L Data Size Dn only Any Destination -128…+127 1..8 Source MOVEQ ADDQ
Arithmetic Instruction SUB Instruction Destination - Source  Destination SUB.B D3, D1 Cont… SUB.W $1000, $2000 23 01 CC FD D3 23 01 CC FD D3 55 56 34 12 D1 78 56 34 12 D1
Arithmetic Instruction The Effect for V Flag after ADD/SUB ADD S, D Cont… V=0 V=1 Negative Positive Negative Negative V=0 V=1 Positive Negative Positive Positive Nothing happen (always V=0) Any Positive Negative Nothing happen (always V=0) Any Negative Positive Overflow Answer (d) d s
Arithmetic Instruction The Effect for V Flag after ADD/SUB SUB S, D Cont… V=0 V=1 Negative Positive Negative Positive V=0 V=1 Positive Negative Positive Negative Nothing happen (always V=0) Any Negative Negative Nothing happen (always V=0) Any Positive Positive Overflow Answer (d) d s
Arithmetic Instruction The Effect for Flag after SUB C = Set; 2 unsigned values V = Set; 2 signed values Z = Set; product is 0 N = MSB X = C Cont…
Arithmetic Instruction The Effect for Flag after SUB SUB.W D1,D0 ;D0  D0 – D1 Cont… D0 before SUB D1 before SUB D1 before SUB X N Z V C After instruction 1 1 0 1 1 00 E0 00 00 D0 00 90 00 00 D1 00 70 00 00 D0 0 1 0 0 0 00 20 00 00 D0 00 70 00 00 D1 00 90 00 00 D0 1 0 0 1 1 00 FD 00 00 D0 00 03 00 00 D1 00 00 00 00 D0 0 0 0 1 0 55 AA 00 00 D0 AA 55 00 00 D1 FF FF 00 00 D0 0 0 1 0 0 00 00 00 00 D0 40 00 00 00 D1 40 00 00 00 D0 0 0 0 0 0 3E 30 00 00 D0 02 00 00 00 D1 40 30 00 00 D0
Arithmetic Instruction SUBQ Instruction SUBQ.W #7,D6 Cont… 1~8 only F8 56 34 12 D6 FF 56 34 12 D6
Arithmetic Instruction SUBQ vs MOVEQ Cont… L only B, W, L Data Size Dn only Any Destination -128…+127 1..8 Source MOVEQ SUBQ
Arithmetic Instruction Multiplication Instruction 1. Unsigned number MULU.W source, Dn 2. Signed number MULS.W source, Dn Cont… Note: Source: 16-bit of any address mode Both operand: 32-bit data register Multiply product: 32-bit stores in destination data register
Arithmetic Instruction MULU 1. Multiply 256 with 2 MOVE.W #256, D3 MULU.W #2, D3 Cont… 16-bit 32-bit 00 02 00 00 D3 00 01 CC FD D3
Arithmetic Instruction MULU 2. Multiply #$FFFF with #$FFFF MULU.W #$FFFF, D3 Cont… Note: FFFF = 65535 65535 * 65535 = 4294836225 = FFFE0001 01 00 FE FF D3 FF FF CC FD D3
Arithmetic Instruction MULS Multiply #$FFFF with #$FFFF MULS.W #-1, D3 Cont… Note: D3 = -1 (-1) * (-1) = 1 01 00 00 00 D3 FF FF CC FD D3
Arithmetic Instruction MULS & MULU Cont… MULS XX, D0 D0=000001E0 (3 x 160 = 480 10 ) MULU XX, D0 D0=000001E0 (3 x 160 = 480 10 ) MULS XX, D1 D1=FFFFFD00 (3 x (-256) = -768 10 ) MULU XX, D1 D1=0002FD00 (3x 65280 = 195840 10 ) MULS YY, D1 D1=00500000 (-20480 x (-256) = 5242880 10 ) MULU YY, D1 D1=AF500000 (45056 x 65280 = 2941255680 10 ) -256 65280 FF00 Register D1 160 160 00A0 Register D0 -20480 45056 B000 Location YY 3 3 0003 Location XX As signed decimal As unsigned decimal Content in hex
Arithmetic Instruction Division Instruction 1. Unsigned number DIVU.W source, Dn 2. Signed number DIVS.W source, Dn Cont… Note: Source: 16-bit of any address mode Both operand: 32-bit data register Division product: lower word destination register Remainder: upper word destination register
Arithmetic Instruction Division Instruction Example 1: DIVU.W D0, D3 Cont… 00 10 01 00 D5 01 00 10 00 D3 00 01 CC FE D0 00 01 CC FE D0 Remainder Quotient
Arithmetic Instruction Division Instruction Example 2: (Overflow) MOVE.L #$40000, D3 DIVU.W #2, D3 Result D3 = 100 0000 0000 0000 0000 (19-bit) Destination can hold 16-bit data only Operand remains unchanged and a division overflow sets the V = 1 Cont…
Arithmetic Instruction Division Instruction Example 3: (Case divide with zero) MOVE.L #$122, D3 CLR D0 DIV D0, D3 Cont…
Arithmetic Instruction Division Instruction Example 3: (Case divide with zero) Cont… Decimal -512 FFFFFE00 Register D1 Decimal 776 00000308 Register D0 Unsigned decimal 65280 FF00 Location ZZ Decimal –82 FFAE Location YY Decimal 18 0012 Location XX Decimal Content in hex
Arithmetic Instruction Division Instruction Example 3: (Case divide with zero) Cont… 65024 65792 FFFFFE00 DIVU ZZ,D1 308 0 03080000 DIVU ZZ,D0 -20 6 FFEC0006 DIVS YY,D1 38 -9 0026FFF7 DIVS YY,D0 Decimal –8 Decimal -28 D1=FFF8FFE4 DIVS XX,D1 Decimal 2 Decimal 43 D0=0002002B DIVU XX,D0 Remainder Quotient Result in hex Instruction
Arithmetic Instruction NEG Instruction (Negate) Form 2’s complement X  0 - X NEG.W D5 Cont… 10 FF 67 34 D5 F0 00 67 34 D5
Arithmetic Instruction EXT Instruction (Sign Extend) Convert byte @ word operand to word @ longword by extending the sign bit of the operand EXT. W D5 Cont… 65 00 27 34 D5 65 20 27 34 D5 F0 FF 67 34 D5 F0 00 67 34 D5
Arithmetic Instruction EXT Instruction (Sign Extend) EXT. L D5 Cont… 65 99 FF FF D5 65 99 27 34 D5 F0 30 00 00 D5 F0 30 67 34 D5
Practical Example Write a sequence of program to compute X = 5 * Y + Z/W where Y, Z and W are 16-bit signed integers and the result is stored as longword X. Solution: MOVE.W Y, D0 MULS #5, D0 MOVE.W Z, D1 EXT.L D1 DIVS W, D1 EXT.L D1 ADD.L D1, D0 MOVE.L D0, X FFFFFE00 Register D1 00000308 Register D0 FF00 Location Z FFAE Location Y 0012 Location X As Hexadecimal Location and register
Compare & Test Instruction Compare Instruction – CMP CMP.W D1, D0 Initial value 1 0 0 1 0 2000 00 70 20 01 D1 00 90 20 01 D0 1 1 0 1 1 E000 00 90 20 01 D1 00 70 20 01 D0 1 1 0 0 1 F000 00 20 20 01 D1 00 10 20 01 D0 1 1 0 0 0 FFFF 00 00 20 01 D1 FF FF 20 01 D0 1 0 0 0 1 0001 FF FF 20 01 D1 00 00 20 01 D0 1 1 0 0 1 FFFF 41 30 20 01 D1 40 30 20 01 D0 1 0 0 0 0 0001 40 30 20 01 D1 41 30 20 01 D0 1 0 1 0 0 0000 40 30 20 01 D1 40 30 20 01 D0 X N Z V C 1 1 1 1 1 D0-D1
Logical Instruction 1 0 1 0 1 1 0 0 0 1 1 0 0 1 1 1 0 0 0 1 0 1 0 1 0 0 1 1  B  A A  B A  B A  B B A
Logical Instruction AND.s <sea>, <dea> Either one is Dn operand ANDI.s #data, <dea> The 1 st immediate operand OR.s <sea>, <dea> Either one is Dn operand ORI.s #data, <dea> The 1 st immediate operand EOR.s <sea>, <dea> Either one is Dn operand EORI.s #data, <dea> The 1 st immediate operand NOT.s <ea> Cont…
Logical Instruction AND Instruction To clear more than 1 bit in operand ADNI.L #$0F, D0 If D0 = $0000B2DA Cont…  D0 = $0000000A 1010 0000 0000 0000 0000 0000 0000 0000 A  B 1111 0000 0000 0000 0000 0000 0000 0000 $0F 1010 1101 0010 1011 0000 0000 0000 0000 D0
Logical Instruction OR Instruction To set more than 1 bit in operand ORI.W #$00E0, D0 If D0 = $A22D Cont…  D0 = $A2ED 1101 1110 0010 1010 A  B 0000 1110 0000 0000 $E0 1101 0010 0010 1010 D0
Logical Instruction EOR Instruction To invert more than 1 bit in operand EORI.W #$00FF, D0 If D0 = $A22D Cont…  D0 = $A2D2 0010 1101 0010 1010 A  B 1111 1111 0000 0000 $FF 1101 0010 0010 1010 D0
Logical Instruction NOT Instruction To get 1’s complement of the operand NOT.B D0 If D0 = $A22D Cont…  D0 = $A2D2 0010 1101 0010 1010  D0.B 1111 1111 0000 0000 D0.B
Shift Instruction 4 instructions of shift operations: ASL (arithmetic shift left) ASR (arithmetic shift right) LSL (logical shift left) LSR (logical shift right) Size: B, W, L Affected flag: X & C = depend to the bit shift out N & Z = depend to the product V = 1 if sign operand changes by shifting, but 0 for rotate
Shift Instruction Arithmetic Shift Instruction Example: ASR.B #2, D1 Cont… (-4) (-16) FC 56 34 12 D1 F0 56 34 12 D1
Shift Instruction Logical Shift Instruction Unsigned value Example: LSR.B #2, D1 Cont… (60) (240) 3C 56 34 12 D1 F0 56 34 12 D1 0
Rotate Instruction 4 instructions of rotate operations: ROL (rotate left) ROR (rotate right) ROXL (rotate left through X flag) ROXR (rotate right through X flag) Size: B, W, L Affected flag: X & C = depend to the bit shift out N & Z = depend to the product V = 1 if sign operand changes by shifting, but 0 for rotate
Rotate Instruction Example: ROR.B #2, D1 Cont… (01101000) (10100001) 68 56 34 12 D1 A1 56 34 12 D1
Rotate Instruction Rotate Instruction through X Example: ROXR.B #2, D1 Cont… (10101000) (10100001) A8 56 34 12 D1 A1 56 34 12 D1
Example Running light in address $80000 MOVE.B #1,D0 REPEAT MOVE.B D0,$800000 JSR DELAY ;Delay ROL.B #1,D0 BRA REPEAT
Bit Manipulation Instruction Test the specified bit in the destination Data size = B or only 1. The bit manipulation instruction included: a. BCHG (bit test and change) instruction b. BCLR (bit test and clear) instruction c. BSET (bit test and set) instruction d. BTST (bit test) instruction
Bit Manipulation Instruction Example 1: In address $FF8000 contains $AA. What is the result after BTST.B #3, $FF8000? Solution: ($FF8000) = 10101010 2 where the 3 rd bit is 1. Therefore Z = 0 Cont…
Bit Manipulation Instruction Example 2: Data register D5 contains 2C3459A7. What is the state of the Z flag and what are the contents of D5 after BCHG #6, D5? Solution: lower byte of D5 = 10100111 2 . Bit 6, 1< 0 >100111, is a 0. This will set the Z flag & complement bit 6 . This result in D5 = 2C3459 E 7 16 . Cont…
Bit Manipulation Instruction Example 3: Data registers D6 and D7 contain 0000000C and 75793290, respectively. What is the result of BCLR D6, D7? Solution: Register D6 specifies that the 12 th bit position 001< 1 >001010010000) should be tested and cleared. Since the 12 th bit is a 1, Z = 0 bit 12 of D7 will be cleared D7 = 7579 2 290. Cont…
Bit Manipulation Instruction Example 4: What is the result of BSET #2,(A3)? Solution: The bit in position 2 of the memory location pointed to by A3 is tested and then set. Cont…
Subroutine Control Instruction Flow Chart Symbol
Subroutine Control Instruction Program Control Structure Cont…
Subroutine Control Instruction Jump Instruction – JMP Unconditional transfer to target destination PC  effective address JMP <ea> Type of effective address: a. Absolute short b. Absolute long c. Address register indirect Cont…
Subroutine Control Instruction Jump Instruction – JMP JMP START ; START = $1000 JMP $FF8000 Cont… 0100 1110 1111 1000 0001 0000 0000 0000 0100 1110 1111 1001 0000 0000 1111 1111 1000 0000 0000 0000
Subroutine Control Instruction Bcc (branch condition) Instruction Bcc <ea> Cont… C+Z=1 U Lower than or Same BLS C+Z=0 U Higher BHI Z+(N  V)=0 S Less than or Equal BLE N  V=0 S Greater than or Equal BGE N  V=1 S Less Than BLT Z+(N  V)=0 S GreaTer than BGT V=0 S oVerflow Clear BVC V=1 S oVerflow Set BVS C=0 U Carry Clear/Higher or Same BCC/HS C=1 U Carry Set/LOwer BCS/LO N=0 U Plus BPL N=1 U Minus BMI Z=0 U Not Equal to zero BNE Z=1 U EQual to zero BEQ If the test is true Arithmetic Meaning Instruction
Subroutine Control Instruction Branch Always Instruction - BRA PC  PC + offset BRA.s <ea> Short branch: -128  PC  +127 Syntax: BRA.S Long branch: -32k  PC  32k Syntax: BRA.L Cont…
Subroutine Control Instruction Control Constructions 1. IF condition THEN action 1 ; 2. IF condition THEN action 1 ELSE action 2 ; 3. FOR counter = initial TO final value DO action 1 ; 4. REPEAT action1 UNTIL condition ; Cont… 5. WHILE condition DO action 1 ; 6. CASE selector OF action 1 , action 2 , . . action N ;
Subroutine Control Instruction Example for IF - THEN IF A=10 THEN Action 1 CMPI.W #10, VARA BNE NEXT . . . NEXT Cont… Action 1 F T
Subroutine Control Instruction Example for IF – THEN – ELSE IF A<=0 THEN Action 1; ELSE Action 2 TST.W VARA BLE NEXT1 . . BRA NEXT NEXT1 . . NEXT Cont… Action 1 Action 2
Subroutine Control Instruction Example for FOR LOOP FOR I=1 TO 10 DO Action 1 MOVE.W #9, D7 LOOP . . . DBF D7, LOOP Cont… Action 1
Subroutine Control Instruction Example for REPEAT – UNTIL REPEAT Action 1 UNTIL A=0 or maximum count is reached MOVE.W LIMIT,D7 SUBQ.W #1, D7 LOOP . . . TST.W VARA DBNE D7, LOOP Cont… Action 1
Subroutine Control Instruction Example for WHILE – DO WHILE A<=10 and maximum count is not reached DO Action 1 MOVE.W LIMIT, D7 AGAIN CMPI.W #10, VARA DBGT D7, LOOP LOOP . . . BRA AGAIN NEXT . . . Cont… Action 1 Action 2
BCD (Binary Coded Decimal) Instruction Each BCD byte contents 2 digit of 4-bit BCD. Each BCD instruction involve in X bit. Z bit is changed if the product is not zero. Before doing the first BCD operation, it have to start with X=0 and Z=1. Syntax: ABCD Dx,Dy (source) 10 + (destination) 10 + X  destination ABCD- (Ay)-(Ax) NBCD <ea> 0 – (source) 10 – X  destination SBCD Dx,Dy (destination) 10 - (source) 10 - X  destination
BCD (Binary Coded Decimal) Instruction ABCD and SBCD Instructions Example 1: Add BCD number in D0 to D1. MOVE #4, CCR ; x=0 and z=1 ABCD D0, D1 Example 2: Subtract BCD number in D0 from D1 MOVE #4, CCR ; x=0 and z=1 SBCD D0, D1 Cont…
BCD (Binary Coded Decimal) Instruction BCD Instruction Addition for 2 BCD number 8 bit (byte). MOVE #4,CCR ;x=0 and z=1 ABCD -(A0),-(A1) ABCD -(A0),-(A1) ABCD -(A0),-(A1) ABCD -(A0),-(A1) Cont…  A0 before addition Lower Byte Lower Middle Upper Middle Upper Byte  A0 after addition  A1 before addition Lower Byte Lower Middle Upper Middle Upper Byte  A1 after addition Destination Source
BCD (Binary Coded Decimal) Instruction NBCD Instruction Use 9’s @ 10’s complement notation to represent a negative BCD number Example 1: What is the 10s complement for fill-in D0. Let say D0 = 23. MOVE #0,CCR NBCD D0 NBCD operation: 100 (0 borrow 1) Original D0: -23 X bit: - 0 Product: 77 Cont…
BCD (Binary Coded Decimal) Instruction NBCD Instruction Example 2: What is the 9s complement for fill-in D0. Let say D0 = 23. MOVE #$10,CCR NBCD D0 NBCD operation : 100 (0 borrow 1) Original D0 : -23 X bit: - 1 Product : 76 Cont…
Stack and Subroutine Stack Data structure that is used to save and restore information in a last-in, first-out (LIFO) fashion. Register A7 is implicitly used as the stack pointer. Push (save): MOVE source, -(SP) or MOVE.L source, -(SP) Pop (retrieve): MOVE (SP)+, destination or MOVE.L (SP)+, destination
Stack and Subroutine Stack Cont…
Stack and Subroutine Stack STACKA DS.W 50 MOVEA.L #STACKA + 100, A2 MOVE.L D1, -(A2) MOVE.W VAR, -(A2) MOVE.W #$25, -(A2) MOVE.L (A2)+, D2 MOVE.L (A2)+, D3 Cont…
Stack and Subroutine Stack Cont…
Subroutine
Subroutine Subroutine Concept A program structure where one part of the program is called the main program. In addition to this, a smaller segment attached to the main program, known as a subroutine. The subroutine is written to provide a function that must be performed at various points in the main program. A return instruction must be included at the end of the subroutine to initiate the return sequence to the main program environment. The instructions provided to transfer control from the main program to a subroutine and return control back to the main program are called subroutine-handling instructions. Cont…
Subroutine Subroutine Control Instructions – JSR, BSR, RTS & RTR Cont…
Interrupt An external event which informs the CPU that a device needs its service. Interrupt Service Routine (ISR): a. a program which associates with interrupt. b. also called the interrupt handler c. there are 4 bytes of memory allocated as interrupt vector table. d. handled in the supervisor mode, S = 1.
Interrupt Example 1: Calculate the sum of 10 numbers in the address memory $2000. Cont… extra

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Chp2 introduction to the 68000 microprocessor copy

  • 1.
  • 2.
    68k Instruction SetMOVE. B D0 , D1 Opcode Operand Source Destination Size
  • 3.
    Assembly Language ProgammingMachine Instruction 0011 0000 0000 0011 Types of instruction i.e. addition or subtraction Data size, byte, word or long word The amount of the word in complete instruction Where the data for an instruction (operand) can find 0011 Op-code 000000 First operand 000111 Second operand
  • 4.
    Cycle of InstructionCollection Implement
  • 5.
    Cycle of Instruction cont… Collection phase: Fill-in program counter with instruction address Collect instruction from memory, put in the instruction register For control the instruction, clean-up PC for next instruction Implement phase: Count for the operation address Collect operation Do the operation Store the product of operation Back to first step
  • 6.
    68K Addressing ModesSR USP SP PC Implied Addressing Implied Register #xxx #1-#8 Immediate Data addressing Immediate Quick Immediate (An) (An)+ -(An) d 16 (An) d 8 (An, Xn) Register Indirect Addressing Register Indirect Postincrement Register Indirect Predecrement Register Indirect Register Indirect with Offset Indexed Register Indirect with offset d 16 (PC) d 8 (PC,Xn) Program Counter Relative Addressing Relative with offset Relative with Index Offset xxx.W xxx.L Absolute Data Addressing Absolute Short Absolute Long Dn An Register Direct Addressing Data Register Direct Address Register Direct Syntax Addressing Modes
  • 7.
    Register Direct AddressingData Register Direct MOVE. B D0,D3
  • 8.
    Register Direct AddressingData Register Direct MOVE. W D0,D3 Cont…
  • 9.
    Register Direct AddressingData Register Direct MOVE. L D0,D3 Cont…
  • 10.
    Register Direct AddressingAddress Register Direct MOVE A .L A3,A0 Cont…
  • 11.
    Register Direct AddressingAddress Register Direct MOVE A A3,A0 Cont…
  • 12.
    Absolute Data AddressingAbsolute Long Mode CLR. B $10000 13 55 010002 13 55 010002 51 00 010000  51 42 010000
  • 13.
    Absolute Data AddressingAbsolute Long Mode CLR. W $10000 Cont… 13 55 010002 13 55 010002 00 00 010000  51 42 010000
  • 14.
    Absolute Data AddressingAbsolute Long Mode CLR. L $10000 Cont… 00 00 010002 13 55 010002 00 00 010000  51 42 010000
  • 15.
    Absolute Data AddressingAbsolute Short Mode CLR. B $1000 Cont… 13 55 01002 13 55 01002 51 00 01000  51 42 01000
  • 16.
    Absolute Short vs Absolute Long Absolute short: 16-bit (0000~7FFF, 8000~FFFF) Sign extend the 16-bit value into 24-bit (000000~007FFF, FF8000~FFFFFF) Absolute Long: 24-bit(000000~FFFFFF) No sign extension Cont…
  • 17.
    PC Relative AddressingPC Relative with Offset MOVE.W $1200(PC) , D5 Assume the instruction is located at $122000 Effective address: $00122002 + $00001200 = $00123202
  • 18.
    PC Relative AddressingPC Relative with Offset Cont…
  • 19.
    PC Relative AddressingPC Relative with Index and Offset MOVE.L -20(PC,A2.L) ,D5 Assume the instruction is located at $00010200 Effective address: $00010202 + $00020030 + $FFFFFF EC = $0003021E Cont…
  • 20.
    PC Relative AddressingPC Relative with Index and Offset Cont…
  • 21.
  • 22.
    Address Register IndirectAddressing Post-Increment MOVE.W ( A5 )+ ,D0
  • 23.
    Address Register IndirectAddressing Predecrement MOVE.W D0, -( A6 )
  • 24.
    Address Register IndirectAddressing With Offset MOVE.W 6( A0 ) ,D0
  • 25.
    Address Register IndirectAddressing with Index & Offset MOVE.W $10(A0,D0.L) , A1
  • 26.
    Immediate Addressing ImmediateMOVE.L # $1FFFF , D0 Before:D0 = 12345678 After: D0 = 0001FFFF Note: $ = value for hexadecimal @ = value for octal % = value for binary & or blank = decimal ‘ AB’ = character ASCII
  • 27.
    Immediate Addressing QuickImmediate 1. MOVEQ # $2C, D3 Before: D3 = 1234562C After: D3 = 000000 2C 2. MOVEQ # $8F, D3 Before: D3 = 1234568F After: D3 = FFFFFF 8F Cont…
  • 28.
    Implied Addressing ANDI #$27, SR MOVE CCR, CODES TRAPV
  • 29.
    68K Instruction SetData transfer Arithmetic Logical Shift and rotate Bit manipulation BCD operations Program control System control
  • 30.
    68K Instruction SetCont… Data Transfer Instructions
  • 31.
    68K Instruction SetCont… Integer Arithmetic Instructions
  • 32.
    68K Instruction SetCont… Compare and Test Instructions
  • 33.
    68K Instruction SetCont… Logic Instructions
  • 34.
    68K Instruction SetCont… Shift Instructions
  • 35.
    68K Instruction SetCont… Rotate Instructions
  • 36.
    68K Instruction SetCont… Bit-Manipulation Instructions
  • 37.
    68K Instruction SetCont… Subroutine Control Instructions
  • 38.
    68K Instruction SetCont… Binary-Coded Decimal Arithmetic Instructions
  • 39.
    Data Transfer InstructionTake Data from Memory – Operation Load MOVE. W $10000, D1 51 42 ED FE D1 EF BE ED FE D1 13 55 010002 13 55 010002 51 42 010000 51 42 010000
  • 40.
    Data Transfer InstructionTake Data from Memory – Operation Load MOVE. L $1000, D1 Cont… 13 55 51 42 D1 EF BE ED FE D1 13 55 01002 13 55 01002 51 42 01000 51 42 01000
  • 41.
    Data Transfer InstructionTake Data from Memory – Operation Load MOVE. B $1000, D1 Cont… 42 BE ED FE D1 EF BE ED FE D1 13 55 01002 13 55 01002 51 42 01000 51 42 01000
  • 42.
    Data Transfer InstructionStore Data into Memory – Operation Save MOVE. W D1, $1000 Cont… EF BE ED FE D1 EF BE ED FE D1 13 55 01002 13 55 01002 EF BE 01000 51 42 01000
  • 43.
    Data Transfer InstructionStore Data into Memory – Operation Save MOVE. L D1, $1000 Cont… EF BE ED FE D1 EF BE ED FE D1 EF BE 01002 13 55 01002 ED FE 01000 51 42 01000
  • 44.
    Data Transfer InstructionStore Data into Memory – Operation Save MOVE. B D1, $1000 Cont… EF BE ED FE D1 EF BE ED FE D1 13 55 01002 13 55 01002 51 EF 01000 51 42 01000
  • 45.
    Data Transfer InstructionMoving Memory Data To Memory MOVE. W $1000, $1006 Cont… 51 42 001006 AB 90 001006 02 01 001004 02 01 001004 13 55 001002 13 55 001002 51 42 001000 51 42 001000
  • 46.
    Data Transfer InstructionMoving Memory Data To Memory MOVE. B $1000, $1006 Cont… AB 42 001006 AB 90 001006 02 01 001004 02 01 001004 13 55 001002 13 55 001002 51 42 001000 51 42 001000
  • 47.
    Data Transfer InstructionImmediate Mode MOVE. B #$F1, D1 Cont… MOVE.B D1, #$F1 F1 BE ED FE D1 EF BE ED FE D1
  • 48.
    Data Transfer InstructionMOVEQ Instruction MOVEQ #$F1, D1 Cont… F1 FF FF FF D1 EF BE ED FE D1
  • 49.
    Data Transfer InstructionFill up Memory MOVE.B #$F1, $1000 Cont… AB 90 001006 AB 90 001006 02 01 001004 02 01 001004 13 55 001002 13 55 001002 51 F1 001000 51 42 001000
  • 50.
    Data Transfer InstructionEXG Instruction EXG D1, D5 Cont… 30 20 12 12 D5 7C 48 FF 00 D5 7C 48 FF 00 D1 30 20 12 12 D1
  • 51.
    Data Transfer InstructionSWAP Instruction SWAP D1 Cont… 34 12 30 20 D1 30 20 34 12 D1
  • 52.
    Data Transfer InstructionLEA Instruction – Load Effective Address LEA $00200001, A0 Cont… Similar to: MOVEA.L #00200001, A0 01 00 20 00 A0 02 70 12 00 A0
  • 53.
    Data Transfer InstructionLEA Instruction – Load Effective Address LEA (A1), A0 Cont… Similar to: MOVEA.L A1, A0 FF FF 10 00 A1 FF FF 10 00 A1 FF FF 10 00 A0 02 70 12 00 A0
  • 54.
    Data Transfer InstructionLEA Instruction – Load Effective Address LEA 8(A0), A1 Cont… 0A 70 12 00 A1 00 40 00 00 A1 02 70 12 00 A0 02 70 12 00 A0
  • 55.
    Data Transfer InstructionLEA Instruction – Load Effective Address LEA 8(A0, D4.L), A1 Cont… 0A 90 12 00 A1 00 40 00 00 A1 02 70 12 00 A0 02 70 12 00 A0 00 20 00 00 D4 00 20 00 00 D4
  • 56.
    Arithmetic Instruction ADDInstruction Destination + Source  Destination ADD.W D1, D3 ADD.W $1000,$2000 ADD.W $2000, D3 9B 57 CC FD D3 23 01 CC FD D3 78 56 34 12 D1 78 56 34 12 D1
  • 57.
    Arithmetic Instruction DataAddition in Memory Problem: A = B + C, where A, B & C are memory Solution: - Copy the first word (B) from memory to register - Add the second word (C) to register - Copy the addition product to the memory Program: MOVE.W B,D1 ; Take B ADD.W C,D1 ; Add with C MOVE.W D1,A ; Store product in A Cont…
  • 58.
    Arithmetic Instruction CarryProduction (0~255) – Unsigned integers Cont… ADD.B D0, D3 No carry, C = 0 9-bit after addition, C = 1
  • 59.
    Arithmetic Instruction OverflowProduction (-128~+127) – signed integers Cont…
  • 60.
    Arithmetic Instruction ADD.B D0, D3 V = 0, C = 0 V = 0, C = 1 Cont… V = 1, C = 0 V = 1, C = 1
  • 61.
    Arithmetic Instruction ADDAInstruction Data size: W, L ADDA.L #$70, A1 Cont… Use ADDQ.L #$1, A1 for value 1~8, it is faster than ADDA.L #$1, A1 A0 20 00 00 A1 30 20 00 00 A1
  • 62.
    Arithmetic Instruction SUBAInstruction Data size: W, L SUBA.L #$70,A1 Cont… Use SUBQ.L #$1, A1 for value 1~8, it is faster than SUBA.L #$1, A1 C0 1F 00 00 A1 30 20 00 00 A1
  • 63.
    Arithmetic Instruction ADDQInstruction ADDQ.W #3,D6 Cont… 1~8 only 02 57 34 12 D6 FF 56 34 12 D6
  • 64.
    Arithmetic Instruction ADDQ vs MOVEQ Cont… L only B, W, L Data Size Dn only Any Destination -128…+127 1..8 Source MOVEQ ADDQ
  • 65.
    Arithmetic Instruction SUBInstruction Destination - Source  Destination SUB.B D3, D1 Cont… SUB.W $1000, $2000 23 01 CC FD D3 23 01 CC FD D3 55 56 34 12 D1 78 56 34 12 D1
  • 66.
    Arithmetic Instruction TheEffect for V Flag after ADD/SUB ADD S, D Cont… V=0 V=1 Negative Positive Negative Negative V=0 V=1 Positive Negative Positive Positive Nothing happen (always V=0) Any Positive Negative Nothing happen (always V=0) Any Negative Positive Overflow Answer (d) d s
  • 67.
    Arithmetic Instruction TheEffect for V Flag after ADD/SUB SUB S, D Cont… V=0 V=1 Negative Positive Negative Positive V=0 V=1 Positive Negative Positive Negative Nothing happen (always V=0) Any Negative Negative Nothing happen (always V=0) Any Positive Positive Overflow Answer (d) d s
  • 68.
    Arithmetic Instruction TheEffect for Flag after SUB C = Set; 2 unsigned values V = Set; 2 signed values Z = Set; product is 0 N = MSB X = C Cont…
  • 69.
    Arithmetic Instruction TheEffect for Flag after SUB SUB.W D1,D0 ;D0  D0 – D1 Cont… D0 before SUB D1 before SUB D1 before SUB X N Z V C After instruction 1 1 0 1 1 00 E0 00 00 D0 00 90 00 00 D1 00 70 00 00 D0 0 1 0 0 0 00 20 00 00 D0 00 70 00 00 D1 00 90 00 00 D0 1 0 0 1 1 00 FD 00 00 D0 00 03 00 00 D1 00 00 00 00 D0 0 0 0 1 0 55 AA 00 00 D0 AA 55 00 00 D1 FF FF 00 00 D0 0 0 1 0 0 00 00 00 00 D0 40 00 00 00 D1 40 00 00 00 D0 0 0 0 0 0 3E 30 00 00 D0 02 00 00 00 D1 40 30 00 00 D0
  • 70.
    Arithmetic Instruction SUBQInstruction SUBQ.W #7,D6 Cont… 1~8 only F8 56 34 12 D6 FF 56 34 12 D6
  • 71.
    Arithmetic Instruction SUBQ vs MOVEQ Cont… L only B, W, L Data Size Dn only Any Destination -128…+127 1..8 Source MOVEQ SUBQ
  • 72.
    Arithmetic Instruction MultiplicationInstruction 1. Unsigned number MULU.W source, Dn 2. Signed number MULS.W source, Dn Cont… Note: Source: 16-bit of any address mode Both operand: 32-bit data register Multiply product: 32-bit stores in destination data register
  • 73.
    Arithmetic Instruction MULU1. Multiply 256 with 2 MOVE.W #256, D3 MULU.W #2, D3 Cont… 16-bit 32-bit 00 02 00 00 D3 00 01 CC FD D3
  • 74.
    Arithmetic Instruction MULU2. Multiply #$FFFF with #$FFFF MULU.W #$FFFF, D3 Cont… Note: FFFF = 65535 65535 * 65535 = 4294836225 = FFFE0001 01 00 FE FF D3 FF FF CC FD D3
  • 75.
    Arithmetic Instruction MULSMultiply #$FFFF with #$FFFF MULS.W #-1, D3 Cont… Note: D3 = -1 (-1) * (-1) = 1 01 00 00 00 D3 FF FF CC FD D3
  • 76.
    Arithmetic Instruction MULS& MULU Cont… MULS XX, D0 D0=000001E0 (3 x 160 = 480 10 ) MULU XX, D0 D0=000001E0 (3 x 160 = 480 10 ) MULS XX, D1 D1=FFFFFD00 (3 x (-256) = -768 10 ) MULU XX, D1 D1=0002FD00 (3x 65280 = 195840 10 ) MULS YY, D1 D1=00500000 (-20480 x (-256) = 5242880 10 ) MULU YY, D1 D1=AF500000 (45056 x 65280 = 2941255680 10 ) -256 65280 FF00 Register D1 160 160 00A0 Register D0 -20480 45056 B000 Location YY 3 3 0003 Location XX As signed decimal As unsigned decimal Content in hex
  • 77.
    Arithmetic Instruction DivisionInstruction 1. Unsigned number DIVU.W source, Dn 2. Signed number DIVS.W source, Dn Cont… Note: Source: 16-bit of any address mode Both operand: 32-bit data register Division product: lower word destination register Remainder: upper word destination register
  • 78.
    Arithmetic Instruction DivisionInstruction Example 1: DIVU.W D0, D3 Cont… 00 10 01 00 D5 01 00 10 00 D3 00 01 CC FE D0 00 01 CC FE D0 Remainder Quotient
  • 79.
    Arithmetic Instruction DivisionInstruction Example 2: (Overflow) MOVE.L #$40000, D3 DIVU.W #2, D3 Result D3 = 100 0000 0000 0000 0000 (19-bit) Destination can hold 16-bit data only Operand remains unchanged and a division overflow sets the V = 1 Cont…
  • 80.
    Arithmetic Instruction DivisionInstruction Example 3: (Case divide with zero) MOVE.L #$122, D3 CLR D0 DIV D0, D3 Cont…
  • 81.
    Arithmetic Instruction DivisionInstruction Example 3: (Case divide with zero) Cont… Decimal -512 FFFFFE00 Register D1 Decimal 776 00000308 Register D0 Unsigned decimal 65280 FF00 Location ZZ Decimal –82 FFAE Location YY Decimal 18 0012 Location XX Decimal Content in hex
  • 82.
    Arithmetic Instruction DivisionInstruction Example 3: (Case divide with zero) Cont… 65024 65792 FFFFFE00 DIVU ZZ,D1 308 0 03080000 DIVU ZZ,D0 -20 6 FFEC0006 DIVS YY,D1 38 -9 0026FFF7 DIVS YY,D0 Decimal –8 Decimal -28 D1=FFF8FFE4 DIVS XX,D1 Decimal 2 Decimal 43 D0=0002002B DIVU XX,D0 Remainder Quotient Result in hex Instruction
  • 83.
    Arithmetic Instruction NEGInstruction (Negate) Form 2’s complement X  0 - X NEG.W D5 Cont… 10 FF 67 34 D5 F0 00 67 34 D5
  • 84.
    Arithmetic Instruction EXTInstruction (Sign Extend) Convert byte @ word operand to word @ longword by extending the sign bit of the operand EXT. W D5 Cont… 65 00 27 34 D5 65 20 27 34 D5 F0 FF 67 34 D5 F0 00 67 34 D5
  • 85.
    Arithmetic Instruction EXTInstruction (Sign Extend) EXT. L D5 Cont… 65 99 FF FF D5 65 99 27 34 D5 F0 30 00 00 D5 F0 30 67 34 D5
  • 86.
    Practical Example Writea sequence of program to compute X = 5 * Y + Z/W where Y, Z and W are 16-bit signed integers and the result is stored as longword X. Solution: MOVE.W Y, D0 MULS #5, D0 MOVE.W Z, D1 EXT.L D1 DIVS W, D1 EXT.L D1 ADD.L D1, D0 MOVE.L D0, X FFFFFE00 Register D1 00000308 Register D0 FF00 Location Z FFAE Location Y 0012 Location X As Hexadecimal Location and register
  • 87.
    Compare & TestInstruction Compare Instruction – CMP CMP.W D1, D0 Initial value 1 0 0 1 0 2000 00 70 20 01 D1 00 90 20 01 D0 1 1 0 1 1 E000 00 90 20 01 D1 00 70 20 01 D0 1 1 0 0 1 F000 00 20 20 01 D1 00 10 20 01 D0 1 1 0 0 0 FFFF 00 00 20 01 D1 FF FF 20 01 D0 1 0 0 0 1 0001 FF FF 20 01 D1 00 00 20 01 D0 1 1 0 0 1 FFFF 41 30 20 01 D1 40 30 20 01 D0 1 0 0 0 0 0001 40 30 20 01 D1 41 30 20 01 D0 1 0 1 0 0 0000 40 30 20 01 D1 40 30 20 01 D0 X N Z V C 1 1 1 1 1 D0-D1
  • 88.
    Logical Instruction 10 1 0 1 1 0 0 0 1 1 0 0 1 1 1 0 0 0 1 0 1 0 1 0 0 1 1  B  A A  B A  B A  B B A
  • 89.
    Logical Instruction AND.s<sea>, <dea> Either one is Dn operand ANDI.s #data, <dea> The 1 st immediate operand OR.s <sea>, <dea> Either one is Dn operand ORI.s #data, <dea> The 1 st immediate operand EOR.s <sea>, <dea> Either one is Dn operand EORI.s #data, <dea> The 1 st immediate operand NOT.s <ea> Cont…
  • 90.
    Logical Instruction ANDInstruction To clear more than 1 bit in operand ADNI.L #$0F, D0 If D0 = $0000B2DA Cont…  D0 = $0000000A 1010 0000 0000 0000 0000 0000 0000 0000 A  B 1111 0000 0000 0000 0000 0000 0000 0000 $0F 1010 1101 0010 1011 0000 0000 0000 0000 D0
  • 91.
    Logical Instruction ORInstruction To set more than 1 bit in operand ORI.W #$00E0, D0 If D0 = $A22D Cont…  D0 = $A2ED 1101 1110 0010 1010 A  B 0000 1110 0000 0000 $E0 1101 0010 0010 1010 D0
  • 92.
    Logical Instruction EORInstruction To invert more than 1 bit in operand EORI.W #$00FF, D0 If D0 = $A22D Cont…  D0 = $A2D2 0010 1101 0010 1010 A  B 1111 1111 0000 0000 $FF 1101 0010 0010 1010 D0
  • 93.
    Logical Instruction NOTInstruction To get 1’s complement of the operand NOT.B D0 If D0 = $A22D Cont…  D0 = $A2D2 0010 1101 0010 1010  D0.B 1111 1111 0000 0000 D0.B
  • 94.
    Shift Instruction 4instructions of shift operations: ASL (arithmetic shift left) ASR (arithmetic shift right) LSL (logical shift left) LSR (logical shift right) Size: B, W, L Affected flag: X & C = depend to the bit shift out N & Z = depend to the product V = 1 if sign operand changes by shifting, but 0 for rotate
  • 95.
    Shift Instruction ArithmeticShift Instruction Example: ASR.B #2, D1 Cont… (-4) (-16) FC 56 34 12 D1 F0 56 34 12 D1
  • 96.
    Shift Instruction LogicalShift Instruction Unsigned value Example: LSR.B #2, D1 Cont… (60) (240) 3C 56 34 12 D1 F0 56 34 12 D1 0
  • 97.
    Rotate Instruction 4instructions of rotate operations: ROL (rotate left) ROR (rotate right) ROXL (rotate left through X flag) ROXR (rotate right through X flag) Size: B, W, L Affected flag: X & C = depend to the bit shift out N & Z = depend to the product V = 1 if sign operand changes by shifting, but 0 for rotate
  • 98.
    Rotate Instruction Example: ROR.B #2, D1 Cont… (01101000) (10100001) 68 56 34 12 D1 A1 56 34 12 D1
  • 99.
    Rotate Instruction RotateInstruction through X Example: ROXR.B #2, D1 Cont… (10101000) (10100001) A8 56 34 12 D1 A1 56 34 12 D1
  • 100.
    Example Running lightin address $80000 MOVE.B #1,D0 REPEAT MOVE.B D0,$800000 JSR DELAY ;Delay ROL.B #1,D0 BRA REPEAT
  • 101.
    Bit Manipulation InstructionTest the specified bit in the destination Data size = B or only 1. The bit manipulation instruction included: a. BCHG (bit test and change) instruction b. BCLR (bit test and clear) instruction c. BSET (bit test and set) instruction d. BTST (bit test) instruction
  • 102.
    Bit Manipulation InstructionExample 1: In address $FF8000 contains $AA. What is the result after BTST.B #3, $FF8000? Solution: ($FF8000) = 10101010 2 where the 3 rd bit is 1. Therefore Z = 0 Cont…
  • 103.
    Bit Manipulation InstructionExample 2: Data register D5 contains 2C3459A7. What is the state of the Z flag and what are the contents of D5 after BCHG #6, D5? Solution: lower byte of D5 = 10100111 2 . Bit 6, 1< 0 >100111, is a 0. This will set the Z flag & complement bit 6 . This result in D5 = 2C3459 E 7 16 . Cont…
  • 104.
    Bit Manipulation InstructionExample 3: Data registers D6 and D7 contain 0000000C and 75793290, respectively. What is the result of BCLR D6, D7? Solution: Register D6 specifies that the 12 th bit position 001< 1 >001010010000) should be tested and cleared. Since the 12 th bit is a 1, Z = 0 bit 12 of D7 will be cleared D7 = 7579 2 290. Cont…
  • 105.
    Bit Manipulation InstructionExample 4: What is the result of BSET #2,(A3)? Solution: The bit in position 2 of the memory location pointed to by A3 is tested and then set. Cont…
  • 106.
  • 107.
    Subroutine Control InstructionProgram Control Structure Cont…
  • 108.
    Subroutine Control InstructionJump Instruction – JMP Unconditional transfer to target destination PC  effective address JMP <ea> Type of effective address: a. Absolute short b. Absolute long c. Address register indirect Cont…
  • 109.
    Subroutine Control InstructionJump Instruction – JMP JMP START ; START = $1000 JMP $FF8000 Cont… 0100 1110 1111 1000 0001 0000 0000 0000 0100 1110 1111 1001 0000 0000 1111 1111 1000 0000 0000 0000
  • 110.
    Subroutine Control InstructionBcc (branch condition) Instruction Bcc <ea> Cont… C+Z=1 U Lower than or Same BLS C+Z=0 U Higher BHI Z+(N  V)=0 S Less than or Equal BLE N  V=0 S Greater than or Equal BGE N  V=1 S Less Than BLT Z+(N  V)=0 S GreaTer than BGT V=0 S oVerflow Clear BVC V=1 S oVerflow Set BVS C=0 U Carry Clear/Higher or Same BCC/HS C=1 U Carry Set/LOwer BCS/LO N=0 U Plus BPL N=1 U Minus BMI Z=0 U Not Equal to zero BNE Z=1 U EQual to zero BEQ If the test is true Arithmetic Meaning Instruction
  • 111.
    Subroutine Control InstructionBranch Always Instruction - BRA PC  PC + offset BRA.s <ea> Short branch: -128  PC  +127 Syntax: BRA.S Long branch: -32k  PC  32k Syntax: BRA.L Cont…
  • 112.
    Subroutine Control InstructionControl Constructions 1. IF condition THEN action 1 ; 2. IF condition THEN action 1 ELSE action 2 ; 3. FOR counter = initial TO final value DO action 1 ; 4. REPEAT action1 UNTIL condition ; Cont… 5. WHILE condition DO action 1 ; 6. CASE selector OF action 1 , action 2 , . . action N ;
  • 113.
    Subroutine Control InstructionExample for IF - THEN IF A=10 THEN Action 1 CMPI.W #10, VARA BNE NEXT . . . NEXT Cont… Action 1 F T
  • 114.
    Subroutine Control InstructionExample for IF – THEN – ELSE IF A<=0 THEN Action 1; ELSE Action 2 TST.W VARA BLE NEXT1 . . BRA NEXT NEXT1 . . NEXT Cont… Action 1 Action 2
  • 115.
    Subroutine Control InstructionExample for FOR LOOP FOR I=1 TO 10 DO Action 1 MOVE.W #9, D7 LOOP . . . DBF D7, LOOP Cont… Action 1
  • 116.
    Subroutine Control InstructionExample for REPEAT – UNTIL REPEAT Action 1 UNTIL A=0 or maximum count is reached MOVE.W LIMIT,D7 SUBQ.W #1, D7 LOOP . . . TST.W VARA DBNE D7, LOOP Cont… Action 1
  • 117.
    Subroutine Control InstructionExample for WHILE – DO WHILE A<=10 and maximum count is not reached DO Action 1 MOVE.W LIMIT, D7 AGAIN CMPI.W #10, VARA DBGT D7, LOOP LOOP . . . BRA AGAIN NEXT . . . Cont… Action 1 Action 2
  • 118.
    BCD (Binary CodedDecimal) Instruction Each BCD byte contents 2 digit of 4-bit BCD. Each BCD instruction involve in X bit. Z bit is changed if the product is not zero. Before doing the first BCD operation, it have to start with X=0 and Z=1. Syntax: ABCD Dx,Dy (source) 10 + (destination) 10 + X  destination ABCD- (Ay)-(Ax) NBCD <ea> 0 – (source) 10 – X  destination SBCD Dx,Dy (destination) 10 - (source) 10 - X  destination
  • 119.
    BCD (Binary CodedDecimal) Instruction ABCD and SBCD Instructions Example 1: Add BCD number in D0 to D1. MOVE #4, CCR ; x=0 and z=1 ABCD D0, D1 Example 2: Subtract BCD number in D0 from D1 MOVE #4, CCR ; x=0 and z=1 SBCD D0, D1 Cont…
  • 120.
    BCD (Binary CodedDecimal) Instruction BCD Instruction Addition for 2 BCD number 8 bit (byte). MOVE #4,CCR ;x=0 and z=1 ABCD -(A0),-(A1) ABCD -(A0),-(A1) ABCD -(A0),-(A1) ABCD -(A0),-(A1) Cont…  A0 before addition Lower Byte Lower Middle Upper Middle Upper Byte  A0 after addition  A1 before addition Lower Byte Lower Middle Upper Middle Upper Byte  A1 after addition Destination Source
  • 121.
    BCD (Binary CodedDecimal) Instruction NBCD Instruction Use 9’s @ 10’s complement notation to represent a negative BCD number Example 1: What is the 10s complement for fill-in D0. Let say D0 = 23. MOVE #0,CCR NBCD D0 NBCD operation: 100 (0 borrow 1) Original D0: -23 X bit: - 0 Product: 77 Cont…
  • 122.
    BCD (Binary CodedDecimal) Instruction NBCD Instruction Example 2: What is the 9s complement for fill-in D0. Let say D0 = 23. MOVE #$10,CCR NBCD D0 NBCD operation : 100 (0 borrow 1) Original D0 : -23 X bit: - 1 Product : 76 Cont…
  • 123.
    Stack and SubroutineStack Data structure that is used to save and restore information in a last-in, first-out (LIFO) fashion. Register A7 is implicitly used as the stack pointer. Push (save): MOVE source, -(SP) or MOVE.L source, -(SP) Pop (retrieve): MOVE (SP)+, destination or MOVE.L (SP)+, destination
  • 124.
    Stack and SubroutineStack Cont…
  • 125.
    Stack and SubroutineStack STACKA DS.W 50 MOVEA.L #STACKA + 100, A2 MOVE.L D1, -(A2) MOVE.W VAR, -(A2) MOVE.W #$25, -(A2) MOVE.L (A2)+, D2 MOVE.L (A2)+, D3 Cont…
  • 126.
    Stack and SubroutineStack Cont…
  • 127.
  • 128.
    Subroutine Subroutine ConceptA program structure where one part of the program is called the main program. In addition to this, a smaller segment attached to the main program, known as a subroutine. The subroutine is written to provide a function that must be performed at various points in the main program. A return instruction must be included at the end of the subroutine to initiate the return sequence to the main program environment. The instructions provided to transfer control from the main program to a subroutine and return control back to the main program are called subroutine-handling instructions. Cont…
  • 129.
    Subroutine Subroutine ControlInstructions – JSR, BSR, RTS & RTR Cont…
  • 130.
    Interrupt An externalevent which informs the CPU that a device needs its service. Interrupt Service Routine (ISR): a. a program which associates with interrupt. b. also called the interrupt handler c. there are 4 bytes of memory allocated as interrupt vector table. d. handled in the supervisor mode, S = 1.
  • 131.
    Interrupt Example 1:Calculate the sum of 10 numbers in the address memory $2000. Cont… extra