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Chp1 68000 microprocessor copy


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Chp1 68000 microprocessor copy

  1. 1. 68000 Microprocessor
  2. 2. The 68000 Microprocessor CPU Memory Output Input Address bus Data bus Control bus
  3. 3. System Bus <ul><li>Address bus:  single direction (1 way) bus </li></ul><ul><li> transfer the address data </li></ul><ul><li> code to memory or devices </li></ul><ul><li>Data bus:  bidirectional (2 ways) bus </li></ul><ul><li> transfer data to/ from the CPU </li></ul><ul><li>Control bus:  Control all the activities of the </li></ul><ul><li> elements </li></ul>
  4. 4. Central Processing Unit (CPU) <ul><li>HEART of the system </li></ul><ul><li>Master CONTROLLER for all operations </li></ul><ul><li>3 main parts: </li></ul><ul><li>i. ALU : mathematic operation (plus, minus, </li></ul><ul><li> multiply, divide, etc.) </li></ul><ul><li>ii. Register : storage unit </li></ul><ul><li>iii. Control and Timing : Control unit </li></ul>
  5. 5. Memory CPU Device Read Write (Send data) (Accept data) Device Semiconductor Magnetic Optical RAM ROM Disk Tape CD-ROM Static RAM Dynamic RAM Mask-programmable ROM Programmable ROM (PROM) Erasable PROM (EPROM) Electrically EPROM(EEPROM) MEMORY
  6. 6. Memory cont… Input / Output RAM ( Random Access Memory) ROM (Read Only Memory) <ul><li>Volatile </li></ul><ul><li>Read & Write </li></ul><ul><li>Store temporary data </li></ul><ul><li>Non-volatile </li></ul><ul><li>Read </li></ul><ul><li>To get started from power on (boot up), including BIOS (basic input/output system) </li></ul>
  7. 7. Programmer’s Model of 68000
  8. 8. Status Register
  9. 9. Functional Description of the 68000 Interrupt control 6800 peripheral control System control Bus arbitration control Asynchronous bus control Processor status ADDRESS
  10. 10. 68000 Data Organization <ul><li>Byte View </li></ul>1 byte (8 bits) 000000 000001 000002 000003 . . FFFFFF
  11. 11. 68000 Data Organization cont… <ul><li>Word View </li></ul>
  12. 12. 68000 Data Organization cont… <ul><li>Long Word View </li></ul>
  13. 13. Memory Map of 512KB Macintosh
  14. 14. 68000 Instruction Types <ul><li>8-bit : ADD .B D4, D5 </li></ul>D4 11 + D5 12 D5 23
  15. 15. 68000 Instruction Types cont… <ul><li>16-bit : ADD .W D4, D5 </li></ul>D4 11 22 + D5 33 44 D5 44 66
  16. 16. 68000 Instruction Types cont… <ul><li>32-bit : ADD .L D4, D5 </li></ul>D4 11 22 33 44 + D5 22 33 44 55 D5 33 55 77 99
  17. 17. Advantages of MC6800 <ul><li>It is popular to use because it is still using for Macintosh computer . </li></ul><ul><li>Instructions set are comprehensive . </li></ul><ul><li>Compare with the 8-bit  P (like 6800, Z-80), the space for the address is big . </li></ul><ul><li>There is special characteristic for designing the operation system. </li></ul><ul><li>Easy to use by user compiler and assembler language. </li></ul>
  18. 18. Tutorial <ul><ul><li>2.1 16 bits </li></ul></ul><ul><ul><li>2.2 49,152 bytes </li></ul></ul><ul><ul><li>2.3 To store the programs and data </li></ul></ul><ul><ul><li>2.4 Volatile and non-volatile </li></ul></ul><ul><ul><li>2.5 A bus is a wire or wires that connect the IC chips in a computer </li></ul></ul><ul><ul><li>2.6 Unidirectional </li></ul></ul><ul><ul><li>2.7 Bidirectional </li></ul></ul>
  19. 19. Tutorial <ul><ul><li>2.8 ALU, register, timing and control </li></ul></ul><ul><ul><li>2.9 Each user gets 32KB of RAM. The operating system does indeed required some RAM for its own use. One way to do this is to allocate a small portion of each user’s RAM for operating system functions. </li></ul></ul><ul><ul><li>2.10 The .B, .W and .L extensions specify the operand size for an instruction. </li></ul></ul><ul><ul><li>2.11 Longword at address 30 is 9AFC3007. Word at address 30 is 9AFC. </li></ul></ul>
  20. 20. Tutorial <ul><ul><li>2.12 a. longword </li></ul></ul><ul><li>b. longword </li></ul><ul><li>c. longword </li></ul><ul><li>d. word or longword </li></ul><ul><li>e. byte, word or longword </li></ul><ul><ul><li>2.13 The condition codes are contained in the user byte of the status register </li></ul></ul><ul><ul><li>2.14 Trace bit, supervisor state and interrupt mask are contained in the system byte of the status register. </li></ul></ul>