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IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
__________________________________________________________________________________________
Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 231
A NOVEL ACTIVE CHARGE EQUALISATION METHOD FOR SERIES
CONNECTED BATTERIES
Soumya Sunny1
, Priyanka K2
1
PG Scholar, Department of EEE, Karunya University, Tamilnadu, India
2
PG Scholar, Department of EEE, Karunya University, Tamilnadu, India
Abstract
Quasi-resonant switched capacitor converter based equalization method is presented in this paper. Zero current switching is used in
order to reduce losses in the circuit. Zero voltage gap between cells are achieved. Switches are controlled by using complementary
synchronous triggering pulses.
Keywords: Equalization method, Zero voltage gap, Quasi-resonant, Switched-capacitor, Synchronous trigger.
----------------------------------------------------------------------***-----------------------------------------------------------------------
1. INTRODUCTION
Batteries are the inevitable part of portable electronic devices
nowadays. So a battery management system is necessary to
perform cell balancing which will help to provide optimal
usage of power supplied by batteries. Cells may get
overcharged or undercharged due to several conditions. To
equalize the charge in each cell, several methods of balancing
are used. Some of the methods are self-balancing, passive
balancing and active balancing. Passive balancing, which is
energy consuming method using resistors is simple and cost
effective [1]. Active elements like inductor or capacitor are
used to transfer excess energy which will increase the size of
the system, loss and electromagnetic interference [2], [3]. A
resonant switched capacitor converter has already been used in
balancing batteries [4]. This converter is suitable only for high
voltage level balancing applications rather than low voltage
balancing. Balancing will not give a zero voltage gap between
cells.
So a modified battery balancing scheme [5] is introduced, as
shown in the fig. 1, to overcome the above mentioned
problems. A quasi- resonant switched capacitor is used to attain
a zero voltage gap between the cells. The inductor used in this
circuit is very small compared to previous methods of
balancing. So cost is also reduced in this type of balancing.
Voltage monitoring is not necessary in this circuit and control
part became so simple. Since zero current switching is used,
losses are avoided and in turn efficiency is increased.
The system in the above mentioned paper has two switches
connected across each cell which is supposed to work
complementary to each other. Since triggering pulse to one
switch is given by inverting other switch’s triggering pulse
there is a possibility of battery getting short circuit. Fig. 2
shows the short circuit possibility of battery in the system.
Fig -1 Resonant Switched–Capacitor Cell Balancing System
To overcome this situation a modified charge equalizer is
proposed in this paper which helps to create a dead time
between the switching pulses using a dead time circuit to avoid
any damage possibility. When a battery is short circuited, there
is nothing in the electrical path to limit the current flow except
the resistance of the conductor and the internal resistance of the
battery. Both of these values are so small that their effects on
the circuit are negligible. So if we assume the resistance of the
short circuit is 0 ohms (it will be almost 0 ohms in applied
theory), then the current in the circuit will continue to rise until
the conductor shorting the circuit or the battery itself is
destroyed. This will happen extremely quickly and will
potentially cause harm or death to any bystanders.
2. FEATURES OF THE POPOSED SYSTEM
Cells are connected in series to make a string. Two switches
are connected across each cell. A resonant tank is connected to
the system to make it series to the battery. So it is called a
series resonant tank. A load is also connected across the battery
to make it a complete cell balancing system.
IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
__________________________________________________________________________________________
Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 232
Fig -2 Short Circuit in Mode 1 /Mode 2 Operation of the
System
Fig. 3 shows the block diagram of the cell balancing system.
Cell balancing system consists of four main blocks such as cell
module, switch module, series resonant tank module and
control circuit. Control circuit helps to create a dead time for
the pulses generated so that it can avoid short circuit
possibilities which in turn create damage for the battery.
Fig -3 Block Diagram of the Cell Balancing System
3. WORKING OF THE PROPOSED CELL
BALANCING SYSTEM
Fig. 4 below shows the proposed system. For the balancing of
two battery-cell voltage four switches are used, and only one
resonant switched-capacitor tank is used to transfer energy.
The switches are controlled by the complementary signals. In
the first half cycle Q11 and Q21 are turned ON and the next
half cycle Q12 and Q22 are turned ON. The whole analysis is
based on VB1>VB2.
Fig -4 Proposed cell balancing system
3.1 Mode 1 of the Proposed System
Fig -5 Mode 1 of the proposed system
Fig. 5 shows the mode 1 of the proposed system. In the first
half cycle Q11 and Q21 are turned ON and Q12 and Q22
turned OFF. So the resonant tank is connected in parallel with
cell B1 through Q11 and Q21.Therefore a resonant path is
formed as L1, C1, B1.Then the voltage across C1 and resonant
current ir increases. The equations are as follows;
1
1
cdv
r
dt
i c (1)
IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
__________________________________________________________________________________________
Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 233
1 1 1
rdi
c B
dt
L V V  (2)
3.2 Mode 2 of the Proposed System
Fig -6 Mode 2 of the proposed system
Fig. 6 shows mode 2 of the proposed system. In the next half
cycle Q12 and Q22 are turned ON and Q11 and Q21 are
turned OFF. So the resonant tank is connected in parallel with
cell B2 through Q12 and Q22.Therefore resonant path is
formed as L1, C1, B2. Then the capacitor begins to discharge
through B2.The resonant current starts to increase in opposite
direction
1
1
cdv
r
dt
i c (3)
1 1 2
rdi
c B
dt
L V V  (4)
In the beginning of charging or discharging, zero current
switching is occur. Therefore switching loss will be reduced
thus efficiency increases. The condition for zero current
switching is achieved making the resonant frequency
equivalent to the integer multiple of switching frequency.
Also in practical applications the internal resistance and
voltage drop across the switches are considered since the
voltage drop across the switches are small. The total internal
resistance of the circuit is the sum of the internal resistance of
the one battery cell, resonant tank’s internal resistance and the
on resistance of two MOSFET’s.
To achieve zero voltage gap between cells the following
conditions must be satisfied.
1) Voltage drop across the switches should be small.
This can be achieved through synchronous trigger
pattern control. This controlling avoids the higher
voltage drop caused by the bypass diodes.
2) By using resonant tank the voltage across switched
capacitor should be greater than the voltage across the
higher voltage cell at the end of charging and it must
be lower than the voltage of the lower voltage cell at
the end of discharging.
There are two other problems that also should be considered
for a battery balancing system; efficiency and cell balancing
time. Total internal resistance and oscillation are affected by
efficiency. But total internal resistance is a constant value and
cannot be changed. Oscillations can be reduced by using small
inductors, also switching frequency and resonant frequency
can be made equal. Battery balancing time can be reduced by
using large capacitor as switched capacitor. This is because
the amount of charges transferred from one cell to another in
each switching cycle is proportional to the value of switched
capacitor. The relationship is;
1
Q
V
C

 
Where Q is the charge that is transferred from one cell to
another in one switching cycle.
3.3 Multiple Cells Voltage Balancing System
Fig -7 Multiple cell balancing system
Fig. 7 shows multiple cell balancing system. Here n cells are
balanced by using n-1 resonant tank circuits, and also 2 n
MOSFET’s are used as system switches. It needs only one pair
of complementary signals to control all MOSFET’s. When the
voltage unbalancing occurs between cells; the resonant tank
will run and the energy will be transferred from higher voltage
cells to lower voltage cells. Thus balancing takes place and all
resonance will stop.
IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
__________________________________________________________________________________________
Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 234
4. SIMULATION
Simulation is performed on a two cell charge equalizer system
using PSIM9.0. Simulation was carried out for the zero-current
switching switched-capacitor cell balancing circuit and results
are compared with simulation output of the proposed system.
Cells are represented as capacitor of values 10F and having
initial values of 3.6V and 3.4V respectively. Switches used are
MOSFETs working with the help of complementary
synchronous triggering signals.
Fig. 8 shows the result of circuit without internal resistance and
values of resonant inductor is 5 H and switched capacitor is
10 F and initial voltage across the capacitor is 3.5V.
Switching frequency is 11.2 kHz and it is half of the value of
resonant frequency.
Time (ms)
Fig -8 Simulation waveforms of the two-cell system without
considering an internal resistor
Fig. 9 shows the result of circuit with internal resistance and
values of internal resistance is 1.5  , resonant inductor is 5
H and switched capacitor is 10 F and initial voltage
across the capacitor is 3.5V. Switching frequency is changed to
8 kHz and it is half of the value of resonant frequency.
Time (ms)
Fig -9 Simulation waveforms of the two-cell system with
consideration of an internal resistor
Fig. 10 shows the result of the circuit of the above mentioned
case with a different switching frequency and it is of the same
value of resonant frequency.
Time (ms)
Fig -10 Simulation waveforms of the two-cell system with
consideration of an internal resistor
Fig. 11 shows the result of the circuit of the above mentioned
case with a different switching frequency because of different
value of inductor. It is changed to 2.2 H and so resonant
frequency is reduced.
0
0.2
0.4
0.6
0.8
1
V11
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
0.2
0.4
0.6
0.8
1
V12
0 2e-005 4e-005 6e-005 8e-005 0.0001 0.00012 0.00014 0.00016 0.00018 0.0002
Time (s)
3.2
3.3
3.4
3.5
3.6
3.7
Vc1
0 2e-005 4e-005 6e-005 8e-005 0.0001 0.00012 0.00014 0.00016 0.00018 0.0002
Time (s)
0
-0.05
-0.1
-0.15
-0.2
0.05
0.1
0.15
Ir
0
0.2
0.4
0.6
0.8
1
V11
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
0.2
0.4
0.6
0.8
1
V12
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
3.4
3.45
3.5
3.55
3.6
Vc1
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
-0.02
-0.04
-0.06
-0.08
-0.1
-0.12
-0.14
0.02
0.04
0.06
0.08
0.1
0.12
Ir
0
0.2
0.4
0.6
0.8
1
V11
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
0.2
0.4
0.6
0.8
1
V12
0 0.0001 0.0002 0.0003 0.0004 0.0005
T i me (s)
3.4
3.45
3.5
3.55
3.6
Vc1
0 0.0001 0.0002 0.0003 0.0004 0.0005
Time (s)
0
-0.02
-0.04
-0.06
-0.08
-0.1
-0.12
-0.14
0.02
0.04
0.06
0.08
0.1
0.12
Ir
Gate
Q11,Q12
Gate
Q11,Q12
Gate
Q21,Q22
Gate
Q21,Q22
Vc1(V)Ir(A)
Vc1(V)Ir(A)
Gate
Q11,Q12
Gate
Q21,Q22
Vc1(V)
IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
__________________________________________________________________________________________
Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 235
Time (ms)
Fig -11 Simulation waveforms of the two-cell system with a
smaller inductor
Same values are used in the proposed equalizer in the above
mentioned cases and same cases are repeated in the proposed
system too. So fig. 12 is similar case of fig. 8, fig.13 is similar
case of fig. 9, fig. 14 is similar case of fig. 10 and fig.15 is
similar case of fig. 11.
Time (ms)
Fig -12 Simulation waveforms of the two-cell system without
considering an internal resistor
Fig -13 Simulation waveforms of the two-cell system with
consideration of an internal resistor
Time (ms)
Fig -14 Simulation waveforms of the two-cell system with
consideration of an internal resistor
0
0.2
0.4
0.6
0.8
1
V11
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
0.2
0.4
0.6
0.8
1
V12
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
3.35
3.4
3.45
3.5
3.55
3.6
Vc1
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
-0.05
-0.1
-0.15
-0.2
0.05
0.1
0.15
Ir
0
0.2
0.4
0.6
0.8
1
V11
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
0.2
0.4
0.6
0.8
1
V12
0.002 0.0022 0.0024 0.0026 0.0028 0.003
Time (s)
3.3
3.4
3.5
3.6
3.7
3.8
Vc1
0.002 0.0021 0.0022 0.0023 0.0024
Time (s)
0
-0.1
-0.2
0.1
0.2
Ir
0
0.2
0.4
0.6
0.8
1
V11
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
0.2
0.4
0.6
0.8
1
V12
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
3.4
3.45
3.5
3.55
3.6
Vc1
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
-0.02
-0.04
-0.06
-0.08
-0.1
-0.12
-0.14
0.02
0.04
0.06
0.08
0.1
0.12
Ir
0
0.2
0.4
0.6
0.8
1
V11
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
0.2
0.4
0.6
0.8
1
V12
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
3.42
3.44
3.46
3.48
3.5
3.52
3.54
3.56
3.58
3.6
Vc1
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
-0.02
-0.04
-0.06
-0.08
-0.1
-0.12
-0.14
0.02
0.04
0.06
0.08
0.1
0.12
Ir
Ir(A)
Gate
Q11,Q12
Gate
Q21,Q22
Vc1(V)
Ir(A)
Ir(A)
Ir(A)
Vc1(V)
Vc1(V)
Vc1(V)
Gate
Q11,Q12
Gate
Q21,Q22
Gate
Q11,Q12
Gate
Q21,Q22
Time (ms)
Gate
Q11,Q12
Gate
Q21,Q22
IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308
__________________________________________________________________________________________
Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 236
Time (ms)
Fig -15 Simulation waveforms of the two-cell system with a
smaller inductor
To avoid overlapping of switches a dead time circuit is
designed and used in the control circuit of the system. It is
shown in the fig. 16 given below. The gap between the pulses
is the dead time.
Time (ms)
Fig -16 Waveform showing dead time between triggering
pulses
5. CONCLUSIONS
In this system control part is easier and no need of monitoring
arrangements which will reduce system cost and maintenance.
At the same time it will balance the system accurately and
achieves zero voltage gap between cells. This system can be
used in low voltage applications also to balance the cells. In the
proposed system a modified control circuit is used to avoid
overlapping of the switches in the equalizer. This makes the
system more reliable and safe to handle.
REFERENCES
[1] H.-S. Park, C.-H. Kim, K.-B. Park, G.-W. Moon, and
J.-H. Lee, “Design of a charge equalizer based on
battery modularization,” IEEE Trans. Veh. Technol.,
vol. 58, no. 7, pp. 3216–3663, Sep. 2009.
[2] K. W. E. Cheng and P. D. Evans, “Calculation of
winding losses in high frequency toroidal inductors
using single-strand conductors,” IEE Proc. Elect.
Power Appl., vol. 141, no. 2, pp. 52–62, Mar. 1994.
[3] A. C. Baughman andM. Ferdowsi, “Double-tiered
switched-capacitor battery charge equalization
technique,” IEEE Trans. Ind. Electron., vol. 55, no. 6,
pp. 2277–2285, Jun. 2007.
[4] K. Sano and H. Fujita, “A resonant switched-capacitor
converter for voltage balancing of series-connected
capacitors,” in Proc. Int. Conf. Power Electron. Drive
Syst., 2009, pp. 683–688.
[5] Ye Yuanmao, K. W. E. Cheng, and Y. P. B. Yeung,
“Zero-Current Switching Switched-Capacitor Zero-
Voltage-Gap Automatic Equalization System for Series
Battery String” in IEEE Transactions on Power
Electronics, vol. 27, no. 7, pp. 3234-3242, July 2012.
BIOGRAPHIES
Soumya Sunny received the B.Tech degree
from University of Calicut, Kerala. She is
currently pursuing M. Tech degree in Power
Electronics & Drives from Karunya
University, Coimbatore, Tamil Nadu. Her
research interests include battery management
system and embedded system applications in battery
balancing. She is a student member of IEEE.
Priyanka K was born in Kasargod (dist)
Kerala, India in 1990. She received her B.
Tech degree from Kannur University, Kerala.
She is a student member of IEEE. She is
currently pursuing M. Tech degree in Power
Electronics and Drives from Karunya
University, Coimbatore, Tamil Nadu. Her main
research interests include renewable energies and distributed
generation, power electronic converters.
0
0.2
0.4
0.6
0.8
1
V11
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
0.2
0.4
0.6
0.8
1
V12
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
3.35
3.4
3.45
3.5
3.55
3.6
Vc1
0 0.0002 0.0004 0.0006 0.0008 0.001
Time (s)
0
-0.05
-0.1
-0.15
-0.2
0.05
0.1
0.15
Ir
0 2e-005 4e-005 6e-005 8e-005 0.0001
Time (s)
0
0.2
0.4
0.6
0.8
1
V11 V12
Ir(A)Vc1(V)
Gate
Q11,Q12
Gate
Q21,Q22
Gate

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A novel active charge equalisation method for series connected batteries

  • 1. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308 __________________________________________________________________________________________ Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 231 A NOVEL ACTIVE CHARGE EQUALISATION METHOD FOR SERIES CONNECTED BATTERIES Soumya Sunny1 , Priyanka K2 1 PG Scholar, Department of EEE, Karunya University, Tamilnadu, India 2 PG Scholar, Department of EEE, Karunya University, Tamilnadu, India Abstract Quasi-resonant switched capacitor converter based equalization method is presented in this paper. Zero current switching is used in order to reduce losses in the circuit. Zero voltage gap between cells are achieved. Switches are controlled by using complementary synchronous triggering pulses. Keywords: Equalization method, Zero voltage gap, Quasi-resonant, Switched-capacitor, Synchronous trigger. ----------------------------------------------------------------------***----------------------------------------------------------------------- 1. INTRODUCTION Batteries are the inevitable part of portable electronic devices nowadays. So a battery management system is necessary to perform cell balancing which will help to provide optimal usage of power supplied by batteries. Cells may get overcharged or undercharged due to several conditions. To equalize the charge in each cell, several methods of balancing are used. Some of the methods are self-balancing, passive balancing and active balancing. Passive balancing, which is energy consuming method using resistors is simple and cost effective [1]. Active elements like inductor or capacitor are used to transfer excess energy which will increase the size of the system, loss and electromagnetic interference [2], [3]. A resonant switched capacitor converter has already been used in balancing batteries [4]. This converter is suitable only for high voltage level balancing applications rather than low voltage balancing. Balancing will not give a zero voltage gap between cells. So a modified battery balancing scheme [5] is introduced, as shown in the fig. 1, to overcome the above mentioned problems. A quasi- resonant switched capacitor is used to attain a zero voltage gap between the cells. The inductor used in this circuit is very small compared to previous methods of balancing. So cost is also reduced in this type of balancing. Voltage monitoring is not necessary in this circuit and control part became so simple. Since zero current switching is used, losses are avoided and in turn efficiency is increased. The system in the above mentioned paper has two switches connected across each cell which is supposed to work complementary to each other. Since triggering pulse to one switch is given by inverting other switch’s triggering pulse there is a possibility of battery getting short circuit. Fig. 2 shows the short circuit possibility of battery in the system. Fig -1 Resonant Switched–Capacitor Cell Balancing System To overcome this situation a modified charge equalizer is proposed in this paper which helps to create a dead time between the switching pulses using a dead time circuit to avoid any damage possibility. When a battery is short circuited, there is nothing in the electrical path to limit the current flow except the resistance of the conductor and the internal resistance of the battery. Both of these values are so small that their effects on the circuit are negligible. So if we assume the resistance of the short circuit is 0 ohms (it will be almost 0 ohms in applied theory), then the current in the circuit will continue to rise until the conductor shorting the circuit or the battery itself is destroyed. This will happen extremely quickly and will potentially cause harm or death to any bystanders. 2. FEATURES OF THE POPOSED SYSTEM Cells are connected in series to make a string. Two switches are connected across each cell. A resonant tank is connected to the system to make it series to the battery. So it is called a series resonant tank. A load is also connected across the battery to make it a complete cell balancing system.
  • 2. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308 __________________________________________________________________________________________ Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 232 Fig -2 Short Circuit in Mode 1 /Mode 2 Operation of the System Fig. 3 shows the block diagram of the cell balancing system. Cell balancing system consists of four main blocks such as cell module, switch module, series resonant tank module and control circuit. Control circuit helps to create a dead time for the pulses generated so that it can avoid short circuit possibilities which in turn create damage for the battery. Fig -3 Block Diagram of the Cell Balancing System 3. WORKING OF THE PROPOSED CELL BALANCING SYSTEM Fig. 4 below shows the proposed system. For the balancing of two battery-cell voltage four switches are used, and only one resonant switched-capacitor tank is used to transfer energy. The switches are controlled by the complementary signals. In the first half cycle Q11 and Q21 are turned ON and the next half cycle Q12 and Q22 are turned ON. The whole analysis is based on VB1>VB2. Fig -4 Proposed cell balancing system 3.1 Mode 1 of the Proposed System Fig -5 Mode 1 of the proposed system Fig. 5 shows the mode 1 of the proposed system. In the first half cycle Q11 and Q21 are turned ON and Q12 and Q22 turned OFF. So the resonant tank is connected in parallel with cell B1 through Q11 and Q21.Therefore a resonant path is formed as L1, C1, B1.Then the voltage across C1 and resonant current ir increases. The equations are as follows; 1 1 cdv r dt i c (1)
  • 3. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308 __________________________________________________________________________________________ Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 233 1 1 1 rdi c B dt L V V  (2) 3.2 Mode 2 of the Proposed System Fig -6 Mode 2 of the proposed system Fig. 6 shows mode 2 of the proposed system. In the next half cycle Q12 and Q22 are turned ON and Q11 and Q21 are turned OFF. So the resonant tank is connected in parallel with cell B2 through Q12 and Q22.Therefore resonant path is formed as L1, C1, B2. Then the capacitor begins to discharge through B2.The resonant current starts to increase in opposite direction 1 1 cdv r dt i c (3) 1 1 2 rdi c B dt L V V  (4) In the beginning of charging or discharging, zero current switching is occur. Therefore switching loss will be reduced thus efficiency increases. The condition for zero current switching is achieved making the resonant frequency equivalent to the integer multiple of switching frequency. Also in practical applications the internal resistance and voltage drop across the switches are considered since the voltage drop across the switches are small. The total internal resistance of the circuit is the sum of the internal resistance of the one battery cell, resonant tank’s internal resistance and the on resistance of two MOSFET’s. To achieve zero voltage gap between cells the following conditions must be satisfied. 1) Voltage drop across the switches should be small. This can be achieved through synchronous trigger pattern control. This controlling avoids the higher voltage drop caused by the bypass diodes. 2) By using resonant tank the voltage across switched capacitor should be greater than the voltage across the higher voltage cell at the end of charging and it must be lower than the voltage of the lower voltage cell at the end of discharging. There are two other problems that also should be considered for a battery balancing system; efficiency and cell balancing time. Total internal resistance and oscillation are affected by efficiency. But total internal resistance is a constant value and cannot be changed. Oscillations can be reduced by using small inductors, also switching frequency and resonant frequency can be made equal. Battery balancing time can be reduced by using large capacitor as switched capacitor. This is because the amount of charges transferred from one cell to another in each switching cycle is proportional to the value of switched capacitor. The relationship is; 1 Q V C    Where Q is the charge that is transferred from one cell to another in one switching cycle. 3.3 Multiple Cells Voltage Balancing System Fig -7 Multiple cell balancing system Fig. 7 shows multiple cell balancing system. Here n cells are balanced by using n-1 resonant tank circuits, and also 2 n MOSFET’s are used as system switches. It needs only one pair of complementary signals to control all MOSFET’s. When the voltage unbalancing occurs between cells; the resonant tank will run and the energy will be transferred from higher voltage cells to lower voltage cells. Thus balancing takes place and all resonance will stop.
  • 4. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308 __________________________________________________________________________________________ Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 234 4. SIMULATION Simulation is performed on a two cell charge equalizer system using PSIM9.0. Simulation was carried out for the zero-current switching switched-capacitor cell balancing circuit and results are compared with simulation output of the proposed system. Cells are represented as capacitor of values 10F and having initial values of 3.6V and 3.4V respectively. Switches used are MOSFETs working with the help of complementary synchronous triggering signals. Fig. 8 shows the result of circuit without internal resistance and values of resonant inductor is 5 H and switched capacitor is 10 F and initial voltage across the capacitor is 3.5V. Switching frequency is 11.2 kHz and it is half of the value of resonant frequency. Time (ms) Fig -8 Simulation waveforms of the two-cell system without considering an internal resistor Fig. 9 shows the result of circuit with internal resistance and values of internal resistance is 1.5  , resonant inductor is 5 H and switched capacitor is 10 F and initial voltage across the capacitor is 3.5V. Switching frequency is changed to 8 kHz and it is half of the value of resonant frequency. Time (ms) Fig -9 Simulation waveforms of the two-cell system with consideration of an internal resistor Fig. 10 shows the result of the circuit of the above mentioned case with a different switching frequency and it is of the same value of resonant frequency. Time (ms) Fig -10 Simulation waveforms of the two-cell system with consideration of an internal resistor Fig. 11 shows the result of the circuit of the above mentioned case with a different switching frequency because of different value of inductor. It is changed to 2.2 H and so resonant frequency is reduced. 0 0.2 0.4 0.6 0.8 1 V11 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 0.2 0.4 0.6 0.8 1 V12 0 2e-005 4e-005 6e-005 8e-005 0.0001 0.00012 0.00014 0.00016 0.00018 0.0002 Time (s) 3.2 3.3 3.4 3.5 3.6 3.7 Vc1 0 2e-005 4e-005 6e-005 8e-005 0.0001 0.00012 0.00014 0.00016 0.00018 0.0002 Time (s) 0 -0.05 -0.1 -0.15 -0.2 0.05 0.1 0.15 Ir 0 0.2 0.4 0.6 0.8 1 V11 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 0.2 0.4 0.6 0.8 1 V12 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 3.4 3.45 3.5 3.55 3.6 Vc1 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 -0.02 -0.04 -0.06 -0.08 -0.1 -0.12 -0.14 0.02 0.04 0.06 0.08 0.1 0.12 Ir 0 0.2 0.4 0.6 0.8 1 V11 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 0.2 0.4 0.6 0.8 1 V12 0 0.0001 0.0002 0.0003 0.0004 0.0005 T i me (s) 3.4 3.45 3.5 3.55 3.6 Vc1 0 0.0001 0.0002 0.0003 0.0004 0.0005 Time (s) 0 -0.02 -0.04 -0.06 -0.08 -0.1 -0.12 -0.14 0.02 0.04 0.06 0.08 0.1 0.12 Ir Gate Q11,Q12 Gate Q11,Q12 Gate Q21,Q22 Gate Q21,Q22 Vc1(V)Ir(A) Vc1(V)Ir(A) Gate Q11,Q12 Gate Q21,Q22 Vc1(V)
  • 5. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308 __________________________________________________________________________________________ Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 235 Time (ms) Fig -11 Simulation waveforms of the two-cell system with a smaller inductor Same values are used in the proposed equalizer in the above mentioned cases and same cases are repeated in the proposed system too. So fig. 12 is similar case of fig. 8, fig.13 is similar case of fig. 9, fig. 14 is similar case of fig. 10 and fig.15 is similar case of fig. 11. Time (ms) Fig -12 Simulation waveforms of the two-cell system without considering an internal resistor Fig -13 Simulation waveforms of the two-cell system with consideration of an internal resistor Time (ms) Fig -14 Simulation waveforms of the two-cell system with consideration of an internal resistor 0 0.2 0.4 0.6 0.8 1 V11 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 0.2 0.4 0.6 0.8 1 V12 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 3.35 3.4 3.45 3.5 3.55 3.6 Vc1 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 -0.05 -0.1 -0.15 -0.2 0.05 0.1 0.15 Ir 0 0.2 0.4 0.6 0.8 1 V11 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 0.2 0.4 0.6 0.8 1 V12 0.002 0.0022 0.0024 0.0026 0.0028 0.003 Time (s) 3.3 3.4 3.5 3.6 3.7 3.8 Vc1 0.002 0.0021 0.0022 0.0023 0.0024 Time (s) 0 -0.1 -0.2 0.1 0.2 Ir 0 0.2 0.4 0.6 0.8 1 V11 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 0.2 0.4 0.6 0.8 1 V12 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 3.4 3.45 3.5 3.55 3.6 Vc1 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 -0.02 -0.04 -0.06 -0.08 -0.1 -0.12 -0.14 0.02 0.04 0.06 0.08 0.1 0.12 Ir 0 0.2 0.4 0.6 0.8 1 V11 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 0.2 0.4 0.6 0.8 1 V12 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 3.42 3.44 3.46 3.48 3.5 3.52 3.54 3.56 3.58 3.6 Vc1 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 -0.02 -0.04 -0.06 -0.08 -0.1 -0.12 -0.14 0.02 0.04 0.06 0.08 0.1 0.12 Ir Ir(A) Gate Q11,Q12 Gate Q21,Q22 Vc1(V) Ir(A) Ir(A) Ir(A) Vc1(V) Vc1(V) Vc1(V) Gate Q11,Q12 Gate Q21,Q22 Gate Q11,Q12 Gate Q21,Q22 Time (ms) Gate Q11,Q12 Gate Q21,Q22
  • 6. IJRET: International Journal of Research in Engineering and Technology eISSN: 2319-1163 | pISSN: 2321-7308 __________________________________________________________________________________________ Volume: 03 Special Issue: 07 | May-2014, Available @ http://www.ijret.org 236 Time (ms) Fig -15 Simulation waveforms of the two-cell system with a smaller inductor To avoid overlapping of switches a dead time circuit is designed and used in the control circuit of the system. It is shown in the fig. 16 given below. The gap between the pulses is the dead time. Time (ms) Fig -16 Waveform showing dead time between triggering pulses 5. CONCLUSIONS In this system control part is easier and no need of monitoring arrangements which will reduce system cost and maintenance. At the same time it will balance the system accurately and achieves zero voltage gap between cells. This system can be used in low voltage applications also to balance the cells. In the proposed system a modified control circuit is used to avoid overlapping of the switches in the equalizer. This makes the system more reliable and safe to handle. REFERENCES [1] H.-S. Park, C.-H. Kim, K.-B. Park, G.-W. Moon, and J.-H. Lee, “Design of a charge equalizer based on battery modularization,” IEEE Trans. Veh. Technol., vol. 58, no. 7, pp. 3216–3663, Sep. 2009. [2] K. W. E. Cheng and P. D. Evans, “Calculation of winding losses in high frequency toroidal inductors using single-strand conductors,” IEE Proc. Elect. Power Appl., vol. 141, no. 2, pp. 52–62, Mar. 1994. [3] A. C. Baughman andM. Ferdowsi, “Double-tiered switched-capacitor battery charge equalization technique,” IEEE Trans. Ind. Electron., vol. 55, no. 6, pp. 2277–2285, Jun. 2007. [4] K. Sano and H. Fujita, “A resonant switched-capacitor converter for voltage balancing of series-connected capacitors,” in Proc. Int. Conf. Power Electron. Drive Syst., 2009, pp. 683–688. [5] Ye Yuanmao, K. W. E. Cheng, and Y. P. B. Yeung, “Zero-Current Switching Switched-Capacitor Zero- Voltage-Gap Automatic Equalization System for Series Battery String” in IEEE Transactions on Power Electronics, vol. 27, no. 7, pp. 3234-3242, July 2012. BIOGRAPHIES Soumya Sunny received the B.Tech degree from University of Calicut, Kerala. She is currently pursuing M. Tech degree in Power Electronics & Drives from Karunya University, Coimbatore, Tamil Nadu. Her research interests include battery management system and embedded system applications in battery balancing. She is a student member of IEEE. Priyanka K was born in Kasargod (dist) Kerala, India in 1990. She received her B. Tech degree from Kannur University, Kerala. She is a student member of IEEE. She is currently pursuing M. Tech degree in Power Electronics and Drives from Karunya University, Coimbatore, Tamil Nadu. Her main research interests include renewable energies and distributed generation, power electronic converters. 0 0.2 0.4 0.6 0.8 1 V11 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 0.2 0.4 0.6 0.8 1 V12 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 3.35 3.4 3.45 3.5 3.55 3.6 Vc1 0 0.0002 0.0004 0.0006 0.0008 0.001 Time (s) 0 -0.05 -0.1 -0.15 -0.2 0.05 0.1 0.15 Ir 0 2e-005 4e-005 6e-005 8e-005 0.0001 Time (s) 0 0.2 0.4 0.6 0.8 1 V11 V12 Ir(A)Vc1(V) Gate Q11,Q12 Gate Q21,Q22 Gate