It is a 16-bit Microprocessor(μp). It’s ALU, internal registers
works with 16 bit binary word.
8086 has a 20 bit address bus can access up to 220 = 1 MB memory
8086 has a 16 bit data bus. It can read or write data to a
memory/port either 16 bits or 8 bit at a time.
8086 is designed to operate in two modes, Minimum mode and
Fig: Internal block diagram of 8086 Microprocessor
BUS INTERFACE UNIT
BIU provides necessary function including generation
of the memory and the input unit.
It transfers data between itself and the surrounding
BIU converts logical address into physical address with
the help of segment registers.
BIU contains four 16 bit segment registers, which are
Code segment(CS) register
Code segment (64KB)
Data segment (64KB)
Extra segment (64KB)
Stack segment (64KB)
It is a 16 bit register, which identifies the location of the next word
of instruction code that is to be fetched in the current CS.
IP contains an offset instead of the actual address of the next
The 20 bit address produced after addition of the offset stored in
the IP to the segment base address in the CS is called the physical
address of the code byte.
The last segment of BIU is the FIFO group of registers
called as queue.
The arrangement makes it possible for the BIU to fetch the
instruction byte while EU is decoding an instruction or
executing an instruction which does not require use of
This arrangement is called pipelining which is done to
speed up the program execution.
The EU of 8086 contains -
Arithmetic Logic Unit [ALU]
General Purpose Registers
Pointers and Index Registers
EXECUTION UNIT – General Purpose Registers
8 bits 8 bits
8 bits 8 bits
EXECUTION UNIT – Flag Register
U U U U OF DF IF TF SF ZF U AF U PF U CF
A flag is a flip flop which indicates some conditions produced by the
execution of an instruction or controls certain operations of the EU .
6 flags indicates some conditions- status flags
3 flags –control Flags
Over flow Direction
U - Unused
Pointer And Index Registers
Used to keep offset addresses.
SP: Stack pointer
BP: Base Pointer
SI: Source Index register
DI: Destination Index register
Minimum Mode System :-
In a minimum mode 8086 system, the microprocessor 8086 is operated in
minimum mode by strapping its MN/MX pin to logic 1.
In this mode, all the control signals are given out by the microprocessor
chip itself. There is a single microprocessor in the minimum mode system.
The remaining components in the system are latches, transreceivers, clock
generator, memory and I/O devices. Some type of chip selection logic may
be required for selecting memory or I/O devices, depending upon the
address map of the system.
Transceivers are the bidirectional buffers and sometimes they are called as
data amplifiers. They are required to separate the valid data from the time
multiplexed address/data signals.
Maximum Mode System :-
In the maximum mode, the 8086 is operated by strapping the
MN/MX pin to ground.
In this mode, the processor derives the status signal S2, S1,
Another chip called bus controller derives the control signal
using this status information.
In the maximum mode, there may be more than one
microprocessor in the system configuration.
1. State design factors in design of instruction format. Draw instruction format for
Intel processors and explain various fields in it.
2. What are the different types of operand and operations.
3. State and explain any 4 addressing modes with examples for INTEL
processors. (08) Dec 2009
4. Draw and explain architecture of Intel processor.
5. State and explain any 4 addressing modes with examples for Intel processors
6. Draw timing diagram for memory read cycle of 8086 and list operations in
each T state.
7. Draw timing diagram for memory write cycle of 8086 and list operations in
each T state.
8. Write a note on MIN/MAX mode of 8086.
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