RAJIV GANDHI COLLEGE OF ENGINEERING & RESEARCH,NAGPUR.
(An autonomous Institution Affiliated to Rashtrasant Tukadoji Maharaj Nagpur University)
DEPARTMENT OF ELECTRICAL ENGINEERING
DESIGNANDANALYSISOFH-BRIDGEMULTILEVEL INVERTER
NAME OF THE STUDENT: MR.PRATIK GABHANE,MR.RAJENDRA LANJEWAR,ARJUN SAXENA,MILIND WALDE,MS.SEEMA APPA
NAME OF THE GUIDE: MRS. SARIKA D PATIL, NAME OF CO-GUIDE: Dr. SUMANT G KADWANE
s
Abstract:. Cascaded multilevel inverters synthesize a medium voltage output based on a series connection of power cells which use standard low-voltage component configurations. This characteristic allows one to achieve high-quality output
voltages. Due to these features, the cascaded multilevel inverter has been recognized as an important alternative in the medium-voltage inverter market.Multilevel inverters with a large number of steps can generate high quality voltage waveforms, good
enough to be considered as suitable voltage source generators. Multilevel inverters have been important devices developed in recent years, owing to their capability to increase the voltage and power delivered to the load. Researches done based on
basic inverter topologies show that, multilevel inverters have many advantages such as low power dissipation on power switches, low harmonic and low electromagnetic interference (EMI) outputs. A modified cascaded H-bridge
Inverter for 3-Level and 5-Level Inverter is proposed in this project. And Also simulated results have been shown through MATLAB/Simulink Software.
Introduction:
It is seen that cascaded H-bridges are the most convenient
solution. The H-bridge cells have a strong switching
bandwidth up to 40 KHz, owing to its robustly
designed block. The cascaded H-bridge cells have been
constituted by MOSFET semiconductors with a constant DC
source from 12V. To simulate the proposed method MATLAB /
SIMULINK software is required. Also hardware setup is
required to validate the simulated results with the existing
setup. The basic structure of cascaded H Bridge multilevel
inverter is shown in simulated designs. And the output of
inverter output will be +Vdc, 0, -Vdc with a dc as a input as
shown in Simulation results.
Simulated Designs:
Simulation results:
1) SPWM Output 2) Three Level Output 3) Five Level Output
Fig.(1) Fig.(2) Fig.(3)
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
Time (Sec)
Phase OppositionDisposition
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
-800
-600
-400
-200
0
200
400
600
800
Conclusion and Future scope:
By Simulating Inverter Block in MATLAB/Simulink Environment Three
Level & Five Level Outout of a Inverter can be obtained. The input DC
Voltage is 12V for Multilevel Inverter and simultaneously output of 12 V is
obtained for 3-Level as shown in simulation results. Similarly output of 24V
is obtained for 5-Level Output. For future scope three phase three level or
three phase five level multilevel inverter can be implemented with harmonic
Analysis.
References:
[1] J. Rodriguez, J.S. lai, and F.Z. Peng, “ Multilevel Inverters: A Survey of topologies,
controls , and applications”, IEEE Trans on Industrial Electronics, Vol. 49, No. 4, pp
724-738, Aug 2002.
[2] Ilhami Colak, Ramazan Bayindir, Ersan Kabalci, “ Design and Analysis of 7-Level
Cascaded Multilevel Inverter with Dual SDCSs”, IEEE Trans on Power Electron, pp.
180-185.2010.
[3] K. Corzine and Y. Familiant, “A new cascaded multilevel H-bridge drive,” IEEE
Trans on Power Electron., Vol. 17, No. 1, pp. 125–131, Jan. 2002.

FINAL Poster

  • 1.
    RAJIV GANDHI COLLEGEOF ENGINEERING & RESEARCH,NAGPUR. (An autonomous Institution Affiliated to Rashtrasant Tukadoji Maharaj Nagpur University) DEPARTMENT OF ELECTRICAL ENGINEERING DESIGNANDANALYSISOFH-BRIDGEMULTILEVEL INVERTER NAME OF THE STUDENT: MR.PRATIK GABHANE,MR.RAJENDRA LANJEWAR,ARJUN SAXENA,MILIND WALDE,MS.SEEMA APPA NAME OF THE GUIDE: MRS. SARIKA D PATIL, NAME OF CO-GUIDE: Dr. SUMANT G KADWANE s Abstract:. Cascaded multilevel inverters synthesize a medium voltage output based on a series connection of power cells which use standard low-voltage component configurations. This characteristic allows one to achieve high-quality output voltages. Due to these features, the cascaded multilevel inverter has been recognized as an important alternative in the medium-voltage inverter market.Multilevel inverters with a large number of steps can generate high quality voltage waveforms, good enough to be considered as suitable voltage source generators. Multilevel inverters have been important devices developed in recent years, owing to their capability to increase the voltage and power delivered to the load. Researches done based on basic inverter topologies show that, multilevel inverters have many advantages such as low power dissipation on power switches, low harmonic and low electromagnetic interference (EMI) outputs. A modified cascaded H-bridge Inverter for 3-Level and 5-Level Inverter is proposed in this project. And Also simulated results have been shown through MATLAB/Simulink Software. Introduction: It is seen that cascaded H-bridges are the most convenient solution. The H-bridge cells have a strong switching bandwidth up to 40 KHz, owing to its robustly designed block. The cascaded H-bridge cells have been constituted by MOSFET semiconductors with a constant DC source from 12V. To simulate the proposed method MATLAB / SIMULINK software is required. Also hardware setup is required to validate the simulated results with the existing setup. The basic structure of cascaded H Bridge multilevel inverter is shown in simulated designs. And the output of inverter output will be +Vdc, 0, -Vdc with a dc as a input as shown in Simulation results. Simulated Designs: Simulation results: 1) SPWM Output 2) Three Level Output 3) Five Level Output Fig.(1) Fig.(2) Fig.(3) 0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 Time (Sec) Phase OppositionDisposition 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 -800 -600 -400 -200 0 200 400 600 800 Conclusion and Future scope: By Simulating Inverter Block in MATLAB/Simulink Environment Three Level & Five Level Outout of a Inverter can be obtained. The input DC Voltage is 12V for Multilevel Inverter and simultaneously output of 12 V is obtained for 3-Level as shown in simulation results. Similarly output of 24V is obtained for 5-Level Output. For future scope three phase three level or three phase five level multilevel inverter can be implemented with harmonic Analysis. References: [1] J. Rodriguez, J.S. lai, and F.Z. Peng, “ Multilevel Inverters: A Survey of topologies, controls , and applications”, IEEE Trans on Industrial Electronics, Vol. 49, No. 4, pp 724-738, Aug 2002. [2] Ilhami Colak, Ramazan Bayindir, Ersan Kabalci, “ Design and Analysis of 7-Level Cascaded Multilevel Inverter with Dual SDCSs”, IEEE Trans on Power Electron, pp. 180-185.2010. [3] K. Corzine and Y. Familiant, “A new cascaded multilevel H-bridge drive,” IEEE Trans on Power Electron., Vol. 17, No. 1, pp. 125–131, Jan. 2002.