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  K. VENU NAIK
TECHNICAL SKILLS
Electronic Design Packages
XILINX, QUESTASIM, MODELSIM, INCISIVE, RTL 
COMPILER, ENCOUNTER, VIRTUOSO(Schematic,
Layout), ET(DFT).
Programming Languages 
VERILOG, SYSTEM­VERILOG, C­PROGRAMING
Microcontrollers /  FPGA FPGA [XILINX SPARTAN 6 ,SPARTAN 3E]
Familiar Protocols SPI AND I2C  PROTOCOL
Familiar OS WINDOWS , LINUX­OS
Work Experience
Currently working at Cadence Design System Inc, Banglore as Application 
Engineer (Consultant) from September 2015 to till date.
Projects
1. Universal Shift Register, Booth Multiplier, FIFO.                  
Tools: XILINX ISE ,Questasim.
2. VGA controller and implementation on Xilinx FPGA
.Tools: Xilinx ISE
3. Feasibility  Study  &  System  Design  of  Cloud  based  Intelligent  ECG  System                   
(Department of Science Technology project) .
Tools: MATLAB
PROFESSIONAL COURSES
Completed Professional  Development program in VLSI system Design, 
from Sandeepani School of VLSI Design. 
Workshop
 Verified PLL schematic using functional verification techniques for the 
complete transistor level design using Cadence PDK generic 45nm process.
 Verified ADC schematic design  using Cadence PDK generic 45nm process
EDUCATION
Name of 
course
/degree
University/Board Specialization Year 
Pass 
Out
Aggregate
M.Tech IIT­BHU DTI 2013 83.8
B.Tech JNTUH ECE 2010 66.2
Intermediate Narayana Jr College MPC 2006 76.8
SSC Sri Krishnaveni Talent 
School
2004 80.8
Extra Curricular Activities
 Delivered 4‐day training at NIT, Warangal ,MVSR Engineering College on 
complete custom IC flow.
 Delivered 1‐day training at DLRL, Hyderabad on basic Virtuoso flow up to 
simulations.
 Delivered 2‐day training at NIT, Durgapur on complete custom IC flow using 
HISIM CMOS.
ACCOMPLISHMENTS
● Qualified GATE for three times (2011, 2014, 2015.)
● Holding National Cadet Corps (NCC) certificate. 
● Ranked 2nd
 in a technical event conducted by “Mentor Graphics”
● Poster presentation on “automatic speed control in four wheeler” at national 
level symposium.
● Participated in “Robotics” (Robowarz) at VBIT conducted by Xilinx.
. 
PERSONAL DETAILS
Date of Birth : 3rd
 May, 1987.
Address : House No. 14/ 137/2/1/A­G1, New Mirzalguda, 
Malkajgiri, Hyderabad­500047.
Languages Known : Telugu, English and Hindi
Email ID                 : venunaik.k@gmail.com
Mobile No : +91­9066129269, +91­9652864468.
 DECLARATION
I do here by declare that all the above statements are true to the best of my knowledge 
and belief.
Place­ Bangalore                                                               Signature of the Candidate         
Date­

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Resume Digital & Analog

  • 1.   K. VENU NAIK TECHNICAL SKILLS Electronic Design Packages XILINX, QUESTASIM, MODELSIM, INCISIVE, RTL  COMPILER, ENCOUNTER, VIRTUOSO(Schematic, Layout), ET(DFT). Programming Languages  VERILOG, SYSTEM­VERILOG, C­PROGRAMING Microcontrollers /  FPGA FPGA [XILINX SPARTAN 6 ,SPARTAN 3E] Familiar Protocols SPI AND I2C  PROTOCOL Familiar OS WINDOWS , LINUX­OS Work Experience Currently working at Cadence Design System Inc, Banglore as Application  Engineer (Consultant) from September 2015 to till date. Projects 1. Universal Shift Register, Booth Multiplier, FIFO.                   Tools: XILINX ISE ,Questasim. 2. VGA controller and implementation on Xilinx FPGA .Tools: Xilinx ISE 3. Feasibility  Study  &  System  Design  of  Cloud  based  Intelligent  ECG  System                    (Department of Science Technology project) . Tools: MATLAB PROFESSIONAL COURSES Completed Professional  Development program in VLSI system Design,  from Sandeepani School of VLSI Design.  Workshop  Verified PLL schematic using functional verification techniques for the  complete transistor level design using Cadence PDK generic 45nm process.  Verified ADC schematic design  using Cadence PDK generic 45nm process
  • 2. EDUCATION Name of  course /degree University/Board Specialization Year  Pass  Out Aggregate M.Tech IIT­BHU DTI 2013 83.8 B.Tech JNTUH ECE 2010 66.2 Intermediate Narayana Jr College MPC 2006 76.8 SSC Sri Krishnaveni Talent  School 2004 80.8 Extra Curricular Activities  Delivered 4‐day training at NIT, Warangal ,MVSR Engineering College on  complete custom IC flow.  Delivered 1‐day training at DLRL, Hyderabad on basic Virtuoso flow up to  simulations.  Delivered 2‐day training at NIT, Durgapur on complete custom IC flow using  HISIM CMOS. ACCOMPLISHMENTS ● Qualified GATE for three times (2011, 2014, 2015.) ● Holding National Cadet Corps (NCC) certificate.  ● Ranked 2nd  in a technical event conducted by “Mentor Graphics” ● Poster presentation on “automatic speed control in four wheeler” at national  level symposium. ● Participated in “Robotics” (Robowarz) at VBIT conducted by Xilinx. .  PERSONAL DETAILS Date of Birth : 3rd  May, 1987. Address : House No. 14/ 137/2/1/A­G1, New Mirzalguda,  Malkajgiri, Hyderabad­500047. Languages Known : Telugu, English and Hindi Email ID                 : venunaik.k@gmail.com Mobile No : +91­9066129269, +91­9652864468.  DECLARATION I do here by declare that all the above statements are true to the best of my knowledge  and belief. Place­ Bangalore                                                               Signature of the Candidate          Date­