This document provides an introduction to JFETs (junction field effect transistors). It defines key terms like source, drain, gate, and channel. It explains that JFETs are voltage-controlled, unipolar devices and discusses n-channel and p-channel JFET operation. The document also derives the mathematical expression for pinch-off voltage and defines the ohmic, saturation, and breakdown regions of the JFET voltage-ampere characteristics.

1. Introduction to JFET
Dr. Varun Kumar
Dr. Varun Kumar (IIIT Surat) 1 / 16

2. Outlines
1 Introduction to FET
2 Classification of FET
3 Common Terminology in FET
4 FET Operation
5 Pinch-Off voltage
6 JFET Volt-Ampere characteristics
Dr. Varun Kumar (IIIT Surat) 2 / 16

3. Introduction to FET
Basic difference between BJT and FET
Sr no BJT FET
1 It is a bipolar device. It is a unipolar device.
2
Its operation depends
on hole and electron.
Its operation depends on
majority charge carrier.
3 It is a current controlled device. It is a voltage controlled device.
4 Input impedance is very low. Input impedance is very high.
5
It requires large physical
space for fabrication.
Small physical space
for fabrication.
Dr. Varun Kumar (IIIT Surat) 3 / 16

4. Classification of FET
1 JFET (Junction field effect transistor)
(1) n-channel
(2) p-channel
2 MOSFET (Metal oxide semiconductor field effect transistor)
(1) Depletion type MOSFET
n-channel
p-channel
(2) Enhancement type MOSFET
n-channel
p-channel
NOTE⇒ FET is a symmetrical device, irrespective of BJT.
Dr. Varun Kumar (IIIT Surat) 4 / 16

5. Common terminology
1 Source: A terminal, where majority charge carriers enter the bar.
2 Drain: A terminal, where majority charge carriers leave the bar.
3 Gate: From figure, n-type semiconductor bar has been heavily doped
on two faces with p+ material. This impurities terminals are called as
gate.
Dr. Varun Kumar (IIIT Surat) 5 / 16

6. Continued–
4 Channel: There are two types (n-channel and p-channel) of JFET.
Above figure is a n-channel JFET.
5 VGS → Gate to source voltage (VGS = −VGG = Supply voltage)
6 VDS → Drain to source voltage (VDS = VDD= Supply voltage)
7 ID → Drain current, IG → Gate current
Dr. Varun Kumar (IIIT Surat) 6 / 16

7. FET Operation
⇒ Two sides of the reverse biased p-n junction.
⇒ There are space charged regions between p-n junction.
Q What is field effect ?
Ans Current (ID) control is done by increasing the reverse bias voltage. In
other words, reverse bias creates any electric field that affect the flow
of current or conduction of the majority charge carrier.
ID = f (VGS , VDS )
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8. Symbol of p and n channel JFET
⇒ For n-channel JFET, ID and VDS are positive and VGS is negative.
⇒ For p-channel JFET, ID and VDS are negative and VGS is positive.
Note: The sign of arrow, shows the direction of conventional current.
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9. FET Characteristics
⇒ Ohmic region: The region (set of ID and VDS ), where circuit follow
the Ohm’s law or VDS = RID for any VGS
⇒ Saturation region: The drain current becomes constant for
particular VGS , irrespective of VDS .
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10. Continued–
⇒ Breakdown region: Self destruction of device for particular VDS is
called as breakdown region.
⇒ Pinch off region: The amount of negative VGS (in case of n-channel
JFET) for which the conduction could not be happened due to
majority charge carrier.
Dr. Varun Kumar (IIIT Surat) 10 / 16

11. Pinch off voltage Vp
⇒ It is a gate to source voltage in reverse bias condition, so that no
conduction or ID ≈ 0 could be possible.
⇒ This analysis was first made by Shockley.
⇒ A n-type semiconductor is sandwiched between two layers of p-type
material forming two p-n junction.
⇒ p-type region is doped with NA acceptor per cubic meter.
⇒ n-type region is doped with ND acceptor per cubic meter.
⇒ W = Wn + Wp → Total space charge width.
Wp → Space charge width due to hole.
Wn → Space charge width due to electron.
⇒ If NA >> ND then Wp << Wn. Hence Wn(x) = W (x) at a distance
x along the channel
Dr. Varun Kumar (IIIT Surat) 11 / 16

12. Mathematical expression for pinch off voltage
W (x) = a − b(x) =
n 2
qND
(V0 − V (x))
o1/2
(1)
♦ = Dielectric constant of channel material
♦ q = Magnitude of electronic charge
♦ V0 = Junction contact potential at x.
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13. When ID = 0
♦ V (x)= Applied potential across space-charge region at x and is a
negative number for an applied reverse bias.
♦ a − b(x)= Penetration W (x) of depletion region into channel at a
point x along channel.
♦ Note: If drain current is zero, i.e. ID = 0, b(x) and V (x) are
independent of x. Hence, b(x) = b
♦ If we substitute b(x) = b = 0 and solve for V on the assumption
V0 |V |. We obtain the pinch-off voltage Vp. Hence,
|Vp| =
qND
2
a2
(2)
Note: If we substitute VGS = V0 − V (x)
VGS =
1 −
b
a
2
Vp (3)
Dr. Varun Kumar (IIIT Surat) 13 / 16

14. Example
Q For an n-channel silicon FET with a = 3 × 10−4cm and
ND = 1015electrons/cm3. Find
(a) Pinch-off voltage
(b) The channel half width for VGS = 1
2 Vp and ID = 0
Hint: = r 0, r → Silicon=12
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15. JFET VOLT-AMPERE Characteristics
⇒ Now, small VDS is applied between drain and source.
⇒ Small ID will flow from drain to source.
⇒ The effective channel cross section area = A = 2bw.
⇒ 2b = Channel width corresponding to zero drain current.
⇒ w = Channel dimension perpendicular to the b direction.
⇒ Using Ohm’s law, no current flows in the depletion region. Hence the
drain current
ID = AqNDµnζ = 2bwqNDµn
VDS
L
(4)
L is the length of the channel.
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16. Continued–
Substituting b from (3) in (4), we have for small ID,
ID =
2awqNDµn
L
h
1 −
VGS
Vp
1/2i
VDS (5)
⇒ Above expression shows the volt ampere characteristics for small VDS .
⇒ For small VDS , JFET behaves like an ohmic resistance whose value is
determined by VGS .
⇒ The ration VDS
ID
at the origin is called the ON drain resistance rd,ON.
At VGS = 0
rd,ON =
L
2awqNDµn
(6)
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