This is my Resume / Curriculum Vitae updated upto July 2015.

1. S H A N T A N U P . T E L H A R K A R
OBJECTIVE
I have cultivated a growing interest in Digital Electronics over the period of my bachelor’s course. By aiming at
gaining deeper insights through projects, I wish to continue gaining expertise in this field. I aim at involving in cutting-
edge research in the field of Computer Architecture and System-on-chip Architecture, to develop ingenious solutions
for the next generation gadgets.
Belief: I believe that research in both these fields must be accelerated to cope up with the increasing reliance of
mankind on Automation and Internet-of-things.
Short Term Objective: Masters in Digital VLSI.
Long Term Objective: Computer Architect.
EDUCATION
School: Sister Nivedita English Medium School, Dombivli (East).
Pin – 421201.
Degree – Secondary School Certificate.
Year of Passing – 2009.
Percentage- 88.62%.
Higher School: K.V. Pendharkar College of Arts, Science and Commerce, Dombivli (East).
Web Address- http://www.kvpendharkarcollege.org/
Pin – 421201.
Degree – Higher Secondary Certificate.
Year of Passing – 2011.
Percentage- 77.50%.
Undergraduation Institution: KJ Somaiya College of Engineering, Vidyavihar.
University – University of Mumbai. Pin – 400077.
Web Address- http://www.somaiya.edu/kjsce/
Degree – Bachelor of Engineering in Electronics.
Current year – Fourth (Year of Passing – 2015).
Percentage- 59.56%.
PROJECTS
 FINAL YEAR PROJECT:
(FPGA Implementation of Motion Control Interface) :
Details: FPGA was used as a Motion Control Interface. Language used : Verilog. Device Used : Xilinx FPGA
Spartan 6. The FPGA acts a slave device that communicates with its master using SPI protocol. The
number of rotations, speed and direction of motor can be efficiently manipulated by the Master device
using this logic circuit. The Slave Controller has arrangements to control motors of about eight different
axes at a time with utmost synchrony.
Current and Permanent Address: 29, Railway Mens’ CHS,
Near Dombivli Gymkhana, Kalyan Road, Dombivli (East),
Thane, Maharashtra, India. Pin Code – 421201.
Email: shantanutelharkar@gmail.com
Tel No: +91-9773007147 Mobile No.: +91-9664335517

2. A Floating Point Processor was added to compute fractional values given by the user. An
implementation of algorithm similar to that of Bresenham’s algorithm was done to achieve best possible
approximation. Arduino Duemilanove was imputed as the Master of the Slave Motion Controller Device.
 Autonomous Motion Sensor:
Details: An Autonomous Motion Sensing Unit for the industry was made. Hall effect sensors were used
to track the motion, whereas, Texas Instruments’ Launchpad was used as a microcontroller. Quadrature
Decoding technique was used to measure number of rotations and direction of speed. An UART module
to send data to host computer was incorporated. Besides, a hibernation module was employed to
ensure minimal power consumption whenever possible.
 5-stage pipelined processor:
Details: A 16-bit 5-stage pipelined processor was developed. This was a project done in the certified
course of ‘Frontend VLSI Design’. A processor capable of performing arithmetic and logical functions was
implemented using Verilog. Moreover, hazards involved in implementing pipeline structure of the
processor were eliminated by employing extra logic circuits to deal with the dependencies and other
discrepancies.
 Improvisation in Processor:
Currently working on the 5-stage pipelined processor to improve its performance by incorporating a
Vedic ALU (includes computation using fast Indian Vedic algorithms) and superscalar architecture.
 Minor projects in Digital VLSI:
1. Adders: Brent-kung adder, Carry Look Ahead Adder & Kogge Stone Adder.
2. Multiplier: 8-bit Wallace Tree Multiplier.
3. Other: BCD Count down Timer.
GRE SCORE
Verbal : 153 Quants : 159 Total : 312 AWA : 3.0
TOEFL SCORE
Reading : 28 Listening : 27 Speaking : 27 Writing : 27 Total : 109
TECHNICAL EXPERIENCE
 Certified Course:
Details: Pursued a certified course of Frontend Digital VLSI by Professor Hardik Shah (MS in VLSI).
Projects like Brent-kung adder, Carry Look Ahead Adder, BCD countdown timer and a 16-bit 5-stage
pipelined processor were designed in Verilog.
Rank in the course : 5. Grade : A+.
 Summer Internship:
Details:
1. Company : Interfaces Design Associates Private Limited.
2. Website : http://www.idapl.in/
3. Period : May 2014 to August 2014.
4. Projects
a. Motion sensing unit for motors using quadrature decoding.
b. Motion Control Interface Implementation using FPGA.
 Teaching Assistantship:
Worked as a teaching assistant for Professor Arati Phadke during a VHDL course conducted by her for
junior year students. Being a 2 month course, it was comprehensive and covered several assignments.
TECHNICAL PUBLICATIONS

3. Telharkar Shardul, Telharkar Shantanu, Pednekar Raj, “An efficient approach to an 8-bit digital multiplier architecture
based on Ancient Indian Mathematics.” Volume. 4, Issue. 06, June- 2015 of International Journal of Engineering
Research & Technology (IJERT) (ISSN: 2278-0181), DOI- http://dx.doi.org/10.17577/IJERTV4IS060918
TECHNICAL SKILLS
1. Application Software Tools like Xilinx, Microwind, PSpice, Code Composer Studio, and Arduino IDE are
known.
2. Basic Knowledge of Android programming is known.
3. Software tools accustomed to -
a) Code Composer Studio (for Texas Instruments)
b) PSOC creator (for Cypress devices).
c) Xilinx ISE (Xilinx FPGAs in Verilog or VHDL).
d) Quartus (Altera FPGAs in Verilog or VHDL).
e) Eclipse (Android programming).
f) Arduino IDE (Arduino devices).
CO-CURRICULAR ACTIVITES
1. Participation Certificate in Technical Paper Presentation in Techxter 3.0. Topic : Intelligent Shopping carts.
2. Completed an Android Development workshop at Techfest 2013 IIT, Bombay.
3. Completed a course on Digital Front End VLSI by Hardik Shah at VLSI Modules, Ghatkopar with A+ grade.
4. Nominated and working as a “Teaching Assisstant” at VLSI Modules.
EXTRA CURRICULAR ACTIVITIES
1. Secured Maharashtra Board Scholarship in the 7th grade.
2. Secured distinction in Maharashtra Dnyanpeeth in Feb. 2006.
3. Secured First Prize a Drawing Competition held by Karandikar Kala Academy In 2002 -03.
4. Tabla: Exams passed with distinction: 2. Also, played tabla at Heramb Music Academy Orchestra.
5. Passionately learning drums.