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Vajrala Mounika Phone: 9290573382| Email: vajralamounika@gmail.com,
3-41, Bollapadu, Krishna (Dist), Andhra Pradesh-521261
Objective: Seeking a challenging and rewarding opportunity in Production, Design and Verification with a well reputed
organization which recognizes and utilizes my true potential while nurturing my skills.
Education
PG Diploma in VLSI &Embedded
Hardware design from NIELIT
Calicut in 2018.

B.Tech in ECE with 67.5%
G.V.P.C.E.W, Visakhapatnam
in 2017.

Diploma in Electronics with
71.5% from Nettur Technical
Training & Foundation (NTTF)
in 2011.
Secondary school Certificate
with 71.1% from Sri Srinivasa
English (M.D) School in 2008.
Projects
1.Design for Verification of CAN Protocol
Controller using System Verilog (1Mb/s)
using ModelSim® and XILINX ®Tools.
2.Designed A 8-Bit RISC stored program
machine using Verilog programming with
ModelSim®Tool.
3.Smart Home using IOT Technology-a
Simple smart home prototype will be built,
monitored and controlled through
NodeMCU and an Android application via
wireless communication (Bluetooth,
Internet) using Arduino IDE, MIT App
Inventor, Think Speak (Web Server)
coding in Embedded C.
4.Moving Free Robo-(Industrial Project)
To build a Robo which carries UPS and
Inverters inside the company in a pre
defined path which is set by the user.
Skills

HDLs: Verilog
HVLs: System Verilog
Verification Methodologies:
Coverage driven verification
TB Methodologies: UVM
Languages: C, VHDL, Linux
Basic commands, Knowledge in
PERL Scripting and Python.
Operating systems:
windows, Linux.
Proficient in RTL design
and verification.
Technology: 180nm, 90nm,
45nm.
Knowledge: ASCI Front end,
Back end design, RTL Coding,
FSM based design, Simulation,
Code coverage, Synthesis, FPGA
Prototyping, PCB Designing and
Electronics Hardware Design.


Tools
 ModelSim® for RTL design
 Cadence - Genus™ for synthesis,
Innovus® for physical design,
Virtuoso® for custom IC design,
Assura® for physical verification
 XILINX® ISE Design Suite
 VIVADO-Xilinx Vivado Design
Suite
 Arduino
Experience
 Worked as Test Technician from
August 2011 to March 2014 in NOKIA
INDIA PVT. LTD, Chennai.
 Recommending & Implementing new
solutions to improve the productivity
and reduce downtime through Kaizens
and projects
 Total work Experience: 2 year 8
months.

Participations

 Attended an IEEE workshop
on “Python Quick Start”
organized by NIELIT
Calicut Collaboration with
IEEE Malabar subsection
 Participation in Blood
Donation camp
 Active participation in
sports committee
 Active participation in 5’s
 Active participation in
workshop
Reference:
1. R.Nanda Kumar, Scientist/Engineer ‘C’, National Institute of Electronics And Information Technology, Calicut; nanda24x7@gmail.com .
2. Jayaraj U Kidav, Scientist/Engineer ‘D’, National Institute of Electronics And Information Technology, jayaraj@calicut.nielit.in
Nationality: INDIAN, Date Of Birth: 18/08/1993.

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V mounika cv

  • 1. Vajrala Mounika Phone: 9290573382| Email: vajralamounika@gmail.com, 3-41, Bollapadu, Krishna (Dist), Andhra Pradesh-521261 Objective: Seeking a challenging and rewarding opportunity in Production, Design and Verification with a well reputed organization which recognizes and utilizes my true potential while nurturing my skills. Education PG Diploma in VLSI &Embedded Hardware design from NIELIT Calicut in 2018.  B.Tech in ECE with 67.5% G.V.P.C.E.W, Visakhapatnam in 2017.  Diploma in Electronics with 71.5% from Nettur Technical Training & Foundation (NTTF) in 2011. Secondary school Certificate with 71.1% from Sri Srinivasa English (M.D) School in 2008. Projects 1.Design for Verification of CAN Protocol Controller using System Verilog (1Mb/s) using ModelSim® and XILINX ®Tools. 2.Designed A 8-Bit RISC stored program machine using Verilog programming with ModelSim®Tool. 3.Smart Home using IOT Technology-a Simple smart home prototype will be built, monitored and controlled through NodeMCU and an Android application via wireless communication (Bluetooth, Internet) using Arduino IDE, MIT App Inventor, Think Speak (Web Server) coding in Embedded C. 4.Moving Free Robo-(Industrial Project) To build a Robo which carries UPS and Inverters inside the company in a pre defined path which is set by the user. Skills  HDLs: Verilog HVLs: System Verilog Verification Methodologies: Coverage driven verification TB Methodologies: UVM Languages: C, VHDL, Linux Basic commands, Knowledge in PERL Scripting and Python. Operating systems: windows, Linux. Proficient in RTL design and verification. Technology: 180nm, 90nm, 45nm. Knowledge: ASCI Front end, Back end design, RTL Coding, FSM based design, Simulation, Code coverage, Synthesis, FPGA Prototyping, PCB Designing and Electronics Hardware Design.  
  • 2. Tools  ModelSim® for RTL design  Cadence - Genus™ for synthesis, Innovus® for physical design, Virtuoso® for custom IC design, Assura® for physical verification  XILINX® ISE Design Suite  VIVADO-Xilinx Vivado Design Suite  Arduino Experience  Worked as Test Technician from August 2011 to March 2014 in NOKIA INDIA PVT. LTD, Chennai.  Recommending & Implementing new solutions to improve the productivity and reduce downtime through Kaizens and projects  Total work Experience: 2 year 8 months.  Participations   Attended an IEEE workshop on “Python Quick Start” organized by NIELIT Calicut Collaboration with IEEE Malabar subsection  Participation in Blood Donation camp  Active participation in sports committee  Active participation in 5’s  Active participation in workshop Reference: 1. R.Nanda Kumar, Scientist/Engineer ‘C’, National Institute of Electronics And Information Technology, Calicut; nanda24x7@gmail.com . 2. Jayaraj U Kidav, Scientist/Engineer ‘D’, National Institute of Electronics And Information Technology, jayaraj@calicut.nielit.in Nationality: INDIAN, Date Of Birth: 18/08/1993.