Digital electronics revision unit 5 mcq - lOGIC FAMILIES

1. Digital Electronics
Revision class (unit-5)
MCQ Prepared On 17/11/2020
Ms. P.Sivalakshmi AP/ECE/RMKCET

2. Part A
Sample MCQ
1.The number of subfamilies TTL has is
(a) 4 (b) 8 (c) 6 (d) 10
2. The logic family with highest packing density is
(a) TTL (b) IIL (c) CMOS (d) MOS
3. The logic family which is simplest to fabricate is
(a) TTL (b) IIL (c) MOS (d) CMOS

3. Part A
Sample MCQ
4.The TTL series most suitable at high frequencies is
(a) standard TTL (b) Schottky TTL
(c) FTTL (d) low power TTL
5. The fastest saturated logic family is
(a) TTL (b) ECL (c) IIL (d) MOS
6. The fastest logic family is
(a) TTL (b) ECL (c) IIL (d) MOS
7. The logic family which gives complementary output is
(a) TTL (b) ECL (c) IIL (d) MOS

4. Part A
Sample MCQ
8.The logic family ideally suited for LSI/VLSI/ULSI applications is
(a) TTL (b) ECL (c) MOS (d) CMOS
9.The newest of the logic families is the
(a) TTL (b) ECL (c) IIL (d) CMOS
10. The noise margin of a TTL gate is about
(a) 0.2v (b) 0.4v (c) 0.6v (d) 0.8v

5. Sample MCQ/ Part B
1. The TTL circuit shown in the
figure is fed with the waveform
X (also shown). All gates have
equal propagation delay of
10ns. The output of the circuit
is

6. 2. Identify the following logic circuit

7. 3.A CMOS implementation of a logic
circuit is shown below. The Boolean
logic function realized by the circuit is

8. 4.The diode shown in the circuits are
ideal.The logic function realized by the
Following circuit is
(a)X+Y (b) X.Y (c) (X+Y)’ (d) (X.Y)’

9. 5. Match List-I Logic Gates) with List-II (Characteristics) and select
the correct answer using the codes given below the lists:
List-I List-II
A. HTL 1. High fan-out
B. CMOS 2. Highest speed of operation
C. 12L 3. High noise Immunity
D. ECL 4. Lowest product power and delay

10. 6. The diode shown in the circuits are ideal. The logic
function realized by the Following circuit is
(a)XY (b)X’Y (c) (X+Y)’ (d) X.Y’