The document discusses the hybrid-π model used to represent bipolar junction transistors. It describes the key components of the model including the transistor transconductance (gm), input conductance (gb'e), feedback conductance (gb'c), base spreading resistance (rbb'), and output conductance (gce). It also discusses the collector-junction capacitance (Cc) and emitter-junction capacitance (Ce) represented in the model. Finally, it provides an overview of multi-emitter transistor structures used in TTL logic gates.

3. R.M.K COLLEGE OF ENGINEERING AND
TECHNOLOGY
DEPARTMENT OF ECE
EC8252-ELECTRONIC DEVICES
SECOND SEMESTER-I YEAR- (2020-2024 BATCH)
UNIT 2
Mrs.P.Sivalakshmi AP/ECE
SESSION:17
DATE: 13.05.2021

4. Expressions of hybrid II conductance elements:-
The low frequency h-parameters for transistors are provided by manufacturers.
Hence the hybrid II-parameters can be obtained from the know h-parameters using their
relationships.
The parameters of hybrid II-model are,
 Transistor transconductance, gm
 Input conductance, gb’e
 Feedback conductance gb’c
 Base-spreading resistance, rbb’
 Output conductance, gce.

5. Conductance between terminals B’ and E or the input conductance (gb’e)
As the value of rb’c is much greater than rb’e, most of the current Ib flows through rb’e in
the circuit shown in Fig. and the value of Vb’e is given by
Vb’e ≡ Ibrb’e
The short-circuit collector current, Ic, is given by
Ic = gm Vb’e ≡ Ibrb’e
The short-circuit current gain, hƒe, is defined as
hƒe = Ic/Ib |vct ≡ gmrb’e
Rearranging the above equation, we get
rb’e = hƒe /gm
or
gb’e = gm/ hƒe
Hybrid 𝜫 𝑪𝒐𝒏𝒅𝒖𝒄𝒕𝒂𝒏𝒄𝒆𝒔

6. Transistor’s transconductance (gm)
The transconductance of a transistor (gm) is defined as the ratio of change in Ic to change in Vb’e for
constant value of collector-emitter voltage. For common-emitter transistor configuration, the expression for
collector current is given by Ic = ICO + αIe
The value of gm is given by
gm = ժIc/ժVb’e |vCE = constant
= α ժIe / ժVb’e = α ժIe/ ժVe
The partial derivative emitter voltage with respect to the emitter current (i.e., ժVe/ ժIe)
Can be represented as the emitter resistance (re) and the dynamic resistance of a forward-biased diode(rd)
is given as rd = VT/ID
Where VT is the volt equivalent of temperature and ID is the diode current. Therefore, the value of gm can be
generalised as gm = αIe/VT = Ic-Ico/VT
As Ic >>ICO, the value of gm for an NPN transistor is positive. For a PNP transistor, the analysis can be carried
out on Similar lines and the value of gm in the case of a PNP transistor is also positive. Therefor, the above
expression for
gm is written as gm = |Ic|/VT

7. Hybrid-π Capacitances
In the hybrid-π model shown in Fig there are two capacitances, namely the collector junction barrier capacitance
(Cc) and the emitter-junction diffusion capacitance (Ce)
Collector-Junction capacitance (Cc)
The capacitance Cc is the output capacitance of the common- base transistor Configuration with the input open
(Ie = 0). As the collector-base junction is reverse-biased, Cc is the transition capacitance and it varies as (VCB)-n, where n
is ½ for abrupt junction and 1/3 for a graded junction.
Emitter-junction capacitance(Ce)
The capacitance Ce is the diffusion capacitance of the forward-biased emitter Junction and is proportional to the
emitter current Ie and is almost independent of temperature.

8. GUMMEL - POON MODEL
• The Gummel-Poon model of the BJT considers more physics of
the transistor that the Ebers-Moll model.
• This model can he used if, for example, there is a non-uniform
doping concentration in the base.
• The electron current density in the base of an npn transistor can
be written as
J𝑛= e𝜇n n(𝑥)𝐸 + e𝐷𝑛 (d𝑛(𝑥)/𝑑𝑥)
An electric field will occur in the base if non uniform doping exists in the base. Electric field can be written as
E = KT/e [1/p(x)*(d𝑝 (𝑥)/dx)]
where p(x) is the majority carrier hole concentration in the base. Under low injection, the hole concentration is just the
acceptor impurity concentration.

12. • The multi emitter IC structure is functionally equivalent to multiple transistors were the bases and collectors are tied
together. This circuit is used to implement a diode switching structure in active transistors from using parallel function
diffusion for several emitters.
MULTI EMITTER TRANSISTORS
• A Multi-emitter transistor is a specialized bipolar transistor
mostly used at the inputs of TTL NAND logic gates.
• Input signals are applied to the emitter. Collector current
stops flowing only if all emitters are driven by the logical
high voltage, thus performing an AND logical operation
using a single transistor.
• Multiple-emitter transistors replace diodes of DTL and allow
reduction of switching time and power dissipation.
• TTL inputs are the emitters of a multiple-emitter transistor. This IC structure is functionally equivalent to multiple
transistor where the base and collectors are tied together.
• The output is buffered by a common emitter amplifier.

13. • A Phenomenon called current steering means that when two voltage-
stable elements with different threshold voltages are connected in
parallel, the current flows through the path with the smaller threshold
voltage.
• As a result no current flows through the base of the output transistor,
causing it to stop conducting and the output voltage become high
(logical one).
• During the transition the input transistor is briefly in its active region, so its draws a
large current away from the base of the output transistor and thus quickly discharge
its base. This is a critical advantage of TTL over DTL that speeds up the transition
over a diode input structure.
Multi Input Emitter Structure

14. • When one of the inputs A or B is low, the current available through R1
at the transistor bases is diverted to ground.
• No current flows from the base to collector, and therefore no current
reaches the base of the output transistor.
• Thus, the output transistor is OFF. The pull-up resistor R2 charges the
output node to the high voltage state.
• Only when both inputs are high, then current flow through R1 from
base to collector to turn ON the output transistor. In this case, the ouput
path discharges to the ground.
TTL NAND GATE WITH MULTI EMITTER TRANSISTER