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High Speed Edge Card Transitions <ul><li>Source: Samtec </li></ul>
Introduction <ul><li>Purpose </li></ul><ul><ul><li>To discuss aspects of the design, simulation, and optimization of edge ...
Samtec RiseUp ®  RU8 Series HSEC8 Connector HSEC8 Connector HSC8 Riser Card
3D Model of Edge Card Connector Contact Pins
Connector Design Priorities <ul><li>Electrical </li></ul><ul><ul><li>Shorter interconnect paths </li></ul></ul><ul><ul><li...
Connector Impedance Discontinuities <ul><li>Impedance discontinuities exist in the following regions of most connector sys...
Compensation Types <ul><li>Trace Modification </li></ul><ul><ul><li>Trace necking for increased impedance </li></ul></ul><...
Plane Cutback Method <ul><li>Use when edge finger contact pad impedance dominates. </li></ul><ul><li>Especially effective ...
Plane Antipad Method <ul><li>Use for single-ended transitions with higher overall impedance. </li></ul><ul><li>Can be used...
Electromagnetic Modeling, Simulation, and Optimization <ul><li>CST Microwave Studio used for all electromagnetic modeling ...
Instrumented Model <ul><li>All features of connector pins, connector body, PCB, and riser card are modeled. </li></ul>
Time Domain TDR Response  Uncompensated vs. Compensated TDR Results: Time Dependent Impedance Z(t) in Ohm
Frequency Domain View  with Plane Antipad Compensation
Simulated 10 Gbps Eye Uncompensated vs. Compensated Uncompensated 10 ps Jitter 629 mV Eye Height Compensated 8 ps Jitter 6...
Transmission Line Modeling Technique <ul><li>As a simplification to full wave modeling, connector transitions can be appro...
Transmission Line Modeling
Transmission Line Simulations 31 to 80 ohm Compensated Pad Impedance Time (ms) Volts (V)
Additional Resource <ul><li>For ordering the high speed interconnect systems, please click the part list or </li></ul><ul>...
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High Speed Edge Card Transitions

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To discuss aspects of the design, simulation, and optimization of edge card connector systems for use in board-to-board riser applications

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  • Welcome to the training module on Samtec High Speed Edge Card Transitions. This training module discusses aspects of the design, simulation, and optimization of edge card connector systems for use in board-to-board riser applications.
  • The RiseUp ® is Samtec&apos;s high speed connector system featuring a high speed interface boards with embedded ground planes to mate with the edge card connectors. In this figure, Samtec used two standard HSEC8 Series edge card connectors and a matched impedance PCB with an embedded HSC8 ground plane for greatly improved performance over traditional connector sets for elevated board stacking. The RU8 series system was modeled completely form the transition from PCB to edge card.
  • Here is the 3D mechanical model for the high speed connector system. This 3D modeling method is used to provide accurate models for all sections of the RiseUp final Inch PCB, including contact body, PCB, internal contact pins, and riser card which is inserted into the connector system. The three dimensional structures are modeled using a combination of CST Microwave Studio an Sigrity BroadBand SPICE.
  • Initially in many of connector systems designed in 1990s, the first priority of the connector design was cost, which means make it as cheap as possible. The second priority was the mechanical robustness. Finally the electrical performance was often the last thing to consider. However, in latest generation in 2000s, connector systems are typically optimized for high electrical performance, then cost, and then mechanical robustness. This is changed the way of the connector design and fabricated. For the electrical performance, the design should be focused on providing shorter interconnect paths and higher density, adding ground planes within the interconnects to control EMIs, using different new manufacturing methods robustness and different raw materials.
  • An impedance discontinuity, or mismatch, occurs at every point in the transmission path where there is change in impedance the signal “sees.” Reflections occur at impedance discontinuities regardless of whether the impedance discontinuity changes from a higher impedance to a lower one or vice versa. For example, the edge finger contact in the riser card may have low impedance, and the surface mount pad in contact finger may have high impedance. The impedance mismatch will cause signal distortion during the transition. The goal to design high speed transition system is to minimize the impedance discontinuities and lower resonances in the frequency domain which cause signal distortion.
  • There are several compensation schemes to achieve high performance transitions. Trace modification can be done by fabricating a “neck” in the circuit trace on PCB; narrowing to increase impedance and widening to decreased impedance. In general, low impedance structures need to be compensated meaning they need high impedance added. PCB manufacturers do not always facilitate trace widths necessary due to their tolerances, so trace modification is not generally practical in real manufacturing applications. The plane cutback method cuts the plane back all the way under the pad to provide increased impedance. Another method is the plane antipad method which uses a hole on the plane to increase the impedance.
  • Plane cutback method is used when edge finger contact pad impedance dominates. It is especially effective for differential transitions where there is good return path control.
  • Plane antipad method is used for single-ended transitions with higher overall impedance. It can be used for edge finger and surface mount contact pads.
  • Electromagnetic Compatibility (EMC) is achieved when an active electronic device is capable of operating without emitting electrical noise that could disrupt other electronic devices which may be operating nearby. Such noise is called Electromagnetic Interference (EMI). Modern electromagnetic analysis and design of transmission line structures relies heavily on numerically based EM field solvers incorporated in most commercial system level CAE and CAD tools. Here list what the CST Microwave Studio simulation tool can do for measuring the interconnect system.
  • A more reasoned approach is to characterize the connector and the PCB as a complete system. Only in this situation can all interactions between the board and the connector be observed and characterized. Therefore, each system must be modeled and/or tested individually to completely characterize its performance. In this figure, all features of connector pins, connector body, PCB, and riser card are modeled.
  • A time domain plot essentially describes the behavior of a particular characteristic over a certain period of time. A data plot representing time domain behavior will use time as its horizontal axis. At time zero, the characteristic will be measured, or calculated, and a corresponding point will be made on the graph. At a later point in time, another sample is taken, which is again plotted on the graph. Sampling is repeated at defined intervals for the desired time period. The oscilloscope was set up in TDR (time domain reflectometry) mode using 128 averages and a 500-point record length. The horizontal scale was set to 500ps/div to allow the near end connector and a portion of the cable to be displayed. The filtering function was set to 35ps. Measurements were made at the near end of each sample. The impedance measurements included the mated connector and at the center of the HSC8 riser card. The red line is compensated result and green line is non-compensated result.
  • S-parameters, also known as scattering parameters, are a unified set of frequency domain parameters that can be used to completely define the properties of an electrical device. S-parameters can be mapped directly to parameters such as insertion loss (S21), return loss (S11), and crosstalk (S13, S14), so in theory, they can be used to fully characterize an interconnect path. In the frequency domain plot, the horizontal axis of a data plot represents the frequency of a constant amplitude. The vertical axis represents s-parameters. At the first frequency, such as DC (0 Hz), the device is stimulated with a DC signal, and the s-paramenters is measured or calculated. Its value is then plotted on the Y axis. The frequency of the stimulus signal is then increased, another measurement is made and plotted, and so on. Therefore, a frequency domain plot describes how s-parameters will vary with changes in the frequency of the signal that drives it.
  • An eye diagram of a signal overlays the signal waveform over many cycles. Each cycle waveform is aligned to a common timing reference, typically a clock. An eye diagram provides a visual indication of the voltage and timing uncertainty associated with the signal. It can be generated by synchronizing an oscilloscope to a timing reference. The vertical thickness of the line bunches in an eye diagram indicate the magnitude of AC voltage noise, whereas the horizontal thickness of the bunches where they cross over is an indication of the AC timing noise or jitter. Fixed DC voltage and timing offsets are indicated by the position of the eye on the screen.
  • In broad terms, a transmission line is a uniform system or line consisting of two parallel conductors. This means that the dimensions, materials, and cross-section of the line and its surrounding environment remain constant throughout its entire length. Signals transmitted into transmission lines would travel at the speed of light if there were no losses in the material. Although the model structure can support the analysis of a specific signal integrity parameter, the accuracy of an analysis will be dependent on the complexity and quality of the connector model. In the RU8 series, the separable interface employs the use of an edge card connector, the connector model should include the PCB connector mated with the edge finger pad that is recommended for the connector. Typically, models developed from calculations are derived from 2D or 3D field solvers. SPICE models of connectors have been around for years, and certain defacto practices and standards have evolved.
  • Here is the transmission line model.
  • The plot describes the TDR response of the HSEC8 with 31 to 80 ohm compensated pad impedance in time domain.
  • Thank you for taking the time to view this presentation on High Speed Edge Card Transitions . If you would like to learn more or go on to purchase some of these devices, you may either click on the part list link, or simply call our sales hotline. For more technical information you may either visit the Samtec site – link shown – or if you would prefer to speak to someone live, please call our hotline number, or even use our ‘live chat’ online facility.
  • Transcript of "High Speed Edge Card Transitions"

    1. 1. High Speed Edge Card Transitions <ul><li>Source: Samtec </li></ul>
    2. 2. Introduction <ul><li>Purpose </li></ul><ul><ul><li>To discuss aspects of the design, simulation, and optimization of edge card connector systems for use in board-to-board riser applications. </li></ul></ul><ul><li>Outline </li></ul><ul><ul><li>Riseup connector system </li></ul></ul><ul><ul><li>Connector Impedance Discontinuities & compensation methods </li></ul></ul><ul><ul><li>Interconnect modeling & simulation </li></ul></ul><ul><li>Content </li></ul><ul><ul><li>18 pages </li></ul></ul>
    3. 3. Samtec RiseUp ® RU8 Series HSEC8 Connector HSEC8 Connector HSC8 Riser Card
    4. 4. 3D Model of Edge Card Connector Contact Pins
    5. 5. Connector Design Priorities <ul><li>Electrical </li></ul><ul><ul><li>Shorter interconnect paths </li></ul></ul><ul><ul><li>Higher density (finer pitch), yet must be routable </li></ul></ul><ul><ul><li>Ground planes within the interconnects </li></ul></ul><ul><ul><li>Different manufacturing methods </li></ul></ul><ul><ul><li>Different raw materials </li></ul></ul><ul><li>Cost </li></ul><ul><li>Mechanical </li></ul><ul><ul><li>A robust contact design is even more important </li></ul></ul><ul><ul><li>PCB tolerances (+/-10% on the thickness) </li></ul></ul><ul><ul><li>FR-4 is abrasive; limits cycles </li></ul></ul><ul><ul><li>Contact surface finish </li></ul></ul><ul><ul><li>Contact wipe (mating distance) </li></ul></ul>Edge Rate Contact Stamped/Cut Contact
    6. 6. Connector Impedance Discontinuities <ul><li>Impedance discontinuities exist in the following regions of most connector systems: </li></ul><ul><ul><li>Connector body </li></ul></ul><ul><ul><li>PCB surface mount pad </li></ul></ul><ul><ul><li>Edge finger contacts </li></ul></ul><ul><ul><li>Plated through holes </li></ul></ul><ul><li>The “goal” is to reduce discontinuities to a minimum, and thereby lower resonances in the frequency domain which cause signal distortion. </li></ul>Low impedance edge finger contact Edge Card View Contact Finger View High impedance main contact system Low impedance pin reinforcement High impedance surface mount pad
    7. 7. Compensation Types <ul><li>Trace Modification </li></ul><ul><ul><li>Trace necking for increased impedance </li></ul></ul><ul><ul><li>Trace widening for decreased impedance </li></ul></ul><ul><li>Plane Cutback </li></ul><ul><ul><li>Increased impedance </li></ul></ul><ul><li>Plane Antipad </li></ul><ul><ul><li>Increased impedance </li></ul></ul><ul><li>In general, the structures that need to compensate </li></ul><ul><li>for are low impedance structures. </li></ul><ul><ul><li>Surface mount pads </li></ul></ul><ul><ul><li>Edge finger contacts </li></ul></ul><ul><ul><li>Contact reinforcement structures </li></ul></ul>
    8. 8. Plane Cutback Method <ul><li>Use when edge finger contact pad impedance dominates. </li></ul><ul><li>Especially effective for differential transitions where there is good return path control. </li></ul>
    9. 9. Plane Antipad Method <ul><li>Use for single-ended transitions with higher overall impedance. </li></ul><ul><li>Can be used for edge finger and surface mount contact pads. </li></ul>
    10. 10. Electromagnetic Modeling, Simulation, and Optimization <ul><li>CST Microwave Studio used for all electromagnetic modeling and simulation. </li></ul><ul><ul><li>Accuracy and correlation have been demonstrated in previous studies and presentations at DesignCon 2003 and 2004 </li></ul></ul><ul><ul><li>Numerical stability across large aspect ratio objects allows for a complete connector system including PCB, edge card, or flex to be modeled. </li></ul></ul><ul><ul><ul><li>- Allows for fast optimization on complex structures to gain insight </li></ul></ul></ul><ul><ul><li>Time domain simulations allow direct time domain (TDR) or transformed frequency domain (S-parameters) views. </li></ul></ul><ul><ul><li>Any feature can be parameterized and optimized simultaneously. </li></ul></ul><ul><ul><li>S-parameters can be exported for modeling and further simulation in Synopsys HSPICE. </li></ul></ul>
    11. 11. Instrumented Model <ul><li>All features of connector pins, connector body, PCB, and riser card are modeled. </li></ul>
    12. 12. Time Domain TDR Response Uncompensated vs. Compensated TDR Results: Time Dependent Impedance Z(t) in Ohm
    13. 13. Frequency Domain View with Plane Antipad Compensation
    14. 14. Simulated 10 Gbps Eye Uncompensated vs. Compensated Uncompensated 10 ps Jitter 629 mV Eye Height Compensated 8 ps Jitter 650 mV Eye Height
    15. 15. Transmission Line Modeling Technique <ul><li>As a simplification to full wave modeling, connector transitions can be approximated as transmission lines and SPICE circuits. </li></ul><ul><ul><li>Connector modeled with manufacturer SPICE circuit </li></ul></ul><ul><ul><li>Pads modeled as two transmission lines </li></ul></ul><ul><ul><ul><li>• Identify center contact point of connector on pad </li></ul></ul></ul><ul><ul><ul><li>• Model stub as one T-line </li></ul></ul></ul><ul><ul><ul><li>• Model through section to trace as second T-line </li></ul></ul></ul><ul><ul><ul><ul><li>Use 2D field solver to extract impedance of sections, assuming pad as a trace geometry </li></ul></ul></ul></ul><ul><ul><ul><ul><li>Adjustments in impedance due to antipad holes or plane cutback can be tested by sweeping T-line section impedance </li></ul></ul></ul></ul><ul><ul><ul><ul><ul><li>Antipad dimensions can then be adjusted in 2D solver to meet optimal impedance </li></ul></ul></ul></ul></ul>
    16. 16. Transmission Line Modeling
    17. 17. Transmission Line Simulations 31 to 80 ohm Compensated Pad Impedance Time (ms) Volts (V)
    18. 18. Additional Resource <ul><li>For ordering the high speed interconnect systems, please click the part list or </li></ul><ul><li>Call our sales hotline </li></ul><ul><li>For additional inquires contact our technical service hotline </li></ul><ul><li>For more product information go to </li></ul><ul><ul><li>http://www.samtec.com/high_speed_connectors/2006/si_b2b.aspx?s=tlssie#hsci </li></ul></ul>

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