This document have overview to digital VLSI design with number system and combinational circuits (with real life examples). This document will be useful for the beginners in VLSI or digital electronics.

1. Created and presented by,
Vinoth Loganathan
RTL design Engineer
VLSI Design -
Digital

2. Introduction
 VLSI – Very Large Scale
Integrated Circuits
 It is the process of creating
an integrated circuits (IC)
by combining thousands
of transistors.
Integration Levels
SSI: 10 gates early 1960s
MSI: 1000 gates late 1960s
LSI: 10,000 gates 1970s
VLSI: 10k gates 1980s
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Created by Vinoth Loganathan in interest of
VLSI Guidance

3. Intel Xeon processor
IC 7404 (NOT gate IC)
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VLSI Guidance

4. VLSI
Digital
FPGA
Design Verification
ASIC
Design verification
Analog
ASIC
Design Verification
Mixed
Signal
ASIC
Design Verification
Types - Front end
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VLSI Guidance

5. Digital Analog
Mixed
signal
Processing
Signal
Digital Analog Both
Designed
Using
Digital HDLs
CMOS
Circuits
Analog HDLs
CMOS
Circuits
AMS - HDLs
Examples
Adder
Counters
Memory
LDOs
PLLs
ADC
DAC
Tools
Xilinx ISE
Altera
Quartus
Cadence
Virtuoso
Synopsys
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VLSI Guidance

6. Levels of
VLSI chip Full Adder
Half Adder
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Top
Bottom
Created by Vinoth Loganathan in interest of
VLSI Guidance

7. Digital VLSI Design
 Digital designing of VLSI circuits is done Using logic
gates
 Types of Digital Design are
 Combinational Circuit design
 Does not require clock
 No memory element (no feedback)
 Eg: Adders, Coders, Mux, Etc
 Sequential Circuit design
 Requires clock (For state transition)
 Has memory element (feedback)
 Eg: Flip Flops, Counters, Etc
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Created by Vinoth Loganathan in interest of
VLSI Guidance

8. Cont..
 Digital VLSI Design represents information with only two
discrete values (0, 1).
 Ideally
“no voltage” (e.g., 0v) represents a 0 and
“full source voltage” (e.g., 5v) represents a 1
 Realistically
 In a 5V circuit
“low voltage” (e.g., <1v) represents a 0 and
“high voltage” (e.g., >4v) represents a 1
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Created by Vinoth Loganathan in interest of
VLSI Guidance

9. Cont..
 Digital Design is done by using HDLs (Hardware
Description languages)
 HDLs describes the functionality of the hardware.
 The Common HDLs are
 Verilog HDL
 VHDL (Very High Speed Integration HDL)
The tools used for simulation and Synthesis are
Xilinx, Cadence EDA, Synopsys, Mentor graphics, etc..
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Created by Vinoth Loganathan in interest of
VLSI Guidance

10. Benefits of Digital over Analog
 Reproducibility
 Accuracy
 Not effected by noise
 Ease of design
 Data protection
 Programmable
 Speed
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Created by Vinoth Loganathan in interest of
VLSI Guidance

11. Types
Number
System
Radix / Base
Decimal
2
Binary
10
Octal
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Hexadecimal
16
Human Knowledge Recent
Processor / Controller
Old
Processors / Controllers
Specifying Address
Number System
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VLSI Guidance

12. Conversion
Hexadecimal
Decimal Octal
Binary
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VLSI Guidance

13. Decimal Binary Octal
Hexa-
decimal
0 0 0 0
1 1 1 1
2 10 2 2
3 11 3 3
4 100 4 4
5 101 5 5
6 110 6 6
7 111 7 7
Decimal Binary Octal
Hexa-
decimal
8 1000 10 8
9 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
Conversion
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VLSI Guidance

14. BCD , Excess-3 , Gray codes
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VLSI Guidance

15. Combinational Circuit
 A combinational circuit consists of logic gates whose
outputs, at any time, are determined by combining the
values of the inputs.
 For n input variables, there are 2n possible binary input
combinations.
Eg : For 2 input variable 22 = 4 input combinations possible
 For each binary combination of the input variables, there is
one possible output.
Eg : A + B = Y
 The circuit does not have memory element (no feedback).
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VLSI Guidance

16. Representation
 Boolean algebra: Deals with
binary variables and logic operations
operating on those variables.
 Logic diagram: Composed of
graphic symbols for logic gates. A
simple circuit sketch that represents
inputs and outputs of Boolean
functions.
 Truth table: The table that
describes the functionality of the
device.
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VLSI Guidance

17. Identities and Laws of Boolean
Algebra
(1) x + 0 = x
(2) x · 0 = 0
(3) x + 1 = 1
(4) x · 1 = x
(5) x + x = x
(6) x · x = x
(7) x + x’= 1
(8) x · x’= 0
(9) x + y = y + x
(10) xy = yx
(11) x + ( y + z ) = ( x + y) + z
(12) x (yz) = (xy) z
(13) x ( y + z ) = xy + xz
(14) x + yz = ( x + y )( x + z)
(15) ( x + y )’ = x’ y’
(16) ( xy )’ = x’ + y’
(17) (x’)’ = x
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Created by Vinoth Loganathan in interest of
VLSI Guidance

18. Logic Gates
 NOT gate (Inverter)
Let the Ignition switch is ‘ON’
Stand Contact (Up) = LED – OFF
Stand no-Contact (Down) = LED – ON
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Equivalent Circuit
Created by Vinoth Loganathan in interest of
VLSI Guidance

19.  AND gate
x
y
xy
A B C
0 0 0
0 1 0
1 0 0
1 1 1
Input 1
Input 2
Both inputs ON = LED ON (Fine)
Any one input OFF = LED OFF (Hazard)
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VLSI Guidance

20.  OR gate
A B C
0 0 0
0 1 1
1 0 1
1 1 1Input 1
Input 2
Both inputs OFF = Bell OFF (no ring)
Any one input ON = Bell ON (Rings)
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VLSI Guidance

21.  NAND gate
x
y
xy
A B C
0 0 1
0 1 1
1 0 1
1 1 0
Input 1
Input 2
Both inputs ON = Buzzer OFF (Fine)
Any one input OFF = Buzzer ON (Hazard)
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VLSI Guidance

22.  NOR gate A B C
0 0 1
0 1 0
1 0 0
1 1 0
Hazard
Display
Unit
Both inputs OFF = LED ON (Fine)
Any one/both input ON = LED OFF (Hazard)
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VLSI Guidance

23.  XOR gate
xÅyx
y
A B C
0 0 0
0 1 1
1 0 1
1 1 0
Both inputs ON/OFF = LED OFF
Any one input ON = LED ON
Switch 1
Switch 2
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Created by Vinoth Loganathan in interest of
VLSI Guidance

24. 24
 XNOR gate
Created by Vinoth Loganathan in interest of
VLSI Guidance

25. Conversion between circuits, equations and
truth tables
 Output is
Z = (X+Y)Y
Z = XY + YY Z = XY
Z = XY
x
y Z
X Y Z
0 0 0
0 1 0
1 0 1
1 1 0
0 0
1 0
X
Y
X Y
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Created by Vinoth Loganathan in interest of
VLSI Guidance

26. Some of the Combinational Circuits
are..
 Half adder / Full Adder
 Half subtractor / Full subtractor
 Parallel binary adder, parallel binary Subtractor
 Fast Adder , Carry Look Ahead adder , Serial
Adder/Subtractor , BCD adder
 Binary Multiplier – Binary Divider
 Multiplexer / Demultiplexer
 decoder / encoder
 parity checker , parity generators
 code converters , Magnitude Comparator.
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VLSI Guidance

27. Example : Half Adder
 Sum = x XOR y
 Carry = x AND y
x y Carry Sum
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
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VLSI Guidance

28. Decoder
 Accepts a value and decodes it
 Output corresponds to value of n inputs
 Consists of:
 Inputs (n)
 Outputs (2n , numbered from 0  2n - 1)
 Selectors / Enable (active high or active low)
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VLSI Guidance

29. 2-to-4 Decoder
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VLSI Guidance

30. Encoders
 Perform the inverse operation of a decoder
 2n input lines and n output lines
 Enable (active high or active low)
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VLSI Guidance

31. Encoders
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VLSI Guidance

32. Multiplexer (MUX)
A multiplexer can use addressing bits to select one of
several input bits to be the output.
A selector chooses a single data input and passes it to
the MUX output. It has one output selected at a time.
Consists of:
Inputs (multiple) = 2n
Output (single)
Selectors (# depends on # of inputs) = n
Enable (active high or active low)
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VLSI Guidance

33. Function table with enable
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VLSI Guidance

34. 4 to 1 line multiplexer
S1 S0 F
0 0 I0
0 1 I1
1 0 I2
1 1 I3
4 to 1 line
multiplexer
2n MUX to 1
n for this MUX is 2
This means 2
selection lines s0
and s134
Created by Vinoth Loganathan in interest of
VLSI Guidance

35. Thank you..
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Created by Vinoth Loganathan in interest of
VLSI Guidance