6. Outlines
• ASIC Design Flow
• Job Description
• Skills Set
• What To Study
• Conclusion
• FAQs
• Discussion
Sunday, July 19, 2020 6
7. Job
Description
Execution of Netlist/RTL-to-GDSII flow for block level or SoC Designs
Scripting tasks to handle technical issues and automation
Understanding complex IPs like (SERDES – CPU – 5G – Memories etc.)
Work in collaboration with different teams as Design, DFT etc.
Development of netlist-oriented tasks as (Logical Synthesis – DFT
Insertion – Formal Verification – STA)
Implementation of backend-oriented tasks as (Floor-Planning – Power-
Planning – CTS – Routing – Chip Finishing)
Running, checking and solving different physical verification checks to
meet foundry rules as DRCs, LVS and DFM
Working on different timing signoff tasks as (Parasitic Extraction – STA).
Analysis of IR drop and electromigration issues and fixing them.
Sunday, July 19, 2020 7
8. Outlines
• ASIC Design Flow
• Job Description
• Skills Set
• What To Study
• Conclusion
• FAQs
• Discussion
Sunday, July 19, 2020 8
9. Skills Set
CAD Tools Scripting skills Main
knowledge
Extra
knowledge
Personal skills
Sunday, July 19, 2020 9
10. Skills Set
Technical
• Scripting skills (Shell, Tcl, Perl and Python)
• Good understanding of ASIC design flow
• Good knowledge of Floor-Planning, Power-Planning, placement and
routing
• Good knowledge in Clock Networks methodologies and techniques
• Good understanding of Synthesis, DFT and formal verification basics
• Very good knowledge of Static Timing Analysis checks
• Good knowledge of Physical Verification checks as DRCs, LVS and DFM
• Knowledge of Electromigration, IR Drop concepts and crosstalk concepts
• Experience with CAD Tools
• Very good in logic design basics, semiconductor device physics and
transistor characteristics
Sunday, July 19, 2020 10
11. SELF MOTIVATED,
SELF-DRIVEN AND
PROACTIVE
GOOD PROBLEM
SOLVING SKILLS
QUICK LEARNER
AND SELF-LEARNER
EFFECTIVE
COMMUNICATION
SKILLS
TEAM WORK SKILLS FLUENCY IN
WRITTEN AND
SPOKEN ENGLISH
WORKING UNDER
PRESSURE
Skills Set
Personal
Sunday, July 19, 2020 11
12. Outlines
• ASIC Design Flow
• Job Description
• Skills Set
• What To Study
• Conclusion
• FAQs
• Discussion
Sunday, July 19, 2020 12
13. What To Study
Logic design basics
• Numbering systems
• Different algorithms of logical optimization (SOP, POS etc.)
• Logic components and basic building blocks of any circuit
semiconductor device physics and transistor characteristics (MOSFET – FinFET)
Digital design principles
• RTL coding techniques
• HDL language
• CDC and metastability concepts and techniques
Sunday, July 19, 2020 13
14. What To Study (2)
Timing basics
Power basics
ASIC Design Flow knowledge
• Inputs and outputs of each stage and formats
• Main objective of each step
• Methodologies and techniques of each step
Low power design techniques
Scripting languages
Basic and advanced DRCs and DFM concepts
Sunday, July 19, 2020 14
15. What To Study (3)
Resources
VLSI Academy website
A Perl Crash Course For VLSI Designers
• By: Dr. Joseph Riad
Sunday, July 19, 2020 15
16. What To Study (4)
Resources
VLSI School courses
Sunday, July 19, 2020 16
17. What To Study (4)
Resources
Digital ASIC Design with Verilog Full Course
• By: Paul Franzon
Sunday, July 19, 2020 17
18. What To Study (5)
Resources
Digital IC Design Courses
• By: Dr. Hisham Omran
Sunday, July 19, 2020 18
19. What To Study (6)
Resources
Chapter 2: Ensuring RTL Intent
Chapter 3: Timing Analysis
Chapter 4: Clock Domain Crossing (CDC)
Chapter 5: Power
Chapter 6: Design for Test (DFT)
Sunday, July 19, 2020 19
20. What To Study (7)
Resources
Chapter 1: The World of Metastability
Chapter 2: Clocks and Resets
Chapter 3: Handling Multiple Clocks
Chapter 5: Low Power Design
Sunday, July 19, 2020 20
21. What To Study (8)
Resources
Chapter 2: MOS Transistor Theory
Chapter 3: CMOS Processing Technology
Chapter 3: Delay
Chapter 5: Power
Chapter 6: Interconnect
Chapter 10: Sequential Circuit Design
CMOS VLSI DESIGN
Sunday, July 19, 2020 21
22. What To Study (9)
Resources
Chapter 2: STA Concepts
Chapter 5: Delay Calculation
Chapter 7: Configuring the STA Environment
Chapter 8: Timing Verification
Static Timing Analysis for Nanometer Designs
Sunday, July 19, 2020 22
23. What To Study (10)
Resources
VLSI Physical Design Course
Sunday, July 19, 2020 23
24. What To Study (11)
Resources
Low Power Design Techniques
• Clock Gating
• Power Gating
• Multi Supply Voltage Techniques
• Components of low power
design system
1) Low Power Design Methodologies
2) Low Power Design Essentials
Sunday, July 19, 2020 24
25. What To Study (12)
Resources
VLSI Expert Blog Website
Sunday, July 19, 2020 25
26. What To Study (13)
Resources
Simulation and Synthesis Techniques for
Asynchronous FIFO Design
Asynchronous & Synchronous Reset
Design Techniques
Sunburst Design
Sunday, July 19, 2020 26
27. Outlines
• ASIC Design Flow
• Job Description
• Skills Set
• What To Study
• Conclusion
• FAQs
• Discussion
Sunday, July 19, 2020 27
28. Conclusion
KNOW MORE ABOUT THE
VLSI FIELD
ANALYZE THE JOB
DESCRIPTION
STRENGTH YOUR
TECHNICAL AND
PERSONAL SKILLS
APPLY
Sunday, July 19, 2020 28
29. Outlines
• ASIC Design Flow
• Job Description
• Skills Set
• What To Study
• Conclusion
• FAQs
• Discussion
Sunday, July 19, 2020 29
30. FAQs
Is the VLSI field stressful?
• Yes, but not all the time. This is based on the project that
you are assigned to and its deadlines.
• The work environment
• Your attitude in work
• Work-life balance
What subjects should you focus on in college?
• CU: Devices, Logic Design, Electronics, Analog Electronics,
Digital Electronics
• ASU: Logic Design, VLSI, Analog IC Design, Digital IC Design
• AU: Self-Study, Programs as Chipions, Devices, Logic
Design, Electronics, Analog Electronics, Digital Electronics
Sunday, July 19, 2020 30
31. FAQs (2)
What are the VLSI companies in Egypt?
What about the salaries?
What should I do to enter the field?
• Study – Projects – Internships – Trainings
Courses – Online MOOCs – Networking
Sunday, July 19, 2020 31
32. Outlines
• ASIC Design Flow
• Job Description
• Skills Set
• What To Study
• Conclusion
• FAQs
• Discussion
Sunday, July 19, 2020 32