In this article, based on a network IDEA32-16, we have developed 5 new networks:RFWKIDEA32-16,RFWKIDEA32-8,
RFWKIDEA32-4, RFWKIDEA32-2, RFWKIDEA32, that do
not use round keys in round functions. It shows that in offered networks such Feistel network,
encryption and decryption using the same algorithm as a round function can be used any
transformation.
International Data Encryption Algorithm (IDEA) is one of the encryption algorithms that is widely used for security purpose. IDEA block cipher operates with 64-bit plain text block and 64-bit cipher text block, and a 128-bit key controls it. The fundamental design of the algorithm is using three different algebraic operations: bitwise Exclusive OR, multiplication modulo, and addition modulo. Having the largest number of weak keys is one of the drawbacks of IDEA. In addition, a new attack during round six of IDEA’s operations has been detected. In this paper, we propose and describe the new design and preliminary implementation of a more secure encryption algorithm based on IDEA, and it is named DS-IDEA. Increasing the size of the key from 128 bits to 512 bits will increase the complexity of the algorithm. The algorithm’s complexity is increased by increasing the amount of diffusion (multiplicative additive block) in a single round. It is implemented to provide better security to the user’s password within the Online Password Management System (OPMS) in order to protect the user’s data within the database from hackers and other forms of unauthorized access.
FPGA Implementation of an Area Optimized Architecture for 128 bit AES AlgorithmIJERA Editor
This paper aims at FPGA Implementation of an Area Optimized Architecture for 128 bit AES Algorithm. The
conventional designs use a separate module for 32 bit byte substitution and 128 bit byte substitution. The 32 bit
byte substitution is used in round key generation and the 128 bit byte substitution is used in the rounds. This
report presents a modified architecture of 128 bit byte substitution module using a single 32 bit byte substitution
module to reduce area.The AES encryption and decryption algorithm were designed using Verilog HDL. The
functionality of the modules were checked using ModelSim. The simulations were carried out in ModelSim and
Quartus II. The algorithm was implemented in FPGA and achieved a 2% reduction in the total logic element
utilization
Using Cipher Key to Generate Dynamic S-Box in AES Cipher SystemCSCJournals
The Advanced Encryption Standard (AES) is using in a large scale of applications that need to protect their data and information. The S-Box component that used in AES is fixed, and not changeable. If we can generate this S-Box dynamically, we increase the cryptographic strength of AES cipher system. In this paper we intend to introduce new algorithm that generate S-Box dynamically from cipher key. We describe how S-Box can be generated dynamically from cipher key and finally analyze the results and experiments.
Hardware implementation of aes encryption and decryption for low area & power...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
hardware implementation of aes encryption and decryption for low area & low p...Kumar Goud
Abstract-An AES algorithm is implemented on FPGA platform to improve the safety of data in transmission. AES algorithms can be implemented on FPGA in order to speed data processing and reduce time for key generating. We achieve higher performance by maintaining standard speed and reliability with low area and power. The 128 bit AES algorithm is implements on a FPGA using VHDL language with help of Xilinx tool.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
International Data Encryption Algorithm (IDEA) is one of the encryption algorithms that is widely used for security purpose. IDEA block cipher operates with 64-bit plain text block and 64-bit cipher text block, and a 128-bit key controls it. The fundamental design of the algorithm is using three different algebraic operations: bitwise Exclusive OR, multiplication modulo, and addition modulo. Having the largest number of weak keys is one of the drawbacks of IDEA. In addition, a new attack during round six of IDEA’s operations has been detected. In this paper, we propose and describe the new design and preliminary implementation of a more secure encryption algorithm based on IDEA, and it is named DS-IDEA. Increasing the size of the key from 128 bits to 512 bits will increase the complexity of the algorithm. The algorithm’s complexity is increased by increasing the amount of diffusion (multiplicative additive block) in a single round. It is implemented to provide better security to the user’s password within the Online Password Management System (OPMS) in order to protect the user’s data within the database from hackers and other forms of unauthorized access.
FPGA Implementation of an Area Optimized Architecture for 128 bit AES AlgorithmIJERA Editor
This paper aims at FPGA Implementation of an Area Optimized Architecture for 128 bit AES Algorithm. The
conventional designs use a separate module for 32 bit byte substitution and 128 bit byte substitution. The 32 bit
byte substitution is used in round key generation and the 128 bit byte substitution is used in the rounds. This
report presents a modified architecture of 128 bit byte substitution module using a single 32 bit byte substitution
module to reduce area.The AES encryption and decryption algorithm were designed using Verilog HDL. The
functionality of the modules were checked using ModelSim. The simulations were carried out in ModelSim and
Quartus II. The algorithm was implemented in FPGA and achieved a 2% reduction in the total logic element
utilization
Using Cipher Key to Generate Dynamic S-Box in AES Cipher SystemCSCJournals
The Advanced Encryption Standard (AES) is using in a large scale of applications that need to protect their data and information. The S-Box component that used in AES is fixed, and not changeable. If we can generate this S-Box dynamically, we increase the cryptographic strength of AES cipher system. In this paper we intend to introduce new algorithm that generate S-Box dynamically from cipher key. We describe how S-Box can be generated dynamically from cipher key and finally analyze the results and experiments.
Hardware implementation of aes encryption and decryption for low area & power...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
hardware implementation of aes encryption and decryption for low area & low p...Kumar Goud
Abstract-An AES algorithm is implemented on FPGA platform to improve the safety of data in transmission. AES algorithms can be implemented on FPGA in order to speed data processing and reduce time for key generating. We achieve higher performance by maintaining standard speed and reliability with low area and power. The 128 bit AES algorithm is implements on a FPGA using VHDL language with help of Xilinx tool.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
A Survey on Various Lightweight Cryptographic Algorithms on FPGAIOSRJECE
In today’s rapid growing technology, digital data are exchanged very frequently in seamless wireless networks. Some of the real time applications examples which are transmitted quickly are voice, video, images and text but not limited to high sensitive information like transaction of creditcard, banking and confidential security numbers/data. Thus protection of confidential data is required with high security to avoid unauthorised access to Wireless networks. This can be done by a technique called ‘Cryptograhy’ and there are two crytography techniques available (such as symmetrical & asymmetrical techniques). The focus in this paper would be on Lightweight symmetric crytography. Lightweight cryptography is used for resource-limited devices such as radio frequency identification (RFID) tags, contactless smart cards and wireless sensor network. In this paper comparative study of selected lightweight symmetric block ciphers such as AES, PRESENT, TEA and HUMMINGBIRD is presented.
New modification on feistel DES algorithm based on multi-level keys IJECEIAES
The data encryption standard (DES) is one of the most common symmetric encryption algorithms, but it experiences many problems. For example, it uses only one function (XOR) in the encryption process, and the combination of data is finite because it occurs only twice and operates on bits. This paper presents a new modification of the DES to overcome these problems. This could be done through adding a new level of security by increasing the key space (using three keys) during the 16 rounds of the standard encryption algorithm and by replacing the predefined XOR operation with a new # operation. Our proposed algorithm uses three keys instead of one. The first key is the input key used for encrypting and decrypting operations. The second key is used for determining the number of bits, while the third key is used for determining the table numbers, which are from 0 to 255. Having evaluated the complexity of our proposed algorithm, the results show that it is the most complex compared with the well-known DES and other modified algorithms. Consequently, in our proposed algorithm, the attacker try a number of attempts 2 1173 at minimum to decrypt the message. This means that the proposed DES algorithm will increase the security level of the well-known DES.
Two fish & Rijndael (AES) Encryption AlgorithmRifat Tasnim
In cryptography, the Advanced Encryption Standard (AES) is an encryption standard adopted by the
U.S. government. Back in 1997 the National Institute of Standards and Technology (NIST) made a public call for new cipher
algorithms that could replace the DES. A rough summary of
the requirements made by NIST for the new AES were the
following:
Symmetric-key cipher
Block cipher
Support for 128 bit block sizes
Support for 128, 192, and 256 bit key lengths.
A combination of factors such as security, performance,
efficiency, ease of implementation and flexibility contributed
to the selection of this algorithm as the AES.Twofish and Rijndael were designed to meet the requirements of the
Advanced Encryption Standard(AES) competition and selected among five finalists of that
competition.
Rijndael is the block cipher algorithm recently chosen by the National Institute of Science and Technology (NIST) as the Advanced Encryption Standard (AES). It supercedes the Data Encryption Standard (DES). NIST selected Rijndael as the standard symmetric key encryption algorithm to be used to encrypt sensitive (unclassified) American federal information. The choice was based on a careful and comprehensive analysis of the security and efficiency characteristics of Rijndael's algorithm.
Simulated Analysis and Enhancement of Blowfish Algorithmiosrjce
This paper represents or analyzes the security of system based on Blowfish. Blowfish mainly focuses
on the encrypt and decrypt techniques and algorithms apply for cryptanalysis. It describe the algorithms for
encryption as well as decryption algorithms and also give the sufficient description of key generation, key
expansion, function and working principle of Blowfish cipher with proper explanations. Taking the current era,
Most of the famous systems which offer security for a network or web or to a data are vulnerability to attacks and
they are broken at some point of time by effective cryptanalysis methods, irrespective of its complex algorithmic
design. In the general, today’s cryptography world is bounded to an interpretive of following any one or multi
encryption scheme and that too for a single iteration on a single file only. This is evident in the maximum of the
encryption-decryption cases. It also describes the comparisons between older blowfish and enhances blowfish. It
also shows enhance Blowfish algorithm for encryption and decryption of data. It is also give the proper simulated
analysis of encryption and decryption time for different file formats using a windows application. It describe
feature of application and its process and efficiency as well as calculation of time and throughput.
Design and Implementation A different Architectures of mixcolumn in FPGAVLSICS Design
This paper details Implementation of the Encryption algorithm AES under VHDL language In FPGA by using different architecture of mixcolumn. We then review this research investigates the AES algorithm in FPGA and the Very High Speed Integrated Circuit Hardware Description language (VHDL). Altera Quartus II software is used for simulation and optimization of the synthesizable VHDL code. The set of transformations of both Encryptions and decryption are simulated using an iterative design approach in order to optimize the hardware consumption. Altera Cyclone III Family devices are utilized for hardware evaluation.
International Journal of Engineering Research and Development (IJERD)IJERD Editor
call for paper 2012, hard copy of journal, research paper publishing, where to publish research paper,
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
4. The Advanced Encryption Standard (AES)Sam Bowne
A lecture for a college course -- CNIT 140: Cryptography for Computer Networks at City College San Francisco
Based on "Understanding Cryptography: A Textbook for Students and Practitioners" by Christof Paar, Jan Pelzl, and Bart Preneel, ISBN: 3642041000
Instructor: Sam Bowne
More info: https://samsclass.info/141/141_F17.shtml
Abstracting Vector Architectures in Library Generators: Case Study Convolutio...ETH Zurich
We present FGen, a program generator for high performance convolution operations (finite-impulse-response filters). The generator uses an internal mathematical DSL to enable structural optimization at a high level of abstraction. We use FGen as a testbed to demonstrate how to provide modular and extensible support for modern SIMD vector architectures in a DSL-based generator. Specifically, we show how to combine staging and generic programming with type classes to abstract over both the data type (real or complex) and the target architecture (e.g., SSE or AVX) when mapping DSL expressions to C code with explicit vector intrinsics. Benchmarks shows that the generated code is highly competitive with commercial libraries.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
Hardware Implementation of Algorithm for Cryptanalysisijcisjournal
Cryptanalysis of block ciphers involves massive computations which are independent of each other and can
be instantiated simultaneously so that the solution space is explored at a faster rate. With the advent of low
cost Field Programmable Gate Arrays (FPGA’s), building special purpose hardware for computationally
intensive applications has now become possible. For this the Data Encryption Standard (DES) is used as a
proof of concept. This paper presents the design for Hardware implementation of DES cryptanalysis on
FPGA using exhaustive key search. Two architectures viz. Rolled and Unrolled DES architecture are compared
and based on experimental result the Rolled architecture is implemented on FPGA. The aim of this
work is to make cryptanalysis faster and better.
Cryptography is an art and science of secure communication. Here the sender and receiver are guaranteed
the security through encryption of their data, with the help of a common key. Both the parties should agree
on this key prior to communication. The cryptographic systems which perform these tasks are designed to
keep the key secret while assuming that the algorithm used for encryption and decryption is public. Thus
key exchange is a very sensitive issue. In modern cryptographic algorithms this security is based on the
mathematical complexity of the algorithm. But quantum computation is expected to revolutionize computing
paradigm in near future. This presents a challenge amongst the researchers to develop new cryptographic
techniques that can survive the quantum computing era. This paper reviews the radical use of quantum
mechanics for cryptography
A Survey on Various Lightweight Cryptographic Algorithms on FPGAIOSRJECE
In today’s rapid growing technology, digital data are exchanged very frequently in seamless wireless networks. Some of the real time applications examples which are transmitted quickly are voice, video, images and text but not limited to high sensitive information like transaction of creditcard, banking and confidential security numbers/data. Thus protection of confidential data is required with high security to avoid unauthorised access to Wireless networks. This can be done by a technique called ‘Cryptograhy’ and there are two crytography techniques available (such as symmetrical & asymmetrical techniques). The focus in this paper would be on Lightweight symmetric crytography. Lightweight cryptography is used for resource-limited devices such as radio frequency identification (RFID) tags, contactless smart cards and wireless sensor network. In this paper comparative study of selected lightweight symmetric block ciphers such as AES, PRESENT, TEA and HUMMINGBIRD is presented.
New modification on feistel DES algorithm based on multi-level keys IJECEIAES
The data encryption standard (DES) is one of the most common symmetric encryption algorithms, but it experiences many problems. For example, it uses only one function (XOR) in the encryption process, and the combination of data is finite because it occurs only twice and operates on bits. This paper presents a new modification of the DES to overcome these problems. This could be done through adding a new level of security by increasing the key space (using three keys) during the 16 rounds of the standard encryption algorithm and by replacing the predefined XOR operation with a new # operation. Our proposed algorithm uses three keys instead of one. The first key is the input key used for encrypting and decrypting operations. The second key is used for determining the number of bits, while the third key is used for determining the table numbers, which are from 0 to 255. Having evaluated the complexity of our proposed algorithm, the results show that it is the most complex compared with the well-known DES and other modified algorithms. Consequently, in our proposed algorithm, the attacker try a number of attempts 2 1173 at minimum to decrypt the message. This means that the proposed DES algorithm will increase the security level of the well-known DES.
Two fish & Rijndael (AES) Encryption AlgorithmRifat Tasnim
In cryptography, the Advanced Encryption Standard (AES) is an encryption standard adopted by the
U.S. government. Back in 1997 the National Institute of Standards and Technology (NIST) made a public call for new cipher
algorithms that could replace the DES. A rough summary of
the requirements made by NIST for the new AES were the
following:
Symmetric-key cipher
Block cipher
Support for 128 bit block sizes
Support for 128, 192, and 256 bit key lengths.
A combination of factors such as security, performance,
efficiency, ease of implementation and flexibility contributed
to the selection of this algorithm as the AES.Twofish and Rijndael were designed to meet the requirements of the
Advanced Encryption Standard(AES) competition and selected among five finalists of that
competition.
Rijndael is the block cipher algorithm recently chosen by the National Institute of Science and Technology (NIST) as the Advanced Encryption Standard (AES). It supercedes the Data Encryption Standard (DES). NIST selected Rijndael as the standard symmetric key encryption algorithm to be used to encrypt sensitive (unclassified) American federal information. The choice was based on a careful and comprehensive analysis of the security and efficiency characteristics of Rijndael's algorithm.
Simulated Analysis and Enhancement of Blowfish Algorithmiosrjce
This paper represents or analyzes the security of system based on Blowfish. Blowfish mainly focuses
on the encrypt and decrypt techniques and algorithms apply for cryptanalysis. It describe the algorithms for
encryption as well as decryption algorithms and also give the sufficient description of key generation, key
expansion, function and working principle of Blowfish cipher with proper explanations. Taking the current era,
Most of the famous systems which offer security for a network or web or to a data are vulnerability to attacks and
they are broken at some point of time by effective cryptanalysis methods, irrespective of its complex algorithmic
design. In the general, today’s cryptography world is bounded to an interpretive of following any one or multi
encryption scheme and that too for a single iteration on a single file only. This is evident in the maximum of the
encryption-decryption cases. It also describes the comparisons between older blowfish and enhances blowfish. It
also shows enhance Blowfish algorithm for encryption and decryption of data. It is also give the proper simulated
analysis of encryption and decryption time for different file formats using a windows application. It describe
feature of application and its process and efficiency as well as calculation of time and throughput.
Design and Implementation A different Architectures of mixcolumn in FPGAVLSICS Design
This paper details Implementation of the Encryption algorithm AES under VHDL language In FPGA by using different architecture of mixcolumn. We then review this research investigates the AES algorithm in FPGA and the Very High Speed Integrated Circuit Hardware Description language (VHDL). Altera Quartus II software is used for simulation and optimization of the synthesizable VHDL code. The set of transformations of both Encryptions and decryption are simulated using an iterative design approach in order to optimize the hardware consumption. Altera Cyclone III Family devices are utilized for hardware evaluation.
International Journal of Engineering Research and Development (IJERD)IJERD Editor
call for paper 2012, hard copy of journal, research paper publishing, where to publish research paper,
journal publishing, how to publish research paper, Call For research paper, international journal, publishing a paper, IJERD, journal of science and technology, how to get a research paper published, publishing a paper, publishing of journal, publishing of research paper, reserach and review articles, IJERD Journal, How to publish your research paper, publish research paper, open access engineering journal, Engineering journal, Mathemetics journal, Physics journal, Chemistry journal, Computer Engineering, Computer Science journal, how to submit your paper, peer reviw journal, indexed journal, reserach and review articles, engineering journal, www.ijerd.com, research journals,
yahoo journals, bing journals, International Journal of Engineering Research and Development, google journals, hard copy of journal
4. The Advanced Encryption Standard (AES)Sam Bowne
A lecture for a college course -- CNIT 140: Cryptography for Computer Networks at City College San Francisco
Based on "Understanding Cryptography: A Textbook for Students and Practitioners" by Christof Paar, Jan Pelzl, and Bart Preneel, ISBN: 3642041000
Instructor: Sam Bowne
More info: https://samsclass.info/141/141_F17.shtml
Abstracting Vector Architectures in Library Generators: Case Study Convolutio...ETH Zurich
We present FGen, a program generator for high performance convolution operations (finite-impulse-response filters). The generator uses an internal mathematical DSL to enable structural optimization at a high level of abstraction. We use FGen as a testbed to demonstrate how to provide modular and extensible support for modern SIMD vector architectures in a DSL-based generator. Specifically, we show how to combine staging and generic programming with type classes to abstract over both the data type (real or complex) and the target architecture (e.g., SSE or AVX) when mapping DSL expressions to C code with explicit vector intrinsics. Benchmarks shows that the generated code is highly competitive with commercial libraries.
IJERA (International journal of Engineering Research and Applications) is International online, ... peer reviewed journal. For more detail or submit your article, please visit www.ijera.com
Hardware Implementation of Algorithm for Cryptanalysisijcisjournal
Cryptanalysis of block ciphers involves massive computations which are independent of each other and can
be instantiated simultaneously so that the solution space is explored at a faster rate. With the advent of low
cost Field Programmable Gate Arrays (FPGA’s), building special purpose hardware for computationally
intensive applications has now become possible. For this the Data Encryption Standard (DES) is used as a
proof of concept. This paper presents the design for Hardware implementation of DES cryptanalysis on
FPGA using exhaustive key search. Two architectures viz. Rolled and Unrolled DES architecture are compared
and based on experimental result the Rolled architecture is implemented on FPGA. The aim of this
work is to make cryptanalysis faster and better.
Cryptography is an art and science of secure communication. Here the sender and receiver are guaranteed
the security through encryption of their data, with the help of a common key. Both the parties should agree
on this key prior to communication. The cryptographic systems which perform these tasks are designed to
keep the key secret while assuming that the algorithm used for encryption and decryption is public. Thus
key exchange is a very sensitive issue. In modern cryptographic algorithms this security is based on the
mathematical complexity of the algorithm. But quantum computation is expected to revolutionize computing
paradigm in near future. This presents a challenge amongst the researchers to develop new cryptographic
techniques that can survive the quantum computing era. This paper reviews the radical use of quantum
mechanics for cryptography
High Capacity Image Steganography Using Adjunctive Numerical Representations ...ijcisjournal
LSB steganography is a one of the most widely used methods for implementing covert data channels in
image file exchanges [1][2]. The low computational complexity and implementation simplicity of the algorithm are significant factors for its popularity with the primary reason being low image distortion. Many attempts have been made to increase the embedding capacity of LSB algorithms by expanding into the second or third binary layers of the image while maintaining a low probability of detection with minimal distortive effects [2][3][4]. In this paper,we introduce an advanced technique for covertly embedding data within images using redundant number system decomposition over non -standard digital bit planes. Both grayscale and bit-mapped images are equally effective as cover files. It will be shown that this unique steganography method has minimal visual distortive affects while also preserving the cover file statistics, making it less susceptible to most general steganography detection algorithms.
Copy Move Forgery Detection Using GLCM Based Statistical Features ijcisjournal
The features Gray Level Co-occurrence Matrix (GLCM) are mostly explored in Face Recognition and
CBIR. GLCM technique is explored here for Copy-Move Forgery Detection. GLCMs are extracted from all
the images in the database and statistics such as contrast, correlation, homogeneity and energy are
derived. These statistics form the feature vector. Support Vector Machine (SVM) is trained on all these
features and the authenticity of the image is decided by SVM classifier. The proposed work is evaluated on
CoMoFoD database, on a whole 1200 forged and processed images are tested. The performance analysis
of the present work is evaluated with the recent methods.
Fault Detection in Mobile Communication Networks Using Data Mining Techniques...ijcisjournal
A collection of datasets is Big data so that it to be To process huge and complex datasets becomes difficult.
so that using big data analytics the process of applying huge amount of datasets consists of many data
types is the big data on-hand theoretical models and technique tools. The technology of mobile
communication introduced low power ,low price and multi functional devices. A ground for data mining
research is analysis of data pertaining to mobile communication is used. theses mining frequent patterns
and clusters on data streams collaborative filtering and analysis of social network. The data analysis of
mobile communication has been often used as a background application to motivate many technical
problem in data mining research. This paper refers in mobile communication networking to find the fault
nodes between source to destination transmission using data mining techniques and detect the faults using
outliers. outlier detection can be used to find outliers in multivariate data in a simple ensemble way.
Network analysis with R to build a network.
General Kalman Filter & Speech Enhancement for Speaker Identificationijcisjournal
Presence of noise increases the dimension of the information. A noise suppression algorithm is developed
with an idea of combining the General Kalman Filter and Estimate Maximization (EM) frame work.This
combination is helpful and effective in identifying noise characteristics of an acoustic environment.
Recursion between Estimate step and Maximization step enabled the algorithm to deal any model of noise.
The same Speech enhancement procedure in applied in the pre-processing stage of a conventional Speaker
identification method. Due to the non-stationary nature of noise and speech adaptive algorithms are
required. Algorithm is first applied for Speech enhancement problem and then extended to using it in the
pre-processing step of the Speaker identification. The present work is compared in terms of significant
metrics with existing and popular algorithms and results show that the developed algorithm is dominant
over them.
DWT Based Audio Watermarking Schemes : A Comparative Study ijcisjournal
The main problem encountered during multimedia transmission is its protection against illegal distribution
and copying. One of the possible solutions for this is digital watermarking. Digital audio watermarking is
the technique of embedding watermark content to the audio signal to protect the owner copyrights. In this
paper, we used three wavelet transforms i.e. Discrete Wavelet Transform (DWT), Double Density DWT
(DDDWT) and Dual Tree DWT (DTDWT) for audio watermarking and the performance analysis of each
transform is presented. The key idea of the basic algorithm is to segment the audio signal into two parts,
one is for synchronization code insertion and other one is for watermark embedding. Initially, binary
watermark image is scrambled using chaotic technique to provide secrecy. By using QuantizationIndex
Modulation (QIM), this method works as a blind technique. The comparative analysis of the three methods
is made by conducting robustness and imperceptibility tests are conducted on five benchmark audio
signals.
SECURITY ANALYSIS OF THE MULTI-PHOTON THREE-STAGE QUANTUM KEY DISTRIBUTIONijcisjournal
This paper presents a multi-stage, multi-photon quantum key distribution protocol based on the double-lock
cryptography. It exploits the asymmetry in the detection strategies between the legitimate users and the
eavesdropper. The security analysis of the protocol is presented with coherent states under the interceptresend
attack, the photon number splitting attack, and the man-in-the-middle attack. It is found that the mean photon number can be much larger 1. This complements the recent interest in multi-photon quantum communication protocols that require a pre-shared key between the legitimate users.
Agile development methods are commonly used to iteratively develop the information systems and they can
easily handle ever-changing business requirements. Scrum is one of the most popular agile software
development frameworks. The popularity is caused by the simplified process framework and its focus on
teamwork. The objective of Scrum is to deliver working software and demonstrate it to the customer faster
and more frequent during the software development project. However the security requirements for the
developing information systems have often a low priority. This requirements prioritization issue results in
the situations where the solution meets all the business requirements but it is vulnerable to potential
security threats.
The major benefit of the Scrum framework is the iterative development approach and the opportunity to
automate penetration tests. Therefore the security vulnerabilities can be discovered and solved more often
which will positively contribute to the overall information system protection against potential hackers.
In this research paper the authors propose how the agile software development framework Scrum can be
enriched by considering the penetration tests and related security requirements during the software
development lifecycle. Authors apply in this paper the knowledge and expertise from their previous work
focused on development of the new information system penetration tests methodology PETA with focus on
using COBIT 4.1 as the framework for management of these tests, and on previous work focused on
tailoring the project management framework PRINCE2 with Scrum.
The outcomes of this paper can be used primarily by the security managers, users, developers and auditors.
The security managers may benefit from the iterative software development approach and penetration tests
automation. The developers and users will better understand the importance of the penetration tests and
they will learn how to effectively embed the tests into the agile development lifecycle. Last but not least the
auditors may use the outcomes of this paper as recommendations for companies struggling with
penetrations testing embedded in the agile software development process.
Blind Image Quality Assessment with Local Contrast Features ijcisjournal
The aim of this research is to create a tool to evaluate distortion in images without the information about
original image. Work is to extract the statistical information of the edges and boundaries in the image and
to study the correlation between the extracted features. Change in the structural information like shape and
amount of edges of the image derives quality prediction of the image. Local contrast features are effectively
detected from the responses of Gradient Magnitude (G) and Laplacian of Gaussian (L) operations. Using
the joint adaptive normalisation, G and L are normalised. Normalised values are quantized into M and N
levels respectively. For these quantised M levels of G and N levels of L, Probability (P) and conditional
probability(C) are calculated. Four sets of values namely marginal distributions of gradient magnitude Pg,
marginal distributions of Laplacian of Gaussian Pl, conditional probability of gradient magnitude Cg and
probability of Laplacian of Gaussian Cl are formed. These four segments or models are Pg, Pl, Cg and Cl.
The assumption is that the dependencies between features of gradient magnitude and Laplacian of
Gaussian can formulate the level of distortion in the image. To find out them, Spearman and Pearson
correlations between Pg, Pl and Cg, Cl are calculated. Four different correlation values of each image are
the area of interest. Results are also compared with classical tool Structural Similarity Index Measure
Gait Based Person Recognition Using Partial Least Squares Selection Scheme ijcisjournal
The variations of viewing angle and intra-class of human beings have great impact on gait recognition
systems. This work represents an Arbitrary View Transformation Model (AVTM) for recognizing the gait.
Gait energy image (GEI) based gait authentication is effective approach to address the above problem, the
method establishes an AVTM based on principle component analysis (PCA). Feature selection (FS) is
performed using Partial least squares (PLS) method. The comparison of the AVTM PLS method with the
existing methods shows significant advantages in terms of observing angle variation, carrying and attire
changes. Experiments evaluated over CASIA gait database, shows that the proposed method improves the
accuracy of recognition compared to the other existing methods.
Performance Analsis of Clipping Technique for Papr Reduction of MB-OFDM UWB S...ijcisjournal
Multiband Orthogonal Frequency Division Multiplexing (MB-OFDM) is used as efficacious procedure for
ultra-wideband (UWB) wireless communication applications, which divides the spectrum into various subbands,
whose bandwidth is approximately 500MHz. Major arduousness in multiband-OFDM is ,it have
very large peak to average power ratio value which causes the signal to enter into dynamic region that
consequence in the loss of orthogonal properties and results in the interference of the carrier signals which
crops the amplifier saturation and finally limits the capacity of the system. Many PAPR amortize
algorithms have reported in the survey and pre-coding is PAPR reduction which is inserted after
modulation in the OFDM system. The Existing work presents the reduction of that value by different
clipping techniques namely Classical-Clipping (CC), Heavy side-Clipping (HC), Deep-Clipping (DC) and
Smooth-Clipping (SC) and their comparison analysis is done. Every clipping method is best at its own
level .The proficiency of these strategies are evaluated in locutions of average power disparity, complete
system decadence and PAPR reduction. Finally results show the MB OFDM yields better performance to
reduce PAPR in effective way.
An efficient algorithm for sequence generation in data miningijcisjournal
Data mining is the method or the activity of analyzing data from different perspectives and summarizing it
into useful information. There are several major data mining techniques that have been developed and are
used in the data mining projects which include association, classification, clustering, sequential patterns,
prediction and decision tree. Among different tasks in data mining, sequential pattern mining is one of the
most important tasks. Sequential pattern mining involves the mining of the subsequences that appear
frequently in a set of sequences. It has a variety of applications in several domains such as the analysis of
customer purchase patterns, protein sequence analysis, DNA analysis, gene sequence analysis, web access
patterns, seismologic data and weather observations. Various models and algorithms have been developed
for the efficient mining of sequential patterns in large amount of data. This research paper analyzes the
efficiency of three sequence generation algorithms namely GSP, SPADE and PrefixSpan on a retail dataset
by applying various performance factors. From the experimental results, it is observed that the PrefixSpan
algorithm is more efficient than other two algorithms.
DEVELOPMENT OF SECURE CLOUD TRANSMISSION PROTOCOL (SCTP) ENGINEERING PHASES :...ijcisjournal
Cloud computing technology provides various internet-based services. Many cloud computing vendors are offering cloud services through their own service mechanism. These mechanisms consist of various service parameters such as authentication, security, performance, availability, etc. Customer can access these cloud services through web browsers using http protocols. Each protocol has its own way of achieving the request-response services, authentication, confidentiality and etc. Cloud computing is an internet-based technology, which provides Infrastructure, Storage, Platform services on demand through a browser using HTTP protocols. These protocol features can be enhanced using cloud specific protocol, which provides strong authentication, confidentiality, security, integrity, availability and accessibility. We are proposing and presenting the secure cloud transmission protocol (SCTP) engineering phases which sits on top of existing http protocols to provide strong authentication security and confidentiality using multi-models. SCTP has multi-level and multi-dimensional approach to achieve strong authentication and multi-level security technique to achieve secure channel. This protocol can add on to existing http protocols. It can be used in any cloud services. This paper presents proposed Protocol engineering phases such as Service Specification, Synthesis, Analysis, Modelling, and Implementation model with test suites. This paper is represents complete integration of our earlier proposed and published multilevel techniques
An Optimized Approach for Fake Currency Detection Using Discrete Wavelet Tran...ijcisjournal
With the increase of modest technology, copy-move forgery detection has grown in a rapid rate that new
era of forged images came true which has the same resemblance as the old ones i.e. difficult to find out
with naked human perception. Fake currency detection is one in the effect that currency note is tampered in
a way such it has the similar resemblance as the original one. So in order to find out the duplicate or
forged portion of the image we go for different splicing algorithms using different techniques. Image
forgery results to various security issues. Hence an efficient algorithm is required to detect the forgery in
images. By using DCT algorithm blocks of the image are represented by DCT coefficients. Presence of
blocking articrafts in DCT makes the method to be a drawback. Hence we propose DWT for segmentation
of image. Lexicographical sorting is utilized to find out the cloned image blocks. Finally normalization is
applied to find the distance in between similar vectors. In DWT provides better resolution and
segmentation compared with DCT. In this paper, due to DWT, Image Forgery detection is done on lowlevel
image representation. By using DWT better accuracy in finding out the forgery is achieved in a less
time which gradually reduces complexity.
Wavelet Based on the Finding of Hard and Soft Faults in Analog and Digital Si...ijcisjournal
In this paper methods for testing both software and hardware faults are implemented in analog and digital
signal circuits are presented. They are based on the wavelet transform (WT). The limit which affected by
faults detect ability, for the reference circuits is set by statistical processing data obtained from a set of
faults free circuits .In wavelet analysis it has two algorithm one is based on a discrimination factor using
Euclidean distances and the other mahalanobis distances, are introduced both methods on wavelet energy
calculation. Simulation result from proposed test methods in the testing known analog and digital signal
circuit benchmark are given. The results shows that effectiveness of existing methods two test metrics
against three other test methods, namely a test method based on rms value of the measured signal, a test
method utilizing the harmonic magnitude component of the measured signal waveform
A 130-NM CMOS 400 MHZ 8-Bit Low Power Binary Weighted Current Steering DAC ijcisjournal
A low power low voltage 8-bit Digital to Analog Converter consisting of different current sources in binary
weighted array architecture is designed. The weights of current sources are depending on the binary
weights of the bits. This current steering DAC is suitable for high speed applications. The proposed DAC in
this paper has DNL, INL of ±0.04, ±0.05 respectively and the power consumption of 16.67mw.
This binary array architecture is implemented in CMOS 0.13µm 1P2M technology has good performances
in DNL, INL and area compared with other researches.
MATLAB Implementation of 128-key length SAFER+ Cipher SystemIJERA Editor
Data security is a major challenge today. To protect data in the Internet or in private networks many measures exist. The most important security layer is the use of encryption standard to protect information from eavesdropper. Today many encryption standards exist failing in two categories: symmetric and asymmetric key algorithms. In this work Secure And Fast Encryption Routine (SAFER+) standard is implemented using MATLAB. The development in computer programming techniques and languages offers a good opportunity of the software implementation of encryption standards with moderate cost and good performance. MATLAB can be considered today as the first engineering programming language with powerful mathematical function and reliable programming procedures
Comparison of AES and DES Algorithms Implemented on Virtex-6 FPGA and Microbl...IJECEIAES
Encryption algorithms play a dominant role in preventing unauthorized access to important data. This paper focus on the implementations of Data Encryption Standard (DES) and Advanced Encryption Standard (AES) algorithms on Microblaze soft core Processor and also their implementations on XC6VLX240t FPGA using Verilog Hardware Description language. This paper also gives a comparison of the issues related to the hardware and software implementations of the two cryptographic algorithms.
ENSEMBLE OF BLOWFISH WITH CHAOS BASED S BOX DESIGN FOR TEXT AND IMAGE ENCRYPTIONIJNSA Journal
The rapid and extensive usage of Internet in the present decade has put forth information security as an utmost concern. Most of the commercial transactions taking place over the Internet involves a wide variety of data including text, images, audio and video. With the increasing use of digital techniques for transmitting and storing Multimedia data, the fundamental issue of protecting the confidentiality, integrity and authenticity of the information poses a major challenge for security professionals and hassled to the major developments in Cryptography . In cryptography, an S-Box (Substitution-box) is a basic component of symmetric key algorithms, which performs substitution and is typically used to make the relationship between the key and the cipher text non linear and most of the symmetric key algorithms like DES, Blowfish makes use of S boxes. This paper proposes a new method for design of S boxes based on chaos theory. Chaotic equations are popularly known for its randomness, extreme sensitivity to initial conditions and ergodicity. The modified design has been tested with blowfish algorithm which has no effective crypt analysis reported against its design till date because of its salient design features including the key dependant s boxes and complex key generation process. However every new key requires pre-processing equivalent to encrypting about 4 kilobytes of text, which is very slow compared to other block ciphers and it prevents its usage in memory limited applications and embedded systems. The modified design of S boxes maintains the non linearity [3] [5] and key dependency factors of S boxes with a major reduction in time complexity of generation of S boxes and P arrays. The algorithm has been implemented and the proposed design has been analyzed for size of key space, key sensitivity and Avalanche effect. Experimental results on text and Image Encryption show that the modified design of key generation continues to offer the same
level of security as the original Blowfish cipher with a less computational overhead in key generation.
The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data also called Rijndael. The algorithm described by AES is a symmetric-key algorithm, meaning the same key is used for both encrypting and decrypting the data. Hardware-based cryptography is used for authentication of users and of software updates and installations. Software implementations can generally not be used for this, as the cryptographic keys are stored in the PC memory during execution, and are vulnerable to malicious codes. Hardware-based encryption products can also vary in the level of protection they provide against brute force rewind attacks, Offline parallel attacks, or other cryptanalysis attacks. The algorithm was implemented in FPGA due to its flexibility and reconfiguration capability. A reconfigurable device is very convenient for a cryptography algorithm since it allows cheap and quick alterations. The implementation of pipelined cryptography hardware was used to improve performance in order to achieve higher throughput and greater parallelism. The AES hardware was implemented in three modules contains of the encryption, the decryption and the key expansion module.
DES irrespective of its small key size, it has been considered to be strong design cipher till today. Designers of DES guaranteed a security margin of 2 power 56. If any attack which is essentially better than 2 power 56 search then that considered to be attack. To crack DES attackers need to spend $ 220000 so that the key can be revealed in 56 hours. But for digital transactions if the key can expire for less than 5 minutes it’s difficult to crack. If this is the case with DES then it will be much more difficult to break Triple DES, which uses 112 bits of key size. The problem with Triple DES is having more rounds, which takes more processing time and space. Not only cryptography, even Light Weight Cryptography needs low processing time and space. Hence a new algorithm named ternary DES is proposed which requires only 56-bit key and 16 rounds. Ternary DES has the advantage of DES with the same key space and number of rounds, and advantage of Triple DES with difficult to break. To propose new algorithms for solving security issues many constraints we need to take into account. With one algorithm we can solve one or a few issues but not all.
Presently on a daily basis sharing the information over web is becoming a significant issue due to security problems. Thus lots of techniques are needed to protect the shared info in academic degree unsecured channel. The present work target cryptography to secure the data whereas causing inside the network. Encryption has come up as a solution, and plays an awfully necessary role in data security. This security mechanism uses some algorithms to scramble info into unclear text which can be exclusively being decrypted by party those possesses the associated key. This paper is expounded the varied forms of algorithmic rule for encryption & decryption: DES, AES, RSA, and Blowfish. It helps to hunt out the best algorithmic rule.
PERFORMANCE EVALUATION OF PARALLEL INTERNATIONAL DATA ENCRYPTION ALGORITHM ON...IJNSA Journal
Distributed security is an evolving sub-domain of information and network security. Security applications play a serious role when data exchanging, different volumes of data should be transferred from one site to another safely and at high speed. In this paper, the parallel International Data Encryption Algorithm (IDEA) which is one of the security applications is implemented and evaluated in terms of running time, speedup, and efficiency. The parallel IDEA has been implemented using message passing interface (MPI) library, and the results have been conducted using IMAN1 Supercomputer, where a set of simulation runs carried out on different data sizes to define the best number of processor which can be used to manipulate these data sizes and to build a visualization about the processor number that can be used while the size of data increased. The experimental results show a good performance by reducing the running time, and increasing speed up of encryption and decryption processes for parallel IDEA when the number of processors ranges from 2 to 8 with achieved efficiency 97% to 83% respectively.
PERFORMANCE ANALYSIS OF SYMMETRIC KEY CIPHERS IN LINEAR AND GRID BASED SENSOR...cscpconf
The linear and grid based Wireless Sensor Networks (WSN) are formed by applications where
objects being monitored are either placed in linear or grid based form. E.g. monitoring oil,
water or gas pipelines; perimeter surveillance; monitoring traffic level of city streets, goods
warehouse monitoring. The security of data is a critical issue for all such applications and as
the devices used for the monitoring purpose have several resource constraints (bandwidth,
storage capacity, battery life); it is significant to have a lightweight security solution. Therefore,
we consider symmetric key based solutions proposed in the literature as asymmetric based
solutions require more computation, energy and storage of keys. We analyse the symmetric
ciphers with respect to the performance parameters: RAM, ROM consumption and number of
CPU cycles. We perform this simulation analysis in Contiki Cooja by considering an example
scenario on two different motes namely: Sky and Z1. The aim of this analysis is to come up with
the best suited symmetric key based cipher for the linear and grid based WSN.
Design And Implementation Of Tiny Encryption AlgorithmIJERA Editor
Over the recent years, several smart applications like RFID‟s, sensor networks, including industrial systems, critical infrastructures, private and public spaces as well as portable and wearable applications in which highly constrained devices are interconnected, typically communicating wirelessly with one another, working in concert to accomplish some task. Advanced safety and security mechanisms can be very important in all of these areas. Light weight cryptography enables secure and efficient communication between networked smart objects. This proposed system focuses on the FPGA implementation of light weight cryptographic algorithm Tiny Encryption Algorithm TEA to adapt with many real time constraints such as memory, data loss and low cost. The proposed scheme uses Linear Feedback Shift Register to generate the random key making it more secure for sensitive information transfer in many real-time applications. In this study,operation of this cryptosystem is analyzed by implementing the cryptographic algorithm TEA with the key generation unit in FPGA Spartan 3E. We have also compared the results with the IDEA.
SNOW 3G is a synchronous, word-oriented stream cipher used by the 3GPP standards as a confidentiality and integrity algorithms. It is used as first set in long term evolution (LTE) and as a second set in universal mobile telecommunications system (UMTS) networks. The cipher uses 128-bit key and 128 bit IV to produce 32-bit ciphertext. The paper presents two techniques for performance enhancement. The first technique uses novel CLA architecture to minimize the propagation delay of the 2 modulo adders. The second technique uses novel architecture for S-box to minimize the chip area. The presented work uses VHDL language for coding. The same is implemented on the FPGA device Virtex xc5vfx100e manufactured by Xilinx. The presented architecture achieved a maximum frequency of 254.9 MHz and throughput of 7.2235 Gbps. 32
IP Core Design of Hight Lightweight Cipher and its Implementation csandit
In the present era of e-world where security has got a larger weightage, cryptography has its
role to play. Nowadays, the devices available in the market are of resource constrained type.
Hence we need lightweight ciphers for the efficient encryption of data thereby increasing the
performance. In this project a detailed study of HIGHT cryptographic algorithm is done which
outperforms standard algorithms. HIGHT is an ISO Standard block cipher which has 64-bit
block length and 128-bit key length. HIGHT was designed to be proper for the implementation
in the low resource environment such as WSN, WBN, RFID tag or tiny ubiquitous devices. It is
implemented on Spartan 6 FPGA evaluation kit and performance metrics are found out. A
HIGHT cryptocore is being designed, characterized and implemented which will be a reference
platform for hardware design engineers to model devices which require lightweight
characteristics.
IP CORE DESIGN OF HIGHT LIGHTWEIGHT CIPHER AND ITS IMPLEMENTATIONcscpconf
In the present era of e-world where security has got a larger weightage, cryptography has its
role to play. Nowadays, the devices available in the market are of resource constrained type.
Hence we need lightweight ciphers for the efficient encryption of data thereby increasing the
performance. In this project a detailed study of HIGHT cryptographic algorithm is done which outperforms standard algorithms. HIGHT is an ISO Standard block cipher which has 64-bit block length and 128-bit key length. HIGHT was designed to be proper for the implementation in the low resource environment such as WSN, WBN, RFID tag or tiny ubiquitous devices. It is implemented on Spartan 6 FPGA evaluation kit and performance metrics are found out. A HIGHT cryptocore is being designed, characterized and implemented which will be a reference platform for hardware design engineers to model devices which require lightweight characteristics.
A new cryptosystem with four levels of encryption and parallel programmingcsandit
Evolution in the communication systems has changed the paradigm of human life on this planet.
The growing network facilities for the masses have converted this world to a village (or may be
even smaller entity of human accommodation) in a sense that every part of the world is
reachable for everyone in almost no time. But this fact is also not an exception for coins having
two sides. With increasing use of communication networks the various threats to the privacy,
integrity and confidentiality of the data sent over the network are also increasing, demanding
the newer and newer security measures to be implied. The ancient techniques of coded
messages are imitated in terms of new software environments under the domain of
cryptography. The cryptosystems provide a means for the secured transmission of data over an
unsecured channel by providing encoding and decoding functionalities. This paper proposes a
new cryptosystem based on four levels of encryption. The system is suitable for communication
within the trusted groups.
A NEW CRYPTOSYSTEM WITH FOUR LEVELS OF ENCRYPTION AND PARALLEL PROGRAMMINGcscpconf
Evolution in the communication systems has changed the paradigm of human life on this planet. The growing network facilities for the masses have converted this world to a village (or may be even smaller entity of human accommodation) in a sense that every part of the world is reachable for everyone in almost no time. But this fact is also not an exception for coins having two sides. With increasing use of communication networks the various threats to the privacy, integrity and confidentiality of the data sent over the network are also increasing, demanding the newer and newer security measures to be implied. The ancient techniques of coded messages are imitated in terms of new software environments under the domain of cryptography. The cryptosystems provide a means for the secured transmission of data over an unsecured channel by providing encoding and decoding functionalities. This paper proposes a new cryptosystem based on four levels of encryption. The system is suitable for communication within the trusted groups.
Hierarchical Digital Twin of a Naval Power SystemKerry Sado
A hierarchical digital twin of a Naval DC power system has been developed and experimentally verified. Similar to other state-of-the-art digital twins, this technology creates a digital replica of the physical system executed in real-time or faster, which can modify hardware controls. However, its advantage stems from distributing computational efforts by utilizing a hierarchical structure composed of lower-level digital twin blocks and a higher-level system digital twin. Each digital twin block is associated with a physical subsystem of the hardware and communicates with a singular system digital twin, which creates a system-level response. By extracting information from each level of the hierarchy, power system controls of the hardware were reconfigured autonomously. This hierarchical digital twin development offers several advantages over other digital twins, particularly in the field of naval power systems. The hierarchical structure allows for greater computational efficiency and scalability while the ability to autonomously reconfigure hardware controls offers increased flexibility and responsiveness. The hierarchical decomposition and models utilized were well aligned with the physical twin, as indicated by the maximum deviations between the developed digital twin hierarchy and the hardware.
About
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Technical Specifications
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
Key Features
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface
• Compatible with MAFI CCR system
• Copatiable with IDM8000 CCR
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
Application
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Hybrid optimization of pumped hydro system and solar- Engr. Abdul-Azeez.pdffxintegritypublishin
Advancements in technology unveil a myriad of electrical and electronic breakthroughs geared towards efficiently harnessing limited resources to meet human energy demands. The optimization of hybrid solar PV panels and pumped hydro energy supply systems plays a pivotal role in utilizing natural resources effectively. This initiative not only benefits humanity but also fosters environmental sustainability. The study investigated the design optimization of these hybrid systems, focusing on understanding solar radiation patterns, identifying geographical influences on solar radiation, formulating a mathematical model for system optimization, and determining the optimal configuration of PV panels and pumped hydro storage. Through a comparative analysis approach and eight weeks of data collection, the study addressed key research questions related to solar radiation patterns and optimal system design. The findings highlighted regions with heightened solar radiation levels, showcasing substantial potential for power generation and emphasizing the system's efficiency. Optimizing system design significantly boosted power generation, promoted renewable energy utilization, and enhanced energy storage capacity. The study underscored the benefits of optimizing hybrid solar PV panels and pumped hydro energy supply systems for sustainable energy usage. Optimizing the design of solar PV panels and pumped hydro energy supply systems as examined across diverse climatic conditions in a developing country, not only enhances power generation but also improves the integration of renewable energy sources and boosts energy storage capacities, particularly beneficial for less economically prosperous regions. Additionally, the study provides valuable insights for advancing energy research in economically viable areas. Recommendations included conducting site-specific assessments, utilizing advanced modeling tools, implementing regular maintenance protocols, and enhancing communication among system components.
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Dr.Costas Sachpazis
Terzaghi's soil bearing capacity theory, developed by Karl Terzaghi, is a fundamental principle in geotechnical engineering used to determine the bearing capacity of shallow foundations. This theory provides a method to calculate the ultimate bearing capacity of soil, which is the maximum load per unit area that the soil can support without undergoing shear failure. The Calculation HTML Code included.
Student information management system project report ii.pdfKamal Acharya
Our project explains about the student management. This project mainly explains the various actions related to student details. This project shows some ease in adding, editing and deleting the student details. It also provides a less time consuming process for viewing, adding, editing and deleting the marks of the students.
Water scarcity is the lack of fresh water resources to meet the standard water demand. There are two type of water scarcity. One is physical. The other is economic water scarcity.
To the networks rfwkidea32 16, 32-8, 32-4, 32-2 and rfwkidea32-1, based on the network idea32-16
1. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
DOI:10.5121/ijcis.2015.5102
TO THE NETWORKS
4, 32–2 AND RFWKIDEA
NETWORK
ABSTRACT
In this article, based on a network IDEA32
RFWKIDEA32-16, RFWKIDEA32
not use round keys in round functions. It shows that in offered networks such Feistel network,
encryption and decryption using the same algorithm as a round function can be used any
transformation.
KEYWORDS
Feystel network, Lai–Massey scheme, encryption, decryption, encryption algorithm, round
function, round keys, output transformation, block, subblock, multiplication, addition,
multiplicative inverse, additive inverse
1.INTRODUCTION
H. Lai. and J. Massey replace the
PES [2]. However, after the publication of works by E. Biham and A. Shamir on the application
of the method of differential cryptanalysis to the algorithm PES, it was modified by increasing its
resistance and called IPES. A year later it was renamed IDEA [
schema Lai-Massey and the basis for the design of these algorithms is the "mixing operations
different algebraic groups".
Encryption PES and IDEA, similarly as in D
into four 16-bit sub-blocks and operations are carried out on these 16
process of encryption PES and IDEA to pairs of 16
operations:
In algorithms PES and IDEA, similarly as in DES, the block length is 64 bits. 64
divided into four 16–bit subblocks, and operations are performed on 16
process ofencryptionPESand IDEAto pairsof 16
groupoperations
− bitwise exclusive–OR (XOR), denoted as
− addition of integers modulo
representation of an integer on the basis of two. Operation is denoted as
International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
2
ETWORKS RFWKIDEA32–16, 32–
FWKIDEA32–1, BASED ON
ETWORK IDEA32–16
Tuychiev G.N.
In this article, based on a network IDEA32-16 we have developed 5 new networks:
16, RFWKIDEA32-8, RFWKIDEA32-4, RFWKIDEA32-2, RFWKIDEA32, that do
not use round keys in round functions. It shows that in offered networks such Feistel network,
encryption and decryption using the same algorithm as a round function can be used any
Massey scheme, encryption, decryption, encryption algorithm, round
function, round keys, output transformation, block, subblock, multiplication, addition,
multiplicative inverse, additive inverse
H. Lai. and J. Massey replace the DES algorithm developed a new block encryption algorithm
PES [2]. However, after the publication of works by E. Biham and A. Shamir on the application
of the method of differential cryptanalysis to the algorithm PES, it was modified by increasing its
tance and called IPES. A year later it was renamed IDEA [3]. These algorithms are based on
Massey and the basis for the design of these algorithms is the "mixing operations
Encryption PES and IDEA, similarly as in DES, the block length is 64 bits. 64 bit block is divided
blocks and operations are carried out on these 16-bit sub-blocks. In the
process of encryption PES and IDEA to pairs of 16-bit sub-blocks used three different group
In algorithms PES and IDEA, similarly as in DES, the block length is 64 bits. 64
bit subblocks, and operations are performed on 16–bit subblocks.
process ofencryptionPESand IDEAto pairsof 16–bitsubblocksapplies thre
OR (XOR), denoted as ⊕ (xor);
addition of integers modulo
16
2 , when the subblock is considered as a typical
representation of an integer on the basis of two. Operation is denoted as (add);
International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
2 9
–8, 32–
THE
16 we have developed 5 new networks:
2, RFWKIDEA32, that do
not use round keys in round functions. It shows that in offered networks such Feistel network,
encryption and decryption using the same algorithm as a round function can be used any
Massey scheme, encryption, decryption, encryption algorithm, round
function, round keys, output transformation, block, subblock, multiplication, addition,
DES algorithm developed a new block encryption algorithm
PES [2]. However, after the publication of works by E. Biham and A. Shamir on the application
of the method of differential cryptanalysis to the algorithm PES, it was modified by increasing its
]. These algorithms are based on
Massey and the basis for the design of these algorithms is the "mixing operations
ES, the block length is 64 bits. 64 bit block is divided
blocks. In the
blocks used three different group
In algorithms PES and IDEA, similarly as in DES, the block length is 64 bits. 64–bit block is
bit subblocks. In the
bitsubblocksapplies threedifferent
, when the subblock is considered as a typical
2. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
10
− multiplication of integers modulo 1216
+ , when the subblock is considered as a typical
representation of an integer in base two, except that the subblock of all zeros is assumed to be
16
2
. Operation is denoted as ⊗ (mul).
In encryption algorithms PES and IDEA round keys are multiplied by modulo 1216
+ and added
by modulo 16
2 with the corresponding subblocks. In MA the transformation is limited to the
operation of multiplication by modulo 1216
+ and addition by modulo 16
2 , i.e. not used
operations such as shift, substitution with S–box, etc. In the work [1, 4–6] by the authors based on
the structure of the encryption algorithm IDEA developed networks IDEA4–2, IDEA8–4,
IDEA16–8, IDEA32–16 consisting of two, four, eight and sixteen round functions. In developed
networks encrypted and decrypting, similarly as Feystel network, use the same algorithm. And as
round functions, it is possible to use any transformation.
In network IDEA32–16 in each round are applied 48 round keys, and 16 round keys are applied in
round functions, 32 round keys are multiplied and summed with the subblocks. Through the use
of 32 round key subblocks, round functions the network IDEA32–16 can be used without a key.
In addition, the network IDEA32–16 round functions have one input and output subblock. As
round functions you can use functions in which there are two input and output subblocks, four
input and output subblocks, eight input and output subblocks and sixteen input and output
subblocks. Scheme of n–rounded network IDEA32–16 shown in Figure 1.
3. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
Fig. 1. Scheme of n
In Fig. 1 zioperation ⊗ (mul),
, 8
2 ), ⊗–multiplication of integers modulo
In this paper on base of the network IDEA32
International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
Fig. 1. Scheme of n–rounded network IDEA32–16
(add) or⊕ (xor). Here – addition of integers modulo
multiplication of integers modulo 1232
+ ( 1216
+ , 128
+ ).
on base of the network IDEA32–16 is developed:
International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
11
addition of integers modulo 32
2 ( 16
2
4. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
12
− a network RFWKIDEA32–16 (round function without key IDEA32–16), consisting of
sixteen round functions,
− a network RFWKIDEA32–8 (round function without key IDEA32–8), consisting of eight
round functions,
− a network RFWKIDEA32–4 (round function without key IDEA32–4), consisting
of four round functions,
− a network (RFWKIDEA32–2 round function without key IDEA32–2), consisting
of two round functions,
− a network RFWKIDEA32–1 (round function without key IDEA32–1), consisting
of one round functions.
2.STRUCTURE OF THE NETWORK RFWKIDEA32–16
In the network RFWKIDEA32–16 length of the subblocks 0
X , 1
X , …, 31
X , length of the round
keys )1(32 −iX , 1)1(32 +−iX , …, 31)1(32 +−iX , 1...1 += ni , as well as the length of the input and output
subblocks round functions 0F , 1F , …, 15F equal to 32 (16, 8) bits. Scheme of n–rounded network
RFWKIDEA32–16 shown in Fig. 2, and the encryption process is given in the following formula.
⊕=
⊕⊕⊕=
⊕⊕=
⊕=
⊕⊕⊕⊕⊕=
⊕⊕⊕=
⊕⊕=
⊕⊕⊕⊕⊕=
+−−
+−−
+−−
+−−
+−−
+−−
+−−
−−
0
31)1(320
31
1
31
210
13)1(3213
13
1
18
10
14)1(3214
14
1
17
0
15)1(3215
15
1
16
15210
16)1(3215
16
1
15
210
29)1(322
29
1
2
10
30)1(321
30
1
1
15210
)1(320
0
1
0
))((
..............................................................
))((
))((
))((
...))((
...............................................................
))((
))((
...))((
YKzXX
YYYKzXX
YYKzXX
YKzXX
YYYYKzXX
YYYKzXX
YYKzXX
YYYYKzXX
iii
iii
iii
iii
iii
iii
iii
iii
, ni ...1= (1)
5. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
13
=
=
=
=
=
=
=
=
++
++
++
++
++
++
++
+
))((
........................................
))((
))((
))((
))((
........................................
))((
))((
))((
31320
3131
1
183213
1318
1
173214
1417
1
163215
1516
1
153215
1615
1
2322
292
1
1321
301
1
320
00
1
nnn
nnn
nnn
nnn
nnn
nnn
nnn
nnn
KzXX
KzXX
KzXX
KzXX
KzXX
KzXX
KzXX
KzXX
, in output transformation
Round function can be represented as )( 0
0
0
iTFY = , )( 1
1
1
TFY = , )( 3
2
2
TFY = ,…,
)( 15
15
15
TFY = . Here ⊕= +−− ))(( )1(321 jij
j
i
j
KzXT ))(( 16)1(3215
16
1 jij
j
i KzX ++−−
+
− , 15...0=j –
input subblocks of round functions and 0
Y , 1
Y , …, 15
Y – output subblocks of round functions
6. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
14
Fig. 2. Scheme of n–rounded network RFWKIDEA32–16
3.THE STRUCTURE OF THE NETWORK RFWKIDEA32–8,
RFWKIDEA32–4, RFWKIDEA32–2, RFWKIDEA32–1.
In the network RFWKIDEA32–16 round functions has one input and output subblock.In
addition, in block ciphers are used round function with two input and output subblocks.
On the basis network RFWKIDEA32–16 it is possible to build a network in which the
round function has four input and output subblock, eight input and output subblock and
the sixteen input and output subblocks. Network for which the round functions have two
input and output subblocks, and applies the eight round functions, called RFWKIDEA32–
7. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
15
8. Similarly, the network to which the round function has four input and output
subblocks, and applies four round distance functions is called RFWKIDEA32–4, etc. In
the same way the network RFWKIDEA32–2 and RFWKIDEA32–1.Scheme of the round
functions of the networks RFWKIDEA32–8, RFWKIDEA32–4, RFWKIDEA32–2,
RFWKIDEA32–1 shown in Fig. 3, 4, 5, 6.
In the network RFWKIDEA32–8 round functions 0F , 1F , 2F ,…, 7F have two input and output
subblocks, the length of subblocks is equal to 32 (16, 8) bits. If as the input subblock is put
],[0 10
TTT = , ],[1 32
TTT = , ],[2 54
TTT = , ..., ],[7 1514
TTT = , and as the output subblock of
the round functions take ],[0 10
YYY = , ],[1 32
YYY = , ],[2 54
YYY i = , ..., ],[7 1514
YYY = , the
round functions can be represented as )0(0 0 TFY = , )1(1 1 TFY = , )2(2 2 TFY = , ...,
)7(7 7 TFY = . For the correctness of the encryption process round function )0(0 0 TFY = can be
written as ),( 100
0
0
TTFY = , ),( 101
0
1
TTFY = , and round function )1(1 1 TFY = can be written as
),( 320
1
2
TTFY = , ),( 321
1
3
TTFY = and so on, round function )7(7 7 TFY = can be written as
),( 15140
7
14
TTFY = , ),( 15141
7
15
TTFY = .
Fig.3. Scheme of the round function of the network RFWKIDEA32–8
In the network RFWKIDEA32–4 round function 0F , 1F , 2F , 3F have four input and output
subblocks of 32 (16, 8) bits. If ],,,[0 3210
TTTTT = , ],,,[1 7654
TTTTT = ,
],,,[2 111098
TTTTT = , ],,,[3 15141312
TTTTT = –input subblock, ],,,[0 3210
YYYYY = ,
],,,[1 7654
YYYYY = , ],,,[2 111098
YYYYY = , ],,,[3 15141312
YYYYY = –output subblock of
round function, the round function can be represented as )0(0 0 TFY = , )1(1 1 TFY = ,
)2(2 2 TFY = , )3(3 3 TFY = . For the correctness of the encryption process round function
)0(0 0 TFY = can be written as ),,,( 32100
0
0
TTTTFY = , ),,,( 32101
0
1
TTTTFY = , …,
),,,( 32103
0
3
TTTTFY = , )1(1 1 TFY = rounder function can be written as
),,,( 76540
1
4
TTTTFY = , ),,,( 76541
1
5
TTTTFY = ,…, ),,,( 76543
1
7
TTTTFY = and so on,
8. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
16
rounder function ),3(3 3 KTFY = can be written as ),,,( 151413120
3
12
TTTTFY = ,
),,,( 151413121
3
13
TTTTFY = , …, ),,,( 151413123
3
15
TTTTFY = .
Fig.4. Scheme of the round function of the network RFWKIDEA32–4
Similarly, in the network RFWKIDEA32–2 round functions 0F , 1F have eight input and output
subblocks of 32 (16, 8) bits. If ],...,,[0 710
TTTT = , ],...,,[1 1598
iTTTT = –input subblock and
],...,,[0 710
YYYY = , ],...,,[1 1598
YYYY = –output subblock of round function, the round
function can be represented as )0(0 0 TFY = , )1(1 1 TFY = . For the correctness of the encryption
process round function )0(0 0 TFY = can be written as ),...,,( 7100
0
0
iTTTFY = ,
),...,,( 7101
0
1
TTTFY = , ….., ),...,,( 7107
0
7
TTTFY = ,round function )1(1 1 TFY = can be written
as ),...,,( 15980
1
8
TTTFY = , ),...,,( 15981
1
9
TTTFY = ,……., ),...,,( 15987
1
15
TTTFY = .
Fig.5. Scheme of the rounder function of the RFWKIDEA32 network
As the network RFWKIDEA32–2, if in the network RFWKIDEA32–1, as the input subblock take
],...,,[ 1510
TTTT = and as output subblock round function taking ],...,,[ 1510
YYYY = , the
round function can be represented as )(TFY = . For the correctness of the encryption process
round function )(TFY = can be written as ),...,,( 151000
TTTFY = , ),...,,( 151011
TTTFY = , ...,
),...,,( 15101515
TTTFY = .
9. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
17
Fig.6. Scheme of the round function of the network RFWKIDEA32–1
In networks RFWKIDEA32–8, RFWKIDEA32–4, RFWKIDEA32–2, RFWKIDEA32–1 j
iF – is
output 1+j subblock of round functions iF .
Encryption process networks RFWKIDEA32–8, RFWKIDEA32–4, RFWKIDEA32–2,
RFWKIDEA32–1 similar on (1) formula, but instead 10
YY ⊕ put 1
Y , instead 210
YYY ⊕⊕ put
2
Y and so on, instead 15210
... YYYY ⊕⊕⊕⊕ put 15
Y .
4.ROUND KEYS GENERATION OF THE NETWORKS
RFWKIDEA32–16, RFWKIDEA32–8, RFWKIDEA32–4,
RFWKIDEA32–2 AND RFWKIDEA32–1.
In −n roundednetworks RFWKIDEA32–16, RFWKIDEA32–8, RFWKIDEA32–4,
RFWKIDEA32–2 and RFWKIDEA32–1 in each round apply 32 round keys in the output
transformation 32 round keys, i.e. the number of all round keys equal to 3232 +n . When
encryption in Figure 1 is used instead of iK encryption round keys c
iK , while decryption round
decryption key d
iK .
In networks RFWKIDEA32–16, RFWKIDEA32–8, RFWKIDEA32–4, RFWKIDEA32–2,
RFWKIDEA32–1 decryption round keys the first round associated with the encryption round
keys by the formula (2).
))(,)(,)(
,)(,)(,)(,)(,)(,)(,)(
,)(,)(,)(,)(,)(,)(,)(
,)(,)(,)(,)(,)(,)(,)(
,)(,)(,)(,)(,)(,)(,)(
,)((),,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,(
012
3456789
10111213141515
141312111098
7654321
0
313230322932
2832273226322532243223322232
2132203219321832173216321532
14321332123211321032932832
732632532432332232132
323130292827262524232221201918
17161514131211109876543210
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
zc
n
dddddddddddddd
dddddddddddddddddd
KKK
KKKKKKK
KKKKKKK
KKKKKKK
KKKKKKK
KKKKKKKKKKKKKKK
KKKKKKKKKKKKKKKKKK
+++
+++++++
+++++++
+++++++
+++++++
=
(2)
10. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
If as operation zi, 15...0=i applies the operation mul, then
add, then KK −= and applies the operation xor, then
inversion K by modulo 1232
+ (
( 16
2 , 8
2 ).For 32, 16 and 8 bit numbers calculated
)12mod(1 161
+=⊗ −
KK , ⊗K
Decryption round keys output transformation associated with the encryption round key as
follows:
))(,)(,)(
(,)(,)(,)(
(,)(,)(,)(
(,)(,)(()
,,,
,,,
,,,,(
012
101112
11109
10
313029
212019
1211109
103132
32233222322132
32133212321132
33223213232
zczczc
zczczc
czczczc
zczcd
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
KKK
KKKK
KKKK
KKKK
KKKK
KKKK
KKKK
=+
+++
+++
+++
Similarly, the decryption round keys of the second, third, and n
round keys by the formula (3).
KK
KK
KK
KK
KK
KK
KKK
KKK
KKK
KKK
KKK
c
in
zc
in
c
in
zc
in
c
in
zc
in
c
in
zc
in
c
in
zc
in
c
in
zc
in
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
(,)(
(,)(
(,)(
(,)(
(,)(
(,)(
,,
,,
,,
,,
,,(
3
8
13
13
8
3
2)1(323)1(32
7)1(328)1(32
)1(3213)1(32
)1(3218)1(32
)1(3223)1(32
)1(3228)1(32
(3230)1(3229)1(32
(3223)1(3222)1(32
(3216)1(3215)1(32
)1(329)1(328)1(32
)1(321)1(32)1(32
++−++−
++−++−
++−++−
++−++−
++−++−
++−++−
+−+−
+−+−
−+−+−
−+−+−
+−+−−
As can be seen from equation (3) for decryption keys of encryption used in the reverse order, only
requires the computation of the inversion in accordance operation
in the first round encryption keys
International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
applies the operation mul, then 1−
= KK , applies the operation mul
and applies the operation xor, then KK = , here 1−
K – multiplicative
( 1216
+ , 128
+ ), K− – additive inverse K by modulo
For 32, 16 and 8 bit numbers calculated mod(11
=⊗ −
KK
)12mod(1 81
+=⊗ −
K and K− K =0, =⊕ KK
Decryption round keys output transformation associated with the encryption round key as
(,)(,)(,)(,)(,)(,)
(,)(,)(,)(,)(,)(,)
)(,)(,)(,)(,)(,)(,)
,,,,,,
,,,,,,
,,,,,,
456789
141515141312
765432
272625242322
171615141312
8765432
322932283227322632253224
20321932183217321632153214
1032932832732632532432
zczczczczczc
zczczczczczc
czczczczczczc
d
n
d
n
d
n
d
n
d
n
d
nn
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
KKKKKKK
KKKKKK
KKKKKKK
KKKKKK
KKKKKK
KKKKKKK
+++++++
+++++++
+++++++
Similarly, the decryption round keys of the second, third, and n–round associated with encryption
niKK
KKK
KKK
KKK
KKK
KKK
KKK
KKKK
KKKK
KKKK
KKKKK
zc
in
zc
in
z
zc
in
zc
in
zc
in
z
c
in
zc
in
zc
in
z
c
in
zc
in
zc
in
z
c
in
zc
in
zc
in
z
c
in
zc
in
zc
in
z
c
in
zc
in
zc
in
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
d
i
...2),)(,)(,)
,)(,)(,)(,)
)(,)(,)(,)
(,)(,)(,)
(,)(,)(,)
)(,)(,)(,)
(,)(,)(()
,,,,,
,,,,,
,,,,,
,,,,,,
012
4567
101112
151514
11109
654
10
31)1(321)1(322
4)1(325)1(326)1(327
9)1(3210)1(3211)1(3212
14)1(3215)1(3216)1(3217
19)1(3220)1(3221)1(3222
24)1(3225)1(3226)1(3227
29)1(3230)1(32)1(3231)1
28)1(3227)1(3226)1(3225)1(3224)1
21)1(3220)1(3219)1(3218)1(3217)1
14)1(3213)1(3212)1(3211)1(3210)
7)1(326)1(325)1(324)1(323)1(322
=
=
++−++−
++−++−++−
++−++−++−+
++−++−++−+
++−++−++−+
++−++−++−+
++−++−+−+−
+−+−+−+−+−
+−+−+−+−+−
+−+−+−+−+
+−+−+−+−+−+
As can be seen from equation (3) for decryption keys of encryption used in the reverse order, only
requires the computation of the inversion in accordance operation zi, 15...0=i .When encryption
in the first round encryption keys c
K0 , c
K1 , …, c
K15 into subblocks are used in a operation
International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
18
applies the operation mul
multiplicative
by modulo 32
2
)12mod( 32
+ ,
1.
Decryption round keys output transformation associated with the encryption round key as
,)
,)
,)
,
,
,
3
13
8
28
18
30
20
10
zc
zc
z
K
K
+
(3)
with encryption
z
z
z
z
z
,)
,)
,)
,)
,)
,
9
14
12
7
2
14
(4)
As can be seen from equation (3) for decryption keys of encryption used in the reverse order, only
.When encryption
into subblocks are used in a operation zi,
11. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
19
then decryption the output transformation requires the computation of inversion operation, ie.,
0
)( 032
zcd
n KK = , 1
)( 1132
zcd
n KK =+ , ..., 15
)( 151532
zcd
n KK =+ . If z0= z3= z6= z9= z12= z15=mul, z1= z4=
z7= z10= z13= add, z2= z5=z8= z11= z14=xor, then (3) the formula is as follows:
))(,,
,)(,,,)(,,,)(,,,)(,,
,)(,)(,,,)(,,,)(,,,)(
,,,)(,,,)((),,,
,,,,,,,,,
,,,,,,,,,
,,,,,,,,,,(
1
313029
1
282726
1
252423
1
222120
1
191817
1
16
1
151413
1
121110
1
987
1
6
54
1
321
1
03132303229322832
273226322532243223322232213220321932
183217321632153214321332123211321032
93283273263253243233223213232
−
−−−−
−−−−−
−−
++++
+++++++++
+++++++++
+++++++++
−
−−−−
−−−
−−=
ccc
cccccccccccc
ccccccccccc
ccccccd
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
d
n
KKK
KKKKKKKKKKKK
KKKKKKKKKKK
KKKKKKKKKK
KKKKKKKKK
KKKKKKKKK
KKKKKKKKKK
5.CONCLUSION
In paper on the basis of the network IDEA32–16 developed networks RFWKIDEA32–16,
RFWKIDEA32–8, RFWKIDEA32–4, RFWKIDEA32–2 and RFWKIDEA32–1. In developed
networks, as round functions you can choose any transformation, including one–way functions.
Because when decrypting no need to calculate inverse functions so to round functions, ie,
Based on these networks, when the length of the subblocks is equal to 32 bits, you can construct
the encryption algorithm is the block length of 1024 bits, while the length of the subblocks is
equal to 16 bits, you can construct the encryption algorithm is the block length of 512 bits and the
length of the subblocks is equal to 8 bits, we can construct the encryption algorithm is the block
length of 256 bits. If you choose as operations zi, 15...0=i operation mul, add and xor, all
possible variants of this choice is equal to 16
3 .
The advantage of the developed networks is that the encryption and decryption using the same
algorithm. It gives comfort for creating hardware and software–hardware tools.
In addition, as the round function using the round function of the existing encryption algorithms
for example, encryption algorithms based on Feistel network, you can developed these algorithms
on the basis of the above networks.
REFERENCES
[1] Aripov M.M. Tuychiev G.N. The network IDEA4–2, consists from two round functions //
Infocommunications: Networks–Technologies –Solutions. –Tashkent, 2012. №4 (24), pp. 55–59.
[2] Lai X., Massey J.L. A proposal for a new block encryption standard //Advances in Cryptology – Proc.
Eurocrypt’90, LNCS 473, Springer–Verlag, 1991, pp. 389–404
[3] Lai X., Massey J.L. On the design and security of block cipher //ETH series in information
processing, v.1, Konstanz: Hartung–GorreVerlag, 1992.
[4] Tuychiev G.N. The network IDEA8–4, consists from four round functions // Infocommunications:
Networks–Technologies –Solutions. –Tashkent, 2013. №2 (26), pp. 55–59.
12. International Journal on Cryptography and Information Security (IJCIS), Vol. 5, No. 1, March 2015
20
[5] Tuychiev G.N. The network IDEA16–8, consists from eight round functions // Bulletin TSTU. –
Tashkent, 2014, №1, pp. 183–187.
[6] Tuychiev G.N. The network IDEA16–8, consists from sixteen round functions // Bulletin NUUz. –
Tashkent, 2013, №4/1, pp. 57–61.
Authors
TuychievGulomNumonovich – teacher of National university of Uzbekistan, Ph.D. in technics, Republic
of Uzbekistan, Tashkent, e-mail: blasterjon@mail.com