This thesis examines the operating mechanisms of nonvolatile memory devices fabricated using ZnO nanoparticles embedded in a polymer layer. Chapter 1 introduces the study, noting the potential of such hybrid inorganic/organic nanocomposites for memory applications. Chapter 2 provides background on energy band diagrams and nonvolatile memory devices. The thesis then analyzes the memory effects and switching characteristics of devices using ZnO nanoparticles in a PVP layer in Chapter 3. Chapter 4 explores enhancing the memory effect by adding a C60 layer. Results indicate these organic memory devices show promise for next-generation nonvolatile applications by exploiting the charging and discharging of nanoparticles.

1. A Study on the Operating Mechanisms of Nonvolatile
Memory Devices fabricated utilizing ZnO Nanoparticles
embedded in a Polymer Layer
KyuHa Park
Department of Electronics and Computer Engineering
The Graduate School
Hanyang University
February 2009

2. A Study on the Operating Mechanisms of Nonvolatile Memory
Devices fabricated utilizing ZnO Nanoparticles embedded in a
Polymer Layer
Advised by
TaeWhan Kim
A Thesis Presented in Partial Fulfillment of the Requirements for the Degree of
Master of Electronics and Computer Engineering at The Graduate School,
Hanyang University, Seoul, Korea
by
KyuHa Park
Department of Electronics and Computer Engineering
The Graduate School
Hanyang University
February 2009

3. A Study on the Operating Mechanisms of Nonvolatile Memory Devices
fabricated utilizing ZnO Nanoparticles embedded in a Polymer Layer
by
Kyu-Ha Park
A Thesis submitted to the faculty of Hanyang University Presented in Partial
Fulfillment of the Requirements for the Degree of Master of Electronics and
Computer Engineering
February 2009
Approved by
Professor TaeWhan Kim
Professor KaeDal Kwack
Professor JeaGun Park

4. I
Abstract
A Study on the Operating Mechanisms of Nonvolatile Memory Devices
fabricated utilizing ZnO Nanoparticles embedded in a Polymer Layer
Kyu Ha Park
Department of Electronics and Computer Engineering
The Graduate School
Hanyang University
Organic bistable devices (OBDs) fabricated utilizing inorganic/organic hybrid
composites have emerged as excellent candidates for their potential application in
next-generation nonvolatile memory device. Even though some studies concerning
the electrical bistable properties on the OBDs have been reported, studies on carrier
transport mechanism of the OBDs fabricated utilizing an organic layer containing
inorganic nanoparticles are still necessary for enhancing memory effects.
The thesis reports data for the electrical properties and the carrier transport
mechanisms of OBDs fabricated by utilizing ZnO nanoparticles embedded in an
insulating polymer layer. The electrical bistability related to the memory effect for
the fabricated devices originates from the charging and discharging process in the
ZnO nanoparticles embedded in a polymer layer. The active polymer layers

5. II
containing ZnO nanoparticles for the organic memory devices used in this work were
fabricated by using a spin coating method. Scanning electron microscopy (SEM) and
transmission electron microscope (TEM) measurements were performed to
investigate the existence and the microstructural properties of the ZnO nanoparticles
embedded in a polymer layer. Current-voltage (I-V) measurements at 300 K have
been performed to investigate the electrical properties of the fabricated organic
memory devices. The I-V characteristics for the Al/ZnO nanoparticles embedded in
an insulating polymer layer/indium-tin-oxide/glass structure show that an apparent
electrical hysteresis is clearly observed, indicative of essential feature for a bistable
device. The maximum difference between the high conductivity state and the low
conductivity state as well as the maximum on/off ratio of the fabricated organic
memory devices is large enough to be used for nonvolatile memory devices, as
determined from the I-V curves. Also, the storage capability of the OBDs containing
C60 layers was compared with those without C60 layers. Furthermore, the electronic
structure and operating mechanisms of the charging and discharging processes for
the fabricated OBDs are described on the basis of the I-V curves. These results
indicate that the OBDs fabricated utilizing ZnO nanoparticles embedded in an active
polymer layer hold a promise for potential applications in next-generation
nonvolatile memory devices.
Keywords: nonvolatile memory, organic, bistable, nanoparticles, ZnO, polymer

6. III
Contents
Abstract ……………………………………………………………………………….I
Contents ………………………………………….…………………………………III
List of Figures …………………………………….…………………………………V
Chapter 1. Introduction ……………………………………….……………………1
Chapter 2. Basic concept for the study of nonvolatile memory devices
2-1. Energy band diagram ……………………………………………………….4
2-2. Nonvolatile memory devices………………………………..………………7
Chapter 3. Memory effect of the nonvolatile memory devices utilizing ZnO
nanoparticles embedded in a polymer layer
3-1. Introduction ……………………………………………………………….18
3-2. Experimental details ………………………………………………………19
3-3. Results and discussions
3-3-1. Switching characteristics of the Al/ZnO nanoparticles embedded in a
PVP/ITO/glass device …...………………………………………...22

7. IV
3-3-2. Operating mechanisms for the Al/ZnO nanoparticles embedded in a
PVP/ITO/glass device …...……………………………………...…24
3-4. Conclusion ………………………………………………………...………28
Chapter 4. Enhanced memory effect of the nonvolatile memory devices utilizing
ZnO nanoparticles embedded in a polymer layer with C60
4-1. Introduction ………………………………………………………….….29
4-2. Experimental details ……………………………………………….…....30
4-3. Results and discussions
4-3-1. Switching characteristics of the Al/C60/ZnO nanoparticles embedded
in a PMMA/C60/ITO/glass device ……………………………….35
4-3-2. Operating mechanisms for the Al/C60/ZnO nanoparticles embedded in
a PMMA/ITO/C60/glass device …………………………………....38
4-4. Conclusion …………………………………………….………….……..41
Chapter 5. Conclusion …………………………………………………….…….42
References ………………………………………………………………………..44
Abstract (Korean) ………………………………………………………………....46
Acknowledgement ……………………………………………………………….48

8. V
List of Figures
Fig. 1. Energy band diagram of a semiconductor in an electric field )(x .
Fig. 2. Energy band diagram of an floating gate transistor.
Fig. 3. Schematic cross section of an floating gate transistor.
Fig. 4. I–V curves of an floating gate device when there is no charge stored in the
floating gate (curve A) and when a negative charge Q is stored in the
floating gate (curve B).
Fig. 5. Schematic diagram of the OBDs with ZnO nanoparticles embedded in a PVP
layer.
Fig. 6. Scanning electron microscopy image of ZnO nanoparticles in a PVP layer.
Fig. 7. Current-voltage characteristics for the Al/ZnO nanoparticles embedded in a
PVP layer/indium-tin-oxide/glass device.
Fig. 8. (a) Space charge limited current (SCLC) and Fowler-Nordheim tunneling
(FNT) processes for the forward voltage, and (b) SCLC and FNT processes
for the reverse voltage.
Fig. 9. Schematic diagram of the energy band diagram corresponding to the operating
mechanisms of the hole injection processes during the forward voltage
operation for the Al/ZnO nanoparticles embedded in the PVP layer/ITO/glass
device for (a) a low applied voltage and (b) a applied voltage, respectively.
The LUMO and the HOMO represent the energy levels of the highest

9. VI
occupied molecular orbital and the lowest unoccupied molecular orbital of the
PVP, respectively. The Ec and Ev represent the conduction band edge and the
valence band edge of the ZnO nanocrystals, respectively.
Fig. 10. Schematic diagram of the the Al/C60/ZnO nanoparticles embedded in the
PMMA layer/C60/ITO devices.
Fig. 11. Transmission electron microscope image of ZnO nanoparticles in the PMMA
layer.
Fig. 12. Chemical structure of C60.
Fig. 13. Current-voltage characteristics for the Al/C60/ZnO nanoparticles embedded
in the PMMA layer/C60/ITO and the Al/ZnO nanoparticles embedded in the
PMMA layer/ITO devices. Filled rectangles and empty circles represent the
OBDs with and without C60 layers, respectively.
Fig. 14. Schematic diagram of the energy band diagram corresponding to the carrier
transport mechanisms of the hole and electron injection processes during the
forward voltage for the Al/C60/ZnO nanoparticles embedded in the PMMA
layer/C60/ITO devices. The LUMO and the HOMO represent the energy levels
of the highest occupied molecular orbital and the lowest unoccupied
molecular orbital of the PMMA, respectively. The Ec and Ev represent the
conduction band edge and the valence band edge of the C60 molecules and
ZnO nanoparticles, respectively.

10. １
Chapter 1. Introduction
Hybrid inorganic/organic nanocomposites have received considerable attention
because of the interest in both investigations of a fundamental physical properties
and promising applications in electronic and optoelectronic devices operating at
higher temperatures and lower currents [1-5]. Various kinds of devices fabricated
utilizing numerous nanocomposites, such as field effect transistors, solar cells, and
light-emitting diodes have been studied extensively [6-8]. Specifically,
nanocomposites based on the organic layer containing ZnO nanoparticles have
attracted considerable attention due to their potential applications in high-density
nonvolatile flash memory devices operating at low-power consumption [9, 10]. Thus,
potential applications of nonvolatile memory devices utilizing nanocomposites
consisting of nanoparticles embedded in an organic layer have driven extensive
efforts to form various kinds of nanocomposites [11-13]. Even though some studies
concerning nonvolatile memory devices fabricated utilizing inorganic nanoparticles
embedded in an organic layer have been conducted [14], very few studies on the
operating mechanisms of the charging and discharging processes for the memory
effects of nonvolatile bistable devices fabricated utilizing nanocomposites consisting
of inorganic nanoparticles embedded in an organic layer have been reported.
Understanding the operating mechanisms of memory effect is crucial for the study of
hybrid inorganic/organic nanocomposites because the electrical bistability related to

11. ２
the memory effect for devices originates from the charging and discharging process
in the nanoparticles embedded in a polymer layer.
For the basic concept to start the study of nonvolatile memory devices, energy
band diagram and an overview of nonvolatile memory devices are explained in
Chapter 2. Understanding energy band diagram is essential to study the operating
mechanisms because the influence of the field on the energies of holes and electrons
in the band diagram explains the mechanisms of the movement of carriers. Also,
because there is a widespread variety of nonvolatile memories, they all show
different characteristics according to the structure of the devices. Thus, the structure
of basic nonvolatile device and operations explained by equations are included in
Chapter 2.
In Chapter 3, memory effect of the nonvolatile memory devices utilizing ZnO
nanoparticles embedded in a polymer layer is studied with switching characteristics
and operating mechanisms. For the experiments, the active polymer layers containing
ZnO nanoparticles for the organic memory devices used in this work were fabricated
by using a simple spin coating method. Scanning electron microscopy (SEM) and
transmission electron microscope (TEM) measurements are performed to confirm the
existence and the microstructural properties of the ZnO nanoparticles embedded in a
polymer layer. From current-voltage (I-V) measurements at 300 K for the Al/ZnO
nanoparticles embedded in an insulating polymer layer/indium-tin-oxide (ITO)/glass
structure, an apparent electrical hysteresis is clearly observed, indicative of essential

12. ３
feature for bistable devices. Furthermore, the electronic structure and operating
mechanisms of the charging and discharging processes for the fabricated OBDs are
described on the basis of the I-V curves.
In Chapter 4, enhanced memory effect of the nonvolatile memory devices
utilizing ZnO nanoparticles embedded in a polymer layer in conjunction with C60 is
investigated. From I-V measurements for the Al/ZnO nanoparticles embedded in an
insulating polymer layer/C60/ITO/glass structure, the storage capability of the OBDs
containing C60 layers was compared with those without C60 layers. Furthermore, the
role of C60 was studied on the basis of the electronic structure and operating
mechanisms of the charging and discharging processes for the fabricated OBDs.
These results are concluded in Chapter 5: The OBDs fabricated utilizing ZnO
nanoparticles embedded in an active polymer layer as well as the OBDs with the
improved structure by the use of carrier transport layers hold a promise for potential
applications in next-generation nonvolatile memory devices.

13. ４
Chapter 2. Basic concept for the study of nonvolatile memory
devices
2-1. Energy band diagram
To study the operating mechanisms of nonvolatile memory devices, it is needed
to indicate the influence of the field on the energies of holes and electrons in the band
diagrams, which explains the charging and discharging process. To figure out the
influence of the field on the energies of holes and electrons, the relationship between
an electric field )(x and an electron potential energy )(xE should be basically
considered.
Firstly, assuming an electric field )(x in the x-direction, the change in
potential energy of electrons in the field can be described by drawing the energy
bands, as shown in Fig. 1. Holes drift in a same direction to the field, which results in
the increase of the potential energy for holes in the opposite direction of the field.
However, since electrons drift in an opposite direction to the field, the potential
energy for electrons increases in the direction of the field.
Secondly, the electrostatic potential )(x varies in the direction opposite to the
electric field, because the electrostatic potential )(x is defined in terms of positive
charges and is therefore related to the electron potential energy )(xE ;

14. ５
)()()( qxEx  .
Finally, )(x can be related to the electron potential energy in the band
diagram from the definition of electric field;
dx
xd
x
)(
)(

  (1)
Thus, electric field can be expressed by
dx
dE
qq
E
dx
d
dx
xd
x ii 1
)(
)(
)( 








 (2)
Therefore, the variation of band energies with )(x as drawn in Fig. 1 is
proved. The direction of the slope in the bands is related to  . Because the diagram
indicates electron energies, the slope in the bands indicates that electrons drift
“downhill” on the field while  points “uphill” in the band diagram [15].

15. ６
Fig. 1. Energy band diagram of a semiconductor in an electric field )(x .

16. ７
2-2. Nonvolatile memory devices
To have a memory cell that shows a switching characteristics from one state to
the other, one idea is to have a transistor with a threshold voltage that can change
repetitively from a high to a low state, corresponding to the two states of the memory
cell, i.e., the binary values (“1” and “0”) of the stored bit. The state of cells can be
changed into either state “1” or “0” by either “programming” or “erasing” methods.
For example, the threshold voltage VT of a MOS transistor can be written as
OXT CQKV  (3)
where K is a constant that determined from the gate and substrate material, doping,
and gate oxide thickness, Q is the charge weighted with respect to its position in
the gate oxide, and OXC is the gate oxide capacitance. Thus, the threshold voltage
of the memory cell can be adjusted by changing the amount of charge present
between the gate and the channel such as changing OXCQ . There are many ways to
obtain the threshold voltage shift. However, the most common technology is to store
charge in a conductive material layer between the gate and the channel and
completely surrounded by insulator. This is the floating gate device which is at the
basis of every modern nonvolatile memory devices.

17. ８
To understand the basic concepts and the functionality of a floating gate device,
the floating gate potential should be considered firstly. The floating gate completely
isolated within the gate dielectric acts as a potential well, as shown in Fig. 2. If a
charge is trapped into the well, it cannot move from the well without applying an
external force; thus, basically, the floating gate stores charge.
The schematic cross section of a generic floating gate device shown in Fig. 3
helps in understanding the electrical behavior of a floating gate device. FCC , SC ,
DC and BC are the capacitances between the floating gate and control gate, source,
drain, and substrate regions, respectively. When no charge is stored in the floating
gate, i.e., 0Q ,
)()()()(0 BFGBDFGDSFGSCGFGFC VVCVVCVVCVVCQ  (4)
where FGV is the potential on the floating gate, CGV is the potential on the control
gate, and SV , DV , and BV are potentials on source, drain, and bulk, respectively. If
BSDFCT CCCCC  (the total capacitance of the floating gate) and
TJJ CC (the coupling coefficient relative to the electrode J ) are defined, the
potential on the floating gate due to capacitive coupling is expressed by
BBSSDSDGSGFG VVVVV   (5)

18. ９
Equation (5) shows that the floating gate potential depends on the source, drain, and
bulk potentials as well as the control gate voltage. If the source and bulk are both
grounded, (5) can be rearranged as
)()( DSGSGDS
G
D
GSGFG VfVVVV  


 (6)
where
FC
D
G
D
C
C
f 


(7)
Device equations for the floating gate MOS transistor can be obtained from the
conventional MOS transistor equations by replacing MOS gate voltage GSV with
floating gate voltage FGV and transforming the device parameters, such as threshold
voltage TV and conductivity factor  , to values measured with respect to the
control gate. If we define for 0DSV
T
FG
T VV  (floating gate) TGV (control gate) = CG
TGV (8)

19. １０
and
 FG
(floating gate) 
G
1
 (control gate) = CG
G


1
(9)
To derive the current–voltage (I–V) equations of a floating gate MOS transistor in
the triode region (TR) and in the saturation region (SR), the I–V equations of a
conventional MOS transistor is considered.
Conventional MOS transistor
TR TGSDS VVV 




 2
2
1
)( DSDSTGSDS VVVVI 
SR TGSDS VVV 
2
)(
2
TGSDS VVI 

Floating gate MOS transistor
TR TDSGSGDS VfVVV 

20. １１
  





 2
)
2
1
( DS
G
DSTGSDS VfVVVI

 (10)
SR TDSGSGDS VfVVV 
2
)(
2
TDSGSGDS VfVVI  

(11)
 and TV of (10) and (11) indicate  (control gate)  CG
 and TV (control
gate)  CG
TV , respectively.
The capacitive coupling between the drain and the floating gate modifies the I–V
characteristics of floating gate MOS transistors with respect to conventional MOS
transistors.
1) After the channel is turned on by the drain voltage through the DSfV term in
(10) ( GSV  TV ), the floating gate transistor goes into depletion-mode
operation.
2) The saturation region for the conventional MOS transistor is where DSI is
essentially independent of the drain voltage. However, for the floating gate
transistor, the drain current will continue to rise as the drain voltage increases
and saturation will not occur.
3) The boundary between the triode and saturation regions for the floating gate
transistor is expressed by

21. １２
TDSGSGDS VfVVV  (12)
which is different from the conventional transistor; TGSDS VVV  .
4) The transconductance in SR is given by
)(
)(
TDSGSG
CONSTANTVGS
DS
m VfVV
V
I
g
DS





 (13)
where mg increases with DSV in the floating gate transistor, while mg is
relatively independent of the drain voltage in the saturation region in
conventional transistor.
5) The capacitive coupling ratio f only depends on DC and FCC
)( FCDGD CCf   , and its value can be verified by
)( CONSTANTIDS
GS
DS
V
V
f



 (14)
in the saturation region.

22. １３
Fig. 2. Energy band diagram of an floating gate transistor.

23. １４
Fig. 3. Schematic cross section of an floating gate transistor.

24. １５
However, when charge is stored in the floating gate, i.e., 0Q , the following
modifications need to be included.
Equations (6), (8), and (10), respectively, become
T
DSDGSGFG
C
Q
VVV   (15)
FC
FG
T
GGT
FG
T
G
CG
T
C
Q
V
C
Q
VV 

11
(16)
















 2
)
2
1
()
1
1( DS
G
DS
TG
TGSDS VfV
C
Q
VVI

 (17)
Equation (16) shows that TV depends on Q . In particular, the threshold voltage
shift TV is derived as
FCTTT CQVVV  0 (18)
where 0TV is the threshold voltage when 0Q .
Equation (17) shows that injected charge shifts the I–V curves of the cell. If the
reading biases are fixed (for example, 5GSV V, 1DSV V), the presence of charge
greatly affects the current level for the reading operation. Fig. 4 shows two curves:

25. １６
curve A represents the “1” state and curve B represents the “0” state with about a 3-V
threshold shift [16].

26. １７
Fig. 4. I–V curves of an floating gate device when there is no charge stored in the
floating gate (curve A) and when a negative charge Q is stored in the
floating gate (curve B).

27. １８
Chapter 3. Memory effect of the nonvolatile memory devices
utilizing ZnO nanoparticles embedded in a polymer
layer
3-1. Introduction
Nanocomposites based on the organic layer containing ZnO nanoparticles have
attracted considerable attention because of their potential applications in high-density
nonvolatile flash memory devices operating at low-power consumption. This chapter
reports data for the operating mechanisms regarding memory effects of nonvolatile
organic bistable devices (OBDs) fabricated utilizing ZnO nanoparticles embedded in
a poly-4-vinyl-phenol (PVP) layer by using a simple spin-coating method. Scanning
electron microscopy (SEM) measurements were performed to investigate the
structural properties of the formed nanocomposites. Current-voltage (I-V)
measurements were carried out to investigate the electrical bistable properties of the
fabricated OBDs containing ZnO nanoparticles embedded in the PVP layer. Possible
operating mechanisms for memory effects of fabricated OBDs are described on the
basis of the I-V results.

28. １９
3-2. Experimental details
A schematic diagram of the fabricated OBDs: the Al/ZnO nanoparticles
embedded in a PVP layer/ITO/glass structure is shown in Fig. 5. The OBD was
fabricated through the following process: At first, the indium-tin-oxide (ITO) thin
film, acting as a hole injection layer in the OBDs, coated on the glass substrate was
alternately cleaned with a chemical cleaning procedure by using trichloroetylene,
acetone, and methanol solutions. Then, the PVP layer containing the ZnO
nanoparticles was formed by spin coating a tetrahydrofuran solution of 1 wt% by
PVP and 1 wt% by ZnO nanoparticles. The PVP layer in the fabricated OBDs acts as
a carrier transport layer. Lastly, a top Al electrode layer with a thickness of about 400
nm was deposited by using thermal evaporation.
The ZnO nanoparticles were optimized to form an active layer consisting of
ZnO nanoparticles with a uniform distribution, which was confirmed by a SEM
image as shown in Fig. 6. The size of the ZnO nanoparticles is approximately
between 10 and 15 nm, and the surface density of the ZnO nanoparticles is
approximately 109
cm-2
.

29. ２０
ZnO nanoparticles
DC
Glass
ITO
PVP
Al
Fig. 5. Schematic diagram of the OBDs with ZnO nanoparticles embedded in a PVP
layer.

30. ２１
Fig. 6. Scanning electron microscopy image of ZnO nanoparticles in a PVP layer.

31. ２２
3-3. Results and discussions
3-3-1. Switching characteristics of the Al/ZnO nanoparticles embedded in a
PVP/ITO/glass device
Figure 7 shows I-V curves for the Al/ZnO nanoparticles embedded in a PVP
/ITO/glass device, obtained by sweeping the applied voltage from -10 V to 10 V to
10 V to -10 V. The I-V curve under a forward bias voltage, as shown in the lower
current of Fig. 7, depicts a dramatic increase in the injection current at a writing
voltage of 7 V, indicative of a conductivity transition of the device from an OFF state
to an ON state. The OFF and the ON states correspond to the relatively low and high
conductivity states, respectively [17]. After the writing voltage is once applied, the
device maintains the ON state. The state transition from the OFF state to the ON
state is equivalent to the “writing” process in a digital memory cell. The maximum
ON/OFF current ratio between the ON state current and OFF state current for the
Al/ZnO nanoparticles embedded in a PVP /ITO/glass device at the writing voltage is
approximately 102
. While the applied voltage decreases from 10 to -10 V, the ON
state keeps up in the applied voltage range of 10 to 0 V. However, the device current
in the applied voltage range of 0 to -10 V significantly decreases. Finally, the state of
the device returns back to the OFF state at the erasing voltage of -10 V.

32. ２３
-10 -5 0 5 10
10
-9
10
-8
10
-7
10
-6
10
-5
10
-4
10
-3
10
-2
CURRENT(A)
APPLIED VOLTAGE (V)
Fig. 7. Current-voltage characteristics for the Al/ZnO nanoparticles embedded in a
PVP layer/indium-tin-oxide/glass device.

33. ２４
3-3-2. Operating mechanisms for the Al/ZnO nanoparticles embedded in a
PVP/ITO/glass device
The carrier transport mechanism in each state is investigated by the data fitting
of the I-V curve. When the forward voltage is applied to the device, the space charge
limited current (SCLC) is the dominant mechanism before the writing voltage, as
shown in Fig. 8(a). Because of the existence of the nanoparticles acting as the trap
site, the slope of the fitting line for the SCLC decreases before 2 V. When the applied
voltage is from the writing voltage to 10 V, Fowler-Nordheim tunneling (FNT)
process is dominant for the carrier transport mechanism of the device, as shown in
the inset of Fig. 8(a). When the reverse voltage is applied to the device, the FNT and
SCLC processes are the dominant transport mechanisms above and below the writing
voltage, respectively, as shown in the Fig. 8(b). The carrier transport mechanisms, as
investigated from the data fitting results, are the SCLC process on the low voltage
and the FNT process on the high voltage. The appearance of the SCLC process
indicates that the space charges exist in the active PVP layer.
Even though the operating mechanisms for the writing process for the Al/ZnO
nanoparticles embedded in a PVP/ITO/glass device might be quite complicated, the
operating mechanisms for memory effects of the OBDs can be described on the basis
of the energy band diagram as well as I-V curve itself and the data fitting results of
the I-V curve. The energy band diagram for the Al/ZnO nanoparticles embedded in a

34. ２５
PVP/ITO/glass device at the OFF state is shown in Fig. 9(a). The bistable
mechanisms for the Al/ZnO nanoparticles embedded in a PVP/ITO/glass device are
basically explained by the hole injection process [18]. While the positive forward
voltage is applied to the Al electrode, the hole and electron are injected from the Al
and the ITO electrodes into the PVP layer via the SCLC process, respectively.
However, until the writing voltage is applied during positive forward sweep, low
current conducts through the device because the carrier injection efficiency is low
due to the high barrier height between the electrodes and PVP layer. Because the
injected holes are trapped in the valance band of the ZnO nanoparticles, the trapped
holes generate the internal electric field, resulting in a decrease of the interface
electric field between the Al electrode and the PVP layer. Thus, the decrease of the
interface electric field between the Al electrode and the PVP layer reduces the hole
injection efficiency from the Al electrode, resulting in a low increasing rate for the
device while the voltage is applied from 2.5 to 7 V. However, the efficiency of the
electron injection from the ITO electrode gradually increases resulting from the
increase of the interface electric field between the ITO electrode and the PVP layer.
The trapped hole density in ZnO nanoparticles embedded in the active PVP layer at
the applied writing voltage is enough to make the electrons tunnel through the PVP
layer, as shown in Fig. 9(b). As the FNT current of the device abruptly increases, and
the device state is changing from the OFF state to the ON state.

35. ２６
-0.50 -0.25 0.00 0.25 0.50 0.75
-8
-7
-6
-5
-1.0 -0.5 0.0 0.5 1.0
-7
-6
-5
-4
-3
(b)
Log(I)
Log(V)
space charge limited current
I ~ V
a
(a)
0.12 0.14 0.16 0.18
-15
-14
-13
-12
ln(I/V2)
V-1
Fowler -Nordheim tunneling
I ~ V2
exp(V-1
)
space charge limited current
I ~ V
a
Log(I)
Log(V)
0.5 1.0 1.5
-11.2
-11.0
-10.8
-10.6
Fowler -Nordheim tunneling
I ~ V2
exp(V-1
)
Ln(I/V2)
V-1
Fig. 8. (a) Space charge limited current (SCLC) and Fowler-Nordheim tunneling
(FNT) processes for the forward voltage, and (b) SCLC and FNT processes
for the reverse voltage.

36. ２７
Fig. 9. Schematic diagram of the energy band diagram corresponding to the operating
mechanisms of the hole injection processes during the forward voltage
operation for the Al/ZnO nanoparticles embedded in the PVP layer/ITO/glass
device for (a) a low applied voltage and (b) a applied voltage, respectively.

37. ２８
3-4. Conclusion
To conclude this chapter, electrical bistabilities and operating mechanisms for
nonvolatile OBDs consisting of the Al/ZnO nanoparticles embedded in a PVP
layer/ITO/glass structure fabricated by using a simple spin-coating method were
investigated. A SEM image showed that ZnO nanoparticles were formed inside the
PVP layer. The I-V curves for the fabricated OBDs exhibited electrical bistabilities
with an apparent hysteresis, which is attributed to the hole capture in the ZnO
nanoparticles. The maximum ON/OFF ratio between the ON state and the OFF state
of the I-V curves for the OBDs was as large as 102
. To understand the switching
characteristics of OBDs, the carrier transport mechanisms were described on the
basis of the data fitting results as well as the energy band diagram. These results
indicate that OBDs fabricated utilizing ZnO nanoparticles embedded in a PVP layer
hold promise for potential applications in next-generation nonvolatile memories.

38. ２９
Chapter 4. Enhanced memory effect of the nonvolatile memory
devices utilizing ZnO nanoparticles embedded in a
polymer layer with C60
4-1. Introduction
When compared with Chapter 3, this chapter focuses on the effect of C60 layers
during the process of carrier transport. In addition, Chapter 4 reports data for the
electrical properties and the carrier transport mechanisms of OBDs fabricated by
utilizing ZnO nanoparticles with PMMA nanocomposites sandwiched between two
C60 layers by using a spin-coating methods. The role of C60 layers, which acts as an
electron transport layers, is to enhance the electron mobility. Transmission electron
microscope (TEM) measurements were carried out to investigate the microstructural
properties and the existence of the ZnO nanoparticles embedded in the PMMA layer.
Current-voltage (I-V) measurements were performed to investigate the electrical
properties of the OBDs fabricated utilizing ZnO nanoparticles embedded in the
PMMA layer sandwiched between two C60 layers. The storage capability of the
OBDs containing C60 layers was compared with those without C60 layers.
Furthermore, carrier transport mechanisms corresponding to the memory effects of
the fabricated OBDs are described on the basis of the I-V curves and the energy band
diagram.

39. ３０
4-2. Experimental details
A schematic diagram of the OBDs containing ZnO nanoparticles embedded in a
PMMA layer sandwiched between two C60 layers fabricated in this work is shown in
Fig. 10. The OBDs were formed on indium-tin-oxide (ITO) coated glass substrates
by a spin coating method through the following process; the ITO thin film coated on
the glass substrate was alternately cleaned with a chemical cleaning procedure by
using trichloroetylene, acetone, and methanol solutions. A C60 layer with a thickness
of about 30 nm was deposited on the surface of the ITO thin film by using the spin
coating method after the sonications of a toluene solution for 4h. C60, which of
chemical structure is shown in Fig. 11, is a well-known class of n-type organic
semiconductors, which have a high electron mobilities [19, 20], and the C60 in the
OBDs acts as an electron transport layer. Then, the PMMA layer containing the ZnO
nanoparticles was formed by using a tetrahydrofuran solution containing 1 wt%
PMMA and 1 wt% ZnO nanoparticles. Subsequently, about 30-nm-thick C60 layer
was formed again on the ZnO/PMMA hybrid layer by using the spin-coating method,
which was followed by a thermal deposition of an Al electrode layer with a thickness
of about 300 nm. In addition, the Al/ZnO nanoparticles embedded in the PMMA
layer/ITO devices without C60 layers were fabricated so that electrical properties of
the Al/C60/ZnO nanoparticles embedded in the PMMA layer/C60/ITO devices could
be compared with the Al/ZnO nanoparticles embedded in the PMMA layer/ITO

40. ３１
devices.
Fig. 12 shows a plan-view bright-field TEM image of the ZnO nanoparticles
embedded in the PMMA layer. The plan-view bright-field TEM image shows that
ZnO nanoparticles are uniformly distributed in the PMMA layer. The size of the ZnO
nanoparticles is about 60 nm, and the surface density of the ZnO nanoparticles is
approximately 109
cm-2
.

41. ３２
Fig. 10. Schematic diagram of the the Al/C60/ZnO nanoparticles embedded in the
PMMA layer/C60/ITO devices.

42. ３３
Fig. 11. Chemical structure of C60.

43. ３４
Fig. 12. Transmission electron microscope image of ZnO nanoparticles in the PMMA
layer.

44. ３５
4-3. Results and discussions
4-3-1. Switching characteristics of the Al/C60/ZnO nanoparticles embedded in a
PMMA/C60/ITO/glass device
The I-V curves for the Al/C60/ZnO nanoparticles embedded in the PMMA
layer/C60/ITO and the Al/ZnO nanoparticles embedded in the PMMA layer/ITO
devices are shown in Fig. 13. The I-V curves for both OBDs with and without C60
layers show current bistabilities, which is an essential feature for a bistable memory
device. The maximum ON (high conductivity)/OFF (low conductivity) current ratio
between the states ON and OFF for the device of Al/C60/ZnO nanoparticles
embedded in the PMMA layer/C60/ITO structure is as large as about 104
. However,
the maximum ON/OFF ratio for the device of Al/ZnO nanoparticles embedded in the
PMMA layer/ITO structure is about 102
, which are two orders smaller than that for
the structure C60 sandwiched layers. The current density at the state ON for the
device containing C60 layers was significantly higher than that for the device without
C60 layer. The enhancement of the storage capability is attributed to the interaction of
carriers by the existence of the C60 layers, acting as electron transport layers. These
results indicate that the charge injection efficiency which results in high current
density and the charge storage capacity in OBDs can be significantly improved by
inserting C60 layers.

45. ３６
The I-V curves for the Al/C60/ZnO nanoparticles embedded in the PMMA
layer/C60/ITO devices obtained by varying the voltage across the device from -3 V to
3 V to -3 V are shown in Fig. 13. During the forward sweep, when the applied bias
voltage to the device is 2 V, which is defined by a writing voltage, the electrical
characteristics of the device changes from the OFF state to the ON state, resulting
from a dramatic increase of the injection current at 2 V. The transition from the OFF
state to the ON state corresponds to the current bistability, indicative of the
nonvolatile memory effect [21-23]. The ON/OFF current ratio at the writing voltage
of 2 V is approximately 5 × 103
. After the transition is achieved, the ON state is
maintained in the OBDs. During the reverse sweep from 3 V to -3 V, the ON state
remains until the device state returns to the OFF state at the erasing voltage of -3 V.

46. ３７
Fig. 13. Current-voltage characteristics for the Al/C60/ZnO nanoparticles embedded
in the PMMA layer/C60/ITO and the Al/ZnO nanoparticles embedded in the
PMMA layer/ITO devices. Filled rectangles and empty circles represent the
OBDs with and without C60 layers, respectively.

47. ３８
4-3-2. Operating mechanisms for the Al/C60/ZnO nanoparticles embedded in a
PMMA/ITO/C60/glass device
Even though the carrier transport mechanisms for the memory effects for the
Al/C60/ZnO nanoparticles embedded in the PMMA layer/C60/ITO devices might be
quite complicated, the carrier transport mechanisms for the OBDs can be described
on the basis of the I-V curves and the energy band structure of the fabricated OBDs.
The carrier transport mechanisms corresponding to the electrical bistabiltiy for the
Al/C60/ZnO nanoparticles embedded in the PMMA layer/C60/ITO devices are
attributed to the carrier injection and capture [24]. The energy band diagram
corresponding carrier transport mechanisms for the Al/C60/ZnO nanoparticles
embedded in the PMMA layer/C60/ITO device is shown in Fig. 14. When the positive
forward voltage is applied to the Al electrode, holes emitted from the Al electrode
and electrons emitted from the ITO electrodes are injected into the PMMA layer. The
carrier injection efficiency of the OBDs with the C60 layers is higher than the OBDs
without the C60 layers.
The injected holes are trapped in the valance band of the ZnO nanoparticles.
Since the trapped holes generate an internal electric field, the efficiency of electron
injection is enhanced due to an increase of the interface electric field between the
ITO electrode and the PMMA layer. The trapped hole density in the active PMMA
layer at the writing voltage is enough for the electrons to emit from the ITO electrode

48. ３９
and to inject into the PMMA layer, resulting in significantly increase in the current
[25]. The device state changes from the OFF state to the ON state due to the rapid
increase of the current for the device, which indicates writing process. In the process
of electron injection, the C60 layer enhances the injection of electrons from the ITO,
which can be compared with the device without the C60 layer as investigated from
Fig. 13. Thus, the low current of the device without C60 layers is attributed to a low
electron injection efficiency resulting from the formation of the high barrier interface
between the ITO and the PMMA layer, resulting in the smaller ON/OFF ratio in
comparison with the devices with C60 layers.

49. ４０
Fig. 14. Schematic diagram of the energy band diagram corresponding to the carrier
transport mechanisms of the hole and electron injection processes during the
forward voltage for the Al/C60/ZnO nanoparticles embedded in the PMMA
layer/C60/ITO devices.

50. ４１
4-4. Conclusion
In summary, OBDs fabricated utilizing nanocomposites consisting of ZnO
nanoparticles embedded in PMMA layer sandwiched between two C60 layers by
using a simple spin-coating method were investigated. A TEM image showed that
ZnO nanoparticles were uniformly distributed in the PMMA layer. The I-V curves
for both the Al/C60/ZnO nanoparticles embedded in the PMMA layer/C60/ITO and the
Al/ZnO nanoparticles embedded in the PMMA layer/ITO devices showed electrical
bistabilities with apparent hysteresis, which was attributed to the hole capture
processes in the ZnO nanoparticles. However, the maximum ON/OFF ratio between
the ON state and the OFF state of the I-V curves for the OBDs containing the C60
layers was as large as 104
, which are two orders larger than that for the OBDs
without C60 layers. The enhancement of the memory effects by utilizing C60 layers
for the Al/C60/ZnO nanoparticles embedded in the PMMA layer/C60/ITO device is
described by the carrier transport mechanisms on the basis of the energy band
diagram and the I-V results. These results indicate that the OBDs fabricated utilizing
ZnO nanoparticles embedded in a PMMA layer with the C60 layers hold promise for
potential applications in next-generation nonvolatile memories.

51. ４２
Chapter 5. Conclusion
Organic bistable devices (OBDs) fabricated utilizing inorganic/organic hybrid
composites have emerged as excellent candidates for their potential application in
next-generation nonvolatile memory device. Specifically, nanocomposites based on
the organic layer containing ZnO nanoparticles have attracted considerable attention
because of their potential applications in high-density nonvolatile flash memory
devices operating at low-power consumption. Even though some studies concerning
the electrical bistable properties on the OBDs have been reported, studies on carrier
transport mechanism of the OBDs fabricated utilizing an organic layer containing
inorganic nanoparticles are still necessary for enhancing memory effects.
The thesis mainly discussed about the switching characteristics and the carrier
transport mechanisms of OBDs fabricated by utilizing ZnO nanoparticles embedded
in an insulating polymer layer. After understanding the basic concept of energy band
diagram and characteristics of nonvolatile memory devices in Chapter 2, experiments
regarding memory effect of the nonvolatile memory devices utilizing ZnO
nanoparticles embedded in a polymer layer were performed, which are reported from
Chapter 3 to Chapter 4.
For the experiments, the active polymer layers containing ZnO nanoparticles for
the organic memory devices used in this work were fabricated by using a simple spin
coating method. Scanning electron microscopy (SEM) and transmission electron

52. ４３
microscope (TEM) measurements were performed to investigate the existence and
the microstructural properties of the ZnO nanoparticles embedded in a polymer layer.
From current-voltage (I-V) measurements at 300 K for the both of fabricated
devices; the Al/ZnO nanoparticles embedded in an insulating polymer layer/indium-
tin-oxide (ITO)/glass structure and the Al/C60/ZnO nanoparticles embedded in an
insulating polymer layer/C60/ITO/glass structure, essential features for bistable
devices were shown from apparent electrical hysteresis. Also, the storage capability
of the OBDs containing C60 layers was compared with the OBDs without C60 layers.
The enhancement of the storage capability of the Al/C60/ZnO nanoparticles
embedded in an insulating polymer layer/C60/ITO/glass structure is attributed to the
interaction of carriers and the existence of the C60 layers, acting as electron transport
layers. These results indicate that the charge storage capacity and the charge injection
efficiency in OBDs can be significantly improved by inserting C60 layers. Finally, the
electronic structure and operating mechanisms of the charging and discharging
processes for the fabricated OBDs were described on the basis of the I-V curves.
Study on the operating mechanisms of nonvolatile memory devices fabricated
utilizing ZnO nanoparticles embedded in a polymer layer concludes that the OBDs
fabricated utilizing ZnO nanoparticles embedded in an active polymer layer as well
as the OBDs with the improved structure by the use of the carrier transport layers
hold a promise for potential applications in next-generation nonvolatile memory
devices.

53. ４４
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54. ４５
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55. ４６
국문요지
고분자 박막 안에 삽입된 ZnO 나노 입자를 사용한 비휘발성 메모리
소자의 동작 원리에 관한 연구
무기물과 유기물로 이루어진 유기 쌍안정성 소자는 차세대 비휘발성메
모리 소자로 주목 받고 있다. 유기 쌍안정성 소자에 대해 약간의 연구가
진행이 되었으나, 메모리 효과 개선을 위해 동작원리에 대한 규명이 더
필요하다.
본 연구에서는, 고분자 박막 사이에 분산된 ZnO 나노 입자로 만들어진
유기 쌍안정성 소자의 전기적 특성과 동작 원리를 규명해 보고자 하였다.
기본적으로 유기 쌍안정성 소자의 전기적 특성인 전기적 쌍안정성은 고분
자 박막 삽입된 ZnO 나노 입자를 통한 전자와 정공의 포획 및 방출에 의
해 나타난다. 그를 위하여, 스핀-코팅을 통해 ZnO 나노 입자를 포함하는
고분자 박막을 형성시켰다. 그 후, ZnO 나노 입자의 존재와 미세 구조를
파악하기 위해 주사 전자 현미경, 투과 전자 현미경을 사용하여 관측하였
다. 전극/ZnO 나노 입자를 포함한 고분자 박막/산화인듐주석 투명 전극

56. ４７
구조의 소자 제작을 마친 후, 전기적 특성을 알아보기 위해 전류-전압 측
정을 하였다. 소자의 ON/OFF 비율을 얻어낼 수 있었고, 비휘발성 메모리
소자의 전기적 특성인 전기적 쌍안정성이 관찰되었다. 전류-전압 측정을
통해 관측된 유기 쌍안정성 소자의 전기적 쌍안정성 및 유기 쌍안정성 소
자의 동작 원리를 에너지 밴드 다이어그램을 사용해 규명하였다. 전극
/ZnO 나노 입자를 포함한 고분자 박막/산화인듐주석 투명 전극 구조의
소자와 더불어, 전자 수송 층의 역할을 하는 C60 층을 포함한 전극
/C60/ZnO 나노 입자를 포함한 고분자 박막/C60/산화인듐주석 투명 전극
구조의 유기 쌍안정성 소자를 제작하여 유기 쌍안정성 소자의 메모리 효
과를 개선시켰다.
고분자 박막 안에 삽입된 ZnO 나노 입자를 사용한 비휘발성 메모리의
전기적 쌍안정성과 동작 원리에 관한 연구결과는 차세대 비휘발성 메모리
개발에 큰 도움을 줄 것이다.
주제어: 비휘발성 메모리, 유기물, 쌍안정성, 나노입자, ZnO, 고분자

57. ４８
Acknowledgement
First, I would like to express my gratitude to Dr. TaeWhan Kim for being an
outstanding advisor and excellent professor. Without his constant encouragement,
support, and invaluable suggestions, this work would not be possible. I would also
like thank the members of my committee Dr. KaeDal Kwack and Dr. JeaGun Park
for their time and effort in reviewing this work.
My special thanks also go to Dr. InHo Kim and Dr. BoYoung Kim who greatly
enriched my knowledge into technical management. I am deeply indebted to Dr.
OhKyong Kwon for recommendation to Fairchild Semiconductor Internship Program.
I am especially grateful to National Instruments and Fairchild Semiconductor for
unforgettable internship last winter and last summer, respectively.
I would like to thank my best friends WoongRae Kim, BumKyum Kim, and
DongJin Kim in the department of Electronics and Computer Engineering at
Hanyang University for their valuable advice and help, and for being fellow thinkers.
I would also like to acknowledge my best friends YuKyum Kim, JinSu You, KwangIl
Choi, and ASeong Min. Those many years we shared together will not be forgotten. I
am grateful to Adam Turner and Kara Macdonald for editorial efforts.
I am deeply and forever indebted to my parents for their love, support, and
encouragement throughout my entire life. Last, but not least, I would also like to
express my love and thanks to my brother KyuSuk.