The following simulation is an excerpt from bachelor's thesis:
REVIEW OF SOLID STATE TRANSFORMERS WITH SIMULATION OF AN
IMPLEMENTATION BASED ON CASCADED H-BRIDGE CONVERTERS
Authored by Ayush Sagar (ayush@ieee.org), Shiveesh Fotedar, Sumit Joshi
26
5. THE CASCADED H-BRIDGE CONVERTER BRIDGE BASED SST
Figure 5-1
The proposed 20kVA cascaded H-Bridge multilevel converter based solid state
transformer directly interfaces with 12kV distribution voltage level. The solid state
transformer consists of a cascaded multilevel AC/DC rectifier, Dual Active Bridge (DAB)
converters with high frequency transformers and a DC/AC inverter.
The Solid State Transformer (SST) is the interface device between the distribution
system and the electricity consumer’s in future smart grid systems. In the electric configuration
of the smart grid system shown in Figure 1.12, low voltage (120V), residential class
Distributed Renewable Energy Resource (DRER), Distributed Energy Storage Device
(DESD), and loads are connected to the distribution bus (12kV) through a solid state
transformer. The solid state transformer is used to enable active management of DRER,
DESD and loads, rather than a 60Hz conventional transformer.
The SST has the features of instantaneous voltage regulation, voltage sag compensation,
fault, isolation, power factor correction, harmonic isolation, dc output.
The SST has a 400V DC port that will facilitate more efficient connection of certain classes of
DRERs and DESDs. Acting very much like an energy router, each SST has bi-directional
27
energy flow control capability allowing it to control active and reactive power flow and to
manage the fault currents on both the low voltage and high voltage sides. Its large control
bandwidth provides the plug-and-play feature for distributed resources to rapidly identify and
respond to changes in the system.
With incorporation of the solid-state technology into the distribution transformer, many new
features can be realized through power electronics control and dc bus energy storage [44]
[45].
1) Voltage sag compensation: When the input source voltage drops for a short period, the
SST can compensate for the deficit and maintain constant output voltage. The total
period of compensation, as a function of the amount of energy storage, can be adapted to
the specific need of the customer.
2) Outage compensation: Similar to voltage sag compensation, the SST can provide full
voltage compensation for the period needed by the built-in energy storage.
3) Instantaneous voltage regulation: If the input source voltage fluctuates due to
power system transient or other load effects, the SST will maintain constant output
voltage because it has the energy buffer.
4) Fault isolation: The SST can act as a circuit breaker to isolate the power grid from load
fault and vice versa.
5) Power factor correction (and reactive power compensation): The SST can
maintain a unity power factor within its power rating. The SST can also generate or
absorb reactive power as required by the system.
6) Harmonic isolation: Nonlinear loads produce harmonic-distorted current that tends to
propagate back to the primary side of the transformer. The SST will maintain a clean
input current with a unity power factor.
7) DC output: In addition to the 120/240V AC voltage, the SST has 400V DC output,
which allows easier connection to distributed energies.
8) Metering or advanced distribution automation: The SST has advanced monitoring
capabilities including instantaneous voltage, current, power factor, harmonic
percentage, kWh and fault current or voltage information as well.
9) Environmental benefit: Unlike the conventional liquid immersed transformer, the
solid state transformer is an oil-free transformer and friendly to environment.
28
6. SIMULATION
6.1 Circuit Simulation
Circuit simulation was performed using National Instruments Multisim 12.0. The simulated
design is rated 10KVA with 40A IGBT switches. All components used are easily available
and the circuit can be built by hobbyist methods.
6.1.1 Simulation parameters:
For a complex power electronics design like this the standard SPICE settings leads to slow
response and convergence errors. The following settings were used:
Integration method (in transient tab) was chosen to be ‘Gear”.
6.1.2 System configuration:
 Microsoft Windows 7 64-bit
 8 GB Ram
 Intel Core i5 2520M
29
6.1.3 Schematics: Main
A hierarchal design methodology is used manage complexity. This is a multilevel design in
which each circuit is represented by a box with its terminals.
The main page contains shows the overall system and also has tools for control and
measurements connected to various blocks through on-page connectors.
The four blocks on the top are the H-bridges. The left-most block is operated as the Primary
side rectifier (1 phase, phase controlled). The 2nd
from the left operates as the primary
inverter (1 phase SPWM, 1kHz, 31kHz carrier). The third one is a controlled secondary side
rectifier and here the phase control is necessary to achieve tight voltage regulation. The last
one from the left is the secondary side inverter (1 phase SPWM, 50Hz, 31kHz carrier) and
gives an output of with frequency and phase matching that of the output (or a reference
signal).
To achieve a 1:1 ratio of the overall transformer the transformer ratio of the magnetic
transformer in between was arbitrarily chosen to be 1:2. By using phase control at the
secondary rectifier side, this can be regulated to give out the same Vrms as the input side.
Below the H-Bridges are H-Bridge drivers with provide necessary isolation and driving pulse
30
to the switches and enables the switches to be operated by 5V digital TTL signals.
Like an ordinary transformer, two way power flow can be achieved by simply interchanging
the operating modes of the bridges across the transformer.
For the purpose of simulation a linear transformer is being used, having 100uH leakage
inductance.
6.1.4 Schematics: H-Bridge
H-bridges have identical construction but operating in different ways.
International Rectifier IR4PC40UD2 IGBTs are being used. They feature high speed
switching and internal feedback diodes (not shown in symbol).
6.1.5 Schematics: Bridge Driver
Consider the same bridge circuit:
31
An IGBT is switched on by applying gate pulse Vge on the gate terminal with respect to
emitter. Since the emitters are at 3 different reference levels, isolation is required. This is
provided by bridge driver blocks
The bridge driver contains a Totem-pole driver and Schmitt trigger and an opto-coupler for
each IGBT.
A totem pole driver is a pair of complementary transistors connected in push-pull
32
configuration for driving MOSFETS and IGBTs. It charges and discharges the gate
capacitance of the switch for turning it on or off.
The response of an opto-coupler is slow and noisy at high speeds and therefore a Schmitt
trigger must be used. Also note that 3 isolated 12V DC supplies are used for each bridge.
6.1.6 Schemtics: The Controller
Bridge driver forms an abstraction for the controller such that the transistors can be driven by
TTL 5V signals. The controller has been realized using Opamps and gates for simplicity.
33
There are four controller: two for the primary and secondary rectifiers (at left) and the other
two for the primary and secondary inverters (at right).
6.1.7 Control algorithm: Phase Controlled Rectifiers
A feedback of the AC power to be rectifier is taken from a step down transformer. This
feedback is taken from the input AC supply of the rectifier so that the controller operation is
34
perfectly in sync with the input AC power. A bridge rectifier is then used to convert the sine
wave into pulsed DC
The circuit above converts each sinusoidal pulse into squarewave (not shown) and then into a
sawtooth wave.
This sawtooth wave is compared against a DC reference voltage called Ralpha that
corresponds to a phase angle alpha. 0V Ralpha corresponds to 0 deg phase angle and 5V
Ralpha corresponds to 180 deg phase angle.
35
So if the sawtooth pulse is greater in amplitude than Ralpha at any instant an on-pulse is
generated from the output of the comparator.
Depending on the polarity of the original input AC appropriate IGBT pair is switched on. The
polarity detection is done using a polarity detection circuit which basically consists of a
comparator that compares input AC against a mid-potential made by a resistive voltage
divider between the two lines.
6.1.8 Simulation Results for rectifiers
For Ralpha = 0/5 V and 10 ohm load at output we see the following results:
36
For Ralpha = 1.5/5 V, 10 ohm load:
Ralpha = 3.5/5 V, 10 ohm load:
Ralpha = 3/5 V, 150uF filter, 60 ohm load
37
6.1.9 Control algorithm: SPWM Inverter
The SPWM inverter chosen because of its high frequency harmonics that can be filtered by
lower values of capacitance and inductance. The efficiency of SPWM inverters is also higher
than many other inverter topologies.
38
This also requires a sine wave reference for its operation. This reference usually comes from
an internal source for primary inverter and from external source for secondary inverter. For
secondary inverter it is derived externally in order to synchronize it with either the input AC
power or the grid it might be connected to. So this also acts as a Grid Tied Inverter (GTI).
The important parts of the SPWM controller are:
1) TriWaveGen: A high-frequency triangle wave generator - 31kHz chosen
2) SPWMGen: A comparator with polarity dependent switching logic at output
39
3) Rectifier that converts AC to pulsed DC
The control algorithm is straightforward:
 The pulsed DC (red) derived from AC sine wave is compared against triangle wave
(green)
 If amplitude of pulsed DC > triangle wave and On Pulse (blue) is generated
 Depending on the polarity of the feedback AC appropriate IGBT pairs are turned on.
6.1.10 Simulation Results: Inverter
Output when 340V DC source is used.
31kHz carrier frequency; 1kHz output sine wave frequency; No load
40
31kHz carrier frequency; 1kHz output sine wave frequency; 10Ω load; 100uH filter
6.1.11 Conclusion
Circuit simulation is computationally expensive. Although each unit has been successfully
simulated independently we are unable to simulate the whole system as it takes around 15-20
minutes to complete 1ms of transient simulation and it could take at least a few seconds for
the system to stabilize and deliver an output. However, the unit wise simulation confirms that
the circuit is operational.
This circuit design we have developed allows one to build their own working prototypes and
to optimize their design.
To perform system level simulation a model based simulation approach will be used.
41
6.2 System Simulation
The circuit simulation is computationally expensive and therefore a discreet unit wise
simulation was done in NI Multisim . Therefore we again simulated the circuit in MATLAB
SIMULINK . The advantage with this software is that we are able to assign various functions
to blocks . When simulation is done , Matlab does not consider the non linarites of the
devices of the system but rather concludes the calculation approximating it around the vales
and behavior set for the particular block . This greatly reduces the simulation time and and
also drops the computational load .
6.2.1 Simulation Parameters
For the solid state transformer system level design the standard powergui configuration
settings leads to slow response and convergence errors. The following settings were used:
42
6.2.2 Simulink Model
This is the equivalent Simulink model of the circuit previously simulated. Built in system
blocks in simPower Systems have been used . For the simulation of the rectifier/ inverter ,
universal bridge is used with IGBT/Diodes as the switching elements .For the firing circuits
Discrete PWM generators are placed in the system . For transformation linear transformer is
used with the N1:N2 ratio of 1:2 .The ratio is set so as to compensate the switching loss. In
order to smoothen the waveforms filters have been used after every stage. Values for these
filters have been assigned arbitrarily.
43
6.2.3 Waveforms: Primary
The above waveform shows the output waveform of the primary side rectifier for the input of
50Hz ac supply . This is the output of the first stage of rectification where a a sine wave is
converted to pure dc. The switching is done by using the phase controlled rectification
technique
The above waveform shows the output waveform of the primary side inverter for the input of
44
rippled dc supply .The output is the pulse width modulation inversion of the dc with
frequency in the order of 1KHz having very little distortions. By using the Sinosidal pulse
width modulation technique we are able to get the desired output of high frequency .The
carrier frequency is kept at 31000 Hz with the modulation index of 5e-6
.The Discreate PWM
generator has an interactive GUI in which one can prompt it to generate the reference signal
on its own .
6.2.4 Waveforms: Secondary
The above waveform shows the output waveform of the secondary side rectifier for the input
of 1KHz ac supply. The input is taken from the secondary of the linear transformer which
provides the input of 1 kHz ac supply. For reducing the frequency we again have to rectify it
, and the same mode is used as used in primary .Appropriate changes have been made in the
firing circuit to make the rectifier give a stable response to such a high frequency input
45
The above waveform shows the output waveform of the secondary side inverter for the input
of rippled dc supply .The output is the pulse width modulation inversion of the dc with
frequency in the order of 50Hz having very little distortions. This is the final output of the
system is used against the RL load for demonstration.
6.2.5 Conclusion
After performing the system level simulation in MATLAB SIMULINK it can be inferred that
the solid state transformer system’s response is stable and is operational at system level as
well .The computation load is lighter therefore system response can be analyzed quickly
compared to PSPICE simulation .
Following pages have circuit schematics that were simulated. Several instances of blocks have
been used, however single instance is being shown.
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
A A
B B
C C
D D
E E
F F
G G
H H
I I
J J
AC2
DC_EAC1
DC_C
AU
BU
AL
BL
AC2DC_E
AC1DC_C
AC2
DC_EAC1
DC_C AC2DC_E
AC1DC_C
AU
BU
AL
BL
AU
BU
AL
BL
AU
BU
AL
BL
Bridge_Control_BusBridge_Control_Bus Bridge_Control_Bus
R1Alpha+
R2Alpha+
PRecRefP
PRecRefN
R1Alpha-
R2Alpha-
PInvRef1
PInvRef2
SRecRefP
SRecRefN
SInvRef1
SInvRef2
1:1.5
IN1
IN2
OUT1
OUT2
B1OUT1
B1OUT2
B2IN1
B2IN2
B2OUT1
B2OUT2
B3IN1
B3IN2
B3OUT1
B3OUT2
B4IN1
B4IN2
A B
Ext Trig
+
+
_
_ + _
A B
Ext Trig
+
+
_
_ + _
A B
Ext Trig
+
+
_
_ + _
A B
Ext Trig
+
+
_
_ + _
IN1
IN2
B1OUT1
B1OUT2
B2IN1
B2IN2
B2OUT1
B2OUT2
B3IN1
B3IN2
B3OUT2
B3OUT1
B4IN1
B4IN2
OUT2
OUT1L
250 Vrms
50 Hz
0°
Source
250 Vrms
1kHz
0°
IN1
IN2
B3IN1
B3IN2
IN1
IN2
IN1
IN2
6.25Ω
Load
OUT1L
OUT2
Key=A
1V
Key=A
1V
R1A+
R1A+
R1A-
R2A+
R2A-
R1A-
R2A+
R2A-
Title:
Designed by:
Checked by:
Sheet title:
Date:
Sheet of
Sold State Transformer using H-bridge converters B.Tech Thesis
Prof K S Yadav
Main
5/16/2013
1 58
Desc.:
New Delhi, IN
Northern India Engineering College
Ayush Sagar
External Control, Debugging and Measurements
340 V
B2_Aux
250 Vrms
1kHz
0°
B3_Aux
340 V
B4_Aux
Key=2
Key=3
Key=4
Key=R
B2IN1
B2IN2
B3IN1
B3IN2
B4IN1
B4IN2
6.25Ω
Load
B1OUT1
B1OUT2
Key=R
6.25Ω
Load
B2OUT1
B2OUT2
Key=R
6.25Ω
Load
B3OUT1
B3OUT2
Key=R
B1OUT1
B1OUT2
B3OUT1
B3OUT2
10mF
Key=Space
15µF
Key=Space
100mH
Key = L
OUT1L
OUT1
TOUT1
TOUT2
AB
ExtTrig
+
+
_
_+_
B2IN1
B2IN2
TOUT1
TOUT2
6.25Ω
Load
TOUT1
TOUT2
Key=R
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
AC1 AC2
DC_E
DC_C
AU+ BU+
AL+ BL+
AL- BL-
AU-_BU-
IRGPC40UD2 11kΩ
22kΩ
IGBT USED: IRG40PCUD2
Package TO-247
Circuit Co-Pack
Switching Hard
Switching Speed 8-30 kHz
VCES (V) 600
IC @ 25C (A) 40
IC @ 100C (A) 20
VCE(ON)@25C typ (V) 1.72
VCE(ON)@25C max (V) 2.10
Ets typ (mJ) 1.1
Ets max (mJ) 1.5
Qrr typ nC 25C 80
Qrr max nC 25C 180
Vf typ 1.30
PD @25C (W) 160
AB
ExtTrig
+
+
_
_+_
THB1 THB2
THB3 THB4
THB5
THB6 THB7
THB2
THB5
THB5
THB1
AB
ExtTrig
+
+
_
_+_
THB3
THB6
THB4
THB7
H-Bridge
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
AU+ BU+AL+ BL+
AU-_BU-AL- BL-
TotemPole TotemPole TotemPole TotemPole
12 V 12 V
AU BUAL BL
TIL193 TIL193 TIL193 TIL193
12 V
NOT NOT NOT NOT
430Ω 430Ω
430Ω
430Ω
5V
BC547C
1.0kΩ
4.7kΩ
7.5kΩ
BC547C
1.0kΩ
4.7kΩ
7.5kΩ
BC547C
1.0kΩ
4.7kΩ
7.5kΩ
BC547C
1.0kΩ
4.7kΩ
7.5kΩ
Bridge driver
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
PRAU PRBUPRALPRBL
R1Alpha+
R1Alpha-
R2Alpha+
R2Alpha-
SRAU SRBUSRALSRBL
TriWaveGen
SPWMGen
PIAU
PIBU
PIAL
PIBL
SIAU
SIBU
SIAL
SIBL
PInvRef1
PInvRef2
Rectifier
40:1
1.0µF
R1CTP3
R1CTP3
R1CTP2
R1CTP2
R1CTP1
R1CTP1
ABCD
G
T
R1CTP4
R1CTP4
PRecRefP
PRecRefN
Rectifier
40:1
47nF
R2CTP3
R2CTP3
R2CTP2
R2CTP2
R2CTP1
R2CTP1
ABCD
G
T
R2CTP4
R2CTP4
SRecRefP
SRecRefN
1:75
Rectifier
TriWaveGen
SPWMGen
SInvRef1
SInvRef2
1:75
Rectifier
Controller block
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
Vs+
Vs-
OUTIN
A B
Ext Trig
+
+
_
_ + _
TTP1 TTP2
TTP3
BD139
BD140
100Ω
TTP1
TTP2
TTP3
0.47Ω
Totem pole driver
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
Vs+
IN
OUT
Vs-
A B
Ext Trig
+
+
_
_ + _
TST1 TST2
TST3
BC559AP
BC549BP
10kΩ
390kΩ
1kΩ
4.7kΩ
4.7kΩ
TST3
TST2
TST1
Schmitt trigger schematic
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
1kΩ
47kΩ
100kΩ
150Ω
0.1µF
923Ω
OUT
5V
-5V
31kHz triangle wave generator
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
1.0kΩ
4.7kΩ47kΩ
VSin
VTri
AC_+ve
AU BU AL BL
A B C D
G
T
TSP1
TSP2
TSP3
TSP1
TSP2
TSP3
-5V
5V
SPWM generator schematic
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
IN
OUT
5V
5V
5V
5V
5V
-5V
-5V
10kΩ
10kΩ
1.0kΩ
2N7000
33kΩ
1kΩ
Tcap2Tcap1
Sine to sawtooth wave converter
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
N
P
IS_+VE
5V
1.0kΩ
1.0kΩ
Polarity detector
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
IN1
OUT+
IN2
100kΩ
OUT-
Full bridge rectifier
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
A A
B B
C C
D D
E E
F F
Ramp
VRef
5V
OUT
Comparator for rectifier phase modulation

SST

  • 1.
    The following simulationis an excerpt from bachelor's thesis: REVIEW OF SOLID STATE TRANSFORMERS WITH SIMULATION OF AN IMPLEMENTATION BASED ON CASCADED H-BRIDGE CONVERTERS Authored by Ayush Sagar (ayush@ieee.org), Shiveesh Fotedar, Sumit Joshi
  • 2.
    26 5. THE CASCADEDH-BRIDGE CONVERTER BRIDGE BASED SST Figure 5-1 The proposed 20kVA cascaded H-Bridge multilevel converter based solid state transformer directly interfaces with 12kV distribution voltage level. The solid state transformer consists of a cascaded multilevel AC/DC rectifier, Dual Active Bridge (DAB) converters with high frequency transformers and a DC/AC inverter. The Solid State Transformer (SST) is the interface device between the distribution system and the electricity consumer’s in future smart grid systems. In the electric configuration of the smart grid system shown in Figure 1.12, low voltage (120V), residential class Distributed Renewable Energy Resource (DRER), Distributed Energy Storage Device (DESD), and loads are connected to the distribution bus (12kV) through a solid state transformer. The solid state transformer is used to enable active management of DRER, DESD and loads, rather than a 60Hz conventional transformer. The SST has the features of instantaneous voltage regulation, voltage sag compensation, fault, isolation, power factor correction, harmonic isolation, dc output. The SST has a 400V DC port that will facilitate more efficient connection of certain classes of DRERs and DESDs. Acting very much like an energy router, each SST has bi-directional
  • 3.
    27 energy flow controlcapability allowing it to control active and reactive power flow and to manage the fault currents on both the low voltage and high voltage sides. Its large control bandwidth provides the plug-and-play feature for distributed resources to rapidly identify and respond to changes in the system. With incorporation of the solid-state technology into the distribution transformer, many new features can be realized through power electronics control and dc bus energy storage [44] [45]. 1) Voltage sag compensation: When the input source voltage drops for a short period, the SST can compensate for the deficit and maintain constant output voltage. The total period of compensation, as a function of the amount of energy storage, can be adapted to the specific need of the customer. 2) Outage compensation: Similar to voltage sag compensation, the SST can provide full voltage compensation for the period needed by the built-in energy storage. 3) Instantaneous voltage regulation: If the input source voltage fluctuates due to power system transient or other load effects, the SST will maintain constant output voltage because it has the energy buffer. 4) Fault isolation: The SST can act as a circuit breaker to isolate the power grid from load fault and vice versa. 5) Power factor correction (and reactive power compensation): The SST can maintain a unity power factor within its power rating. The SST can also generate or absorb reactive power as required by the system. 6) Harmonic isolation: Nonlinear loads produce harmonic-distorted current that tends to propagate back to the primary side of the transformer. The SST will maintain a clean input current with a unity power factor. 7) DC output: In addition to the 120/240V AC voltage, the SST has 400V DC output, which allows easier connection to distributed energies. 8) Metering or advanced distribution automation: The SST has advanced monitoring capabilities including instantaneous voltage, current, power factor, harmonic percentage, kWh and fault current or voltage information as well. 9) Environmental benefit: Unlike the conventional liquid immersed transformer, the solid state transformer is an oil-free transformer and friendly to environment.
  • 4.
    28 6. SIMULATION 6.1 CircuitSimulation Circuit simulation was performed using National Instruments Multisim 12.0. The simulated design is rated 10KVA with 40A IGBT switches. All components used are easily available and the circuit can be built by hobbyist methods. 6.1.1 Simulation parameters: For a complex power electronics design like this the standard SPICE settings leads to slow response and convergence errors. The following settings were used: Integration method (in transient tab) was chosen to be ‘Gear”. 6.1.2 System configuration:  Microsoft Windows 7 64-bit  8 GB Ram  Intel Core i5 2520M
  • 5.
    29 6.1.3 Schematics: Main Ahierarchal design methodology is used manage complexity. This is a multilevel design in which each circuit is represented by a box with its terminals. The main page contains shows the overall system and also has tools for control and measurements connected to various blocks through on-page connectors. The four blocks on the top are the H-bridges. The left-most block is operated as the Primary side rectifier (1 phase, phase controlled). The 2nd from the left operates as the primary inverter (1 phase SPWM, 1kHz, 31kHz carrier). The third one is a controlled secondary side rectifier and here the phase control is necessary to achieve tight voltage regulation. The last one from the left is the secondary side inverter (1 phase SPWM, 50Hz, 31kHz carrier) and gives an output of with frequency and phase matching that of the output (or a reference signal). To achieve a 1:1 ratio of the overall transformer the transformer ratio of the magnetic transformer in between was arbitrarily chosen to be 1:2. By using phase control at the secondary rectifier side, this can be regulated to give out the same Vrms as the input side. Below the H-Bridges are H-Bridge drivers with provide necessary isolation and driving pulse
  • 6.
    30 to the switchesand enables the switches to be operated by 5V digital TTL signals. Like an ordinary transformer, two way power flow can be achieved by simply interchanging the operating modes of the bridges across the transformer. For the purpose of simulation a linear transformer is being used, having 100uH leakage inductance. 6.1.4 Schematics: H-Bridge H-bridges have identical construction but operating in different ways. International Rectifier IR4PC40UD2 IGBTs are being used. They feature high speed switching and internal feedback diodes (not shown in symbol). 6.1.5 Schematics: Bridge Driver Consider the same bridge circuit:
  • 7.
    31 An IGBT isswitched on by applying gate pulse Vge on the gate terminal with respect to emitter. Since the emitters are at 3 different reference levels, isolation is required. This is provided by bridge driver blocks The bridge driver contains a Totem-pole driver and Schmitt trigger and an opto-coupler for each IGBT. A totem pole driver is a pair of complementary transistors connected in push-pull
  • 8.
    32 configuration for drivingMOSFETS and IGBTs. It charges and discharges the gate capacitance of the switch for turning it on or off. The response of an opto-coupler is slow and noisy at high speeds and therefore a Schmitt trigger must be used. Also note that 3 isolated 12V DC supplies are used for each bridge. 6.1.6 Schemtics: The Controller Bridge driver forms an abstraction for the controller such that the transistors can be driven by TTL 5V signals. The controller has been realized using Opamps and gates for simplicity.
  • 9.
    33 There are fourcontroller: two for the primary and secondary rectifiers (at left) and the other two for the primary and secondary inverters (at right). 6.1.7 Control algorithm: Phase Controlled Rectifiers A feedback of the AC power to be rectifier is taken from a step down transformer. This feedback is taken from the input AC supply of the rectifier so that the controller operation is
  • 10.
    34 perfectly in syncwith the input AC power. A bridge rectifier is then used to convert the sine wave into pulsed DC The circuit above converts each sinusoidal pulse into squarewave (not shown) and then into a sawtooth wave. This sawtooth wave is compared against a DC reference voltage called Ralpha that corresponds to a phase angle alpha. 0V Ralpha corresponds to 0 deg phase angle and 5V Ralpha corresponds to 180 deg phase angle.
  • 11.
    35 So if thesawtooth pulse is greater in amplitude than Ralpha at any instant an on-pulse is generated from the output of the comparator. Depending on the polarity of the original input AC appropriate IGBT pair is switched on. The polarity detection is done using a polarity detection circuit which basically consists of a comparator that compares input AC against a mid-potential made by a resistive voltage divider between the two lines. 6.1.8 Simulation Results for rectifiers For Ralpha = 0/5 V and 10 ohm load at output we see the following results:
  • 12.
    36 For Ralpha =1.5/5 V, 10 ohm load: Ralpha = 3.5/5 V, 10 ohm load: Ralpha = 3/5 V, 150uF filter, 60 ohm load
  • 13.
    37 6.1.9 Control algorithm:SPWM Inverter The SPWM inverter chosen because of its high frequency harmonics that can be filtered by lower values of capacitance and inductance. The efficiency of SPWM inverters is also higher than many other inverter topologies.
  • 14.
    38 This also requiresa sine wave reference for its operation. This reference usually comes from an internal source for primary inverter and from external source for secondary inverter. For secondary inverter it is derived externally in order to synchronize it with either the input AC power or the grid it might be connected to. So this also acts as a Grid Tied Inverter (GTI). The important parts of the SPWM controller are: 1) TriWaveGen: A high-frequency triangle wave generator - 31kHz chosen 2) SPWMGen: A comparator with polarity dependent switching logic at output
  • 15.
    39 3) Rectifier thatconverts AC to pulsed DC The control algorithm is straightforward:  The pulsed DC (red) derived from AC sine wave is compared against triangle wave (green)  If amplitude of pulsed DC > triangle wave and On Pulse (blue) is generated  Depending on the polarity of the feedback AC appropriate IGBT pairs are turned on. 6.1.10 Simulation Results: Inverter Output when 340V DC source is used. 31kHz carrier frequency; 1kHz output sine wave frequency; No load
  • 16.
    40 31kHz carrier frequency;1kHz output sine wave frequency; 10Ω load; 100uH filter 6.1.11 Conclusion Circuit simulation is computationally expensive. Although each unit has been successfully simulated independently we are unable to simulate the whole system as it takes around 15-20 minutes to complete 1ms of transient simulation and it could take at least a few seconds for the system to stabilize and deliver an output. However, the unit wise simulation confirms that the circuit is operational. This circuit design we have developed allows one to build their own working prototypes and to optimize their design. To perform system level simulation a model based simulation approach will be used.
  • 17.
    41 6.2 System Simulation Thecircuit simulation is computationally expensive and therefore a discreet unit wise simulation was done in NI Multisim . Therefore we again simulated the circuit in MATLAB SIMULINK . The advantage with this software is that we are able to assign various functions to blocks . When simulation is done , Matlab does not consider the non linarites of the devices of the system but rather concludes the calculation approximating it around the vales and behavior set for the particular block . This greatly reduces the simulation time and and also drops the computational load . 6.2.1 Simulation Parameters For the solid state transformer system level design the standard powergui configuration settings leads to slow response and convergence errors. The following settings were used:
  • 18.
    42 6.2.2 Simulink Model Thisis the equivalent Simulink model of the circuit previously simulated. Built in system blocks in simPower Systems have been used . For the simulation of the rectifier/ inverter , universal bridge is used with IGBT/Diodes as the switching elements .For the firing circuits Discrete PWM generators are placed in the system . For transformation linear transformer is used with the N1:N2 ratio of 1:2 .The ratio is set so as to compensate the switching loss. In order to smoothen the waveforms filters have been used after every stage. Values for these filters have been assigned arbitrarily.
  • 19.
    43 6.2.3 Waveforms: Primary Theabove waveform shows the output waveform of the primary side rectifier for the input of 50Hz ac supply . This is the output of the first stage of rectification where a a sine wave is converted to pure dc. The switching is done by using the phase controlled rectification technique The above waveform shows the output waveform of the primary side inverter for the input of
  • 20.
    44 rippled dc supply.The output is the pulse width modulation inversion of the dc with frequency in the order of 1KHz having very little distortions. By using the Sinosidal pulse width modulation technique we are able to get the desired output of high frequency .The carrier frequency is kept at 31000 Hz with the modulation index of 5e-6 .The Discreate PWM generator has an interactive GUI in which one can prompt it to generate the reference signal on its own . 6.2.4 Waveforms: Secondary The above waveform shows the output waveform of the secondary side rectifier for the input of 1KHz ac supply. The input is taken from the secondary of the linear transformer which provides the input of 1 kHz ac supply. For reducing the frequency we again have to rectify it , and the same mode is used as used in primary .Appropriate changes have been made in the firing circuit to make the rectifier give a stable response to such a high frequency input
  • 21.
    45 The above waveformshows the output waveform of the secondary side inverter for the input of rippled dc supply .The output is the pulse width modulation inversion of the dc with frequency in the order of 50Hz having very little distortions. This is the final output of the system is used against the RL load for demonstration. 6.2.5 Conclusion After performing the system level simulation in MATLAB SIMULINK it can be inferred that the solid state transformer system’s response is stable and is operational at system level as well .The computation load is lighter therefore system response can be analyzed quickly compared to PSPICE simulation .
  • 22.
    Following pages havecircuit schematics that were simulated. Several instances of blocks have been used, however single instance is being shown.
  • 23.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 A A B B CC D D E E F F G G H H I I J J AC2 DC_EAC1 DC_C AU BU AL BL AC2DC_E AC1DC_C AC2 DC_EAC1 DC_C AC2DC_E AC1DC_C AU BU AL BL AU BU AL BL AU BU AL BL Bridge_Control_BusBridge_Control_Bus Bridge_Control_Bus R1Alpha+ R2Alpha+ PRecRefP PRecRefN R1Alpha- R2Alpha- PInvRef1 PInvRef2 SRecRefP SRecRefN SInvRef1 SInvRef2 1:1.5 IN1 IN2 OUT1 OUT2 B1OUT1 B1OUT2 B2IN1 B2IN2 B2OUT1 B2OUT2 B3IN1 B3IN2 B3OUT1 B3OUT2 B4IN1 B4IN2 A B Ext Trig + + _ _ + _ A B Ext Trig + + _ _ + _ A B Ext Trig + + _ _ + _ A B Ext Trig + + _ _ + _ IN1 IN2 B1OUT1 B1OUT2 B2IN1 B2IN2 B2OUT1 B2OUT2 B3IN1 B3IN2 B3OUT2 B3OUT1 B4IN1 B4IN2 OUT2 OUT1L 250 Vrms 50 Hz 0° Source 250 Vrms 1kHz 0° IN1 IN2 B3IN1 B3IN2 IN1 IN2 IN1 IN2 6.25Ω Load OUT1L OUT2 Key=A 1V Key=A 1V R1A+ R1A+ R1A- R2A+ R2A- R1A- R2A+ R2A- Title: Designed by: Checked by: Sheet title: Date: Sheet of Sold State Transformer using H-bridge converters B.Tech Thesis Prof K S Yadav Main 5/16/2013 1 58 Desc.: New Delhi, IN Northern India Engineering College Ayush Sagar External Control, Debugging and Measurements 340 V B2_Aux 250 Vrms 1kHz 0° B3_Aux 340 V B4_Aux Key=2 Key=3 Key=4 Key=R B2IN1 B2IN2 B3IN1 B3IN2 B4IN1 B4IN2 6.25Ω Load B1OUT1 B1OUT2 Key=R 6.25Ω Load B2OUT1 B2OUT2 Key=R 6.25Ω Load B3OUT1 B3OUT2 Key=R B1OUT1 B1OUT2 B3OUT1 B3OUT2 10mF Key=Space 15µF Key=Space 100mH Key = L OUT1L OUT1 TOUT1 TOUT2 AB ExtTrig + + _ _+_ B2IN1 B2IN2 TOUT1 TOUT2 6.25Ω Load TOUT1 TOUT2 Key=R
  • 24.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F AC1 AC2 DC_E DC_C AU+ BU+ AL+ BL+ AL- BL- AU-_BU- IRGPC40UD2 11kΩ 22kΩ IGBT USED: IRG40PCUD2 Package TO-247 Circuit Co-Pack Switching Hard Switching Speed 8-30 kHz VCES (V) 600 IC @ 25C (A) 40 IC @ 100C (A) 20 VCE(ON)@25C typ (V) 1.72 VCE(ON)@25C max (V) 2.10 Ets typ (mJ) 1.1 Ets max (mJ) 1.5 Qrr typ nC 25C 80 Qrr max nC 25C 180 Vf typ 1.30 PD @25C (W) 160 AB ExtTrig + + _ _+_ THB1 THB2 THB3 THB4 THB5 THB6 THB7 THB2 THB5 THB5 THB1 AB ExtTrig + + _ _+_ THB3 THB6 THB4 THB7 H-Bridge
  • 25.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F AU+ BU+AL+ BL+ AU-_BU-AL- BL- TotemPole TotemPole TotemPole TotemPole 12 V 12 V AU BUAL BL TIL193 TIL193 TIL193 TIL193 12 V NOT NOT NOT NOT 430Ω 430Ω 430Ω 430Ω 5V BC547C 1.0kΩ 4.7kΩ 7.5kΩ BC547C 1.0kΩ 4.7kΩ 7.5kΩ BC547C 1.0kΩ 4.7kΩ 7.5kΩ BC547C 1.0kΩ 4.7kΩ 7.5kΩ Bridge driver
  • 26.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F PRAU PRBUPRALPRBL R1Alpha+ R1Alpha- R2Alpha+ R2Alpha- SRAU SRBUSRALSRBL TriWaveGen SPWMGen PIAU PIBU PIAL PIBL SIAU SIBU SIAL SIBL PInvRef1 PInvRef2 Rectifier 40:1 1.0µF R1CTP3 R1CTP3 R1CTP2 R1CTP2 R1CTP1 R1CTP1 ABCD G T R1CTP4 R1CTP4 PRecRefP PRecRefN Rectifier 40:1 47nF R2CTP3 R2CTP3 R2CTP2 R2CTP2 R2CTP1 R2CTP1 ABCD G T R2CTP4 R2CTP4 SRecRefP SRecRefN 1:75 Rectifier TriWaveGen SPWMGen SInvRef1 SInvRef2 1:75 Rectifier Controller block
  • 27.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F Vs+ Vs- OUTIN A B Ext Trig + + _ _ + _ TTP1 TTP2 TTP3 BD139 BD140 100Ω TTP1 TTP2 TTP3 0.47Ω Totem pole driver
  • 28.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F Vs+ IN OUT Vs- A B Ext Trig + + _ _ + _ TST1 TST2 TST3 BC559AP BC549BP 10kΩ 390kΩ 1kΩ 4.7kΩ 4.7kΩ TST3 TST2 TST1 Schmitt trigger schematic
  • 29.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F 1kΩ 47kΩ 100kΩ 150Ω 0.1µF 923Ω OUT 5V -5V 31kHz triangle wave generator
  • 30.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F 1.0kΩ 4.7kΩ47kΩ VSin VTri AC_+ve AU BU AL BL A B C D G T TSP1 TSP2 TSP3 TSP1 TSP2 TSP3 -5V 5V SPWM generator schematic
  • 31.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F IN OUT 5V 5V 5V 5V 5V -5V -5V 10kΩ 10kΩ 1.0kΩ 2N7000 33kΩ 1kΩ Tcap2Tcap1 Sine to sawtooth wave converter
  • 32.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F N P IS_+VE 5V 1.0kΩ 1.0kΩ Polarity detector
  • 33.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F IN1 OUT+ IN2 100kΩ OUT- Full bridge rectifier
  • 34.
    0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 A A B B CC D D E E F F Ramp VRef 5V OUT Comparator for rectifier phase modulation