I used these slides last year to introduce RTAI and Earliest Deadline First for the course "Real-Time Operating Systems" (in English), here at University of Bologna. They include an architectural overview of RTAI, some scheduling algorithms including EDF, and instructions to install and use RTAI.
This presentation covers the general concepts about real-time systems, how Linux kernel works for preemption, the latency in Linux, rt-preempt, and Xenomai, the real-time extension as the dual kernel approach.
I used these slides last year to introduce RTAI and Earliest Deadline First for the course "Real-Time Operating Systems" (in English), here at University of Bologna. They include an architectural overview of RTAI, some scheduling algorithms including EDF, and instructions to install and use RTAI.
This presentation covers the general concepts about real-time systems, how Linux kernel works for preemption, the latency in Linux, rt-preempt, and Xenomai, the real-time extension as the dual kernel approach.
Computer Organization1
CS1400
Feng Jiang
Boolean algebra
• Reading 2.5 P57-P65
• Axioms and Theorems
• Theorems required P57 P58 T1- T3
• Could derive T6 T7 T8
• De Morgan’s theorems and T9 T10
Boolean algebra
Boolean algebra
Digital Logic Fundamentals
Z = X+Y Z =
——
Z = Z = X + Y—
—
NOT all variables
Change & to | and | to &
NOT the result
De Morgan's
theorems
X�Y
X�Y
Boolean algebra
Boolean algebra
T8 T3
Duality
P59
• Review
• Boolean algebra
• Exercise Examples (a)-(e) P61
Day 5
Boolean algebra
• Exercise
• P61
• Homework(no submission)
• P98-100 2.1 -2.12, 2.14
Boolean algebra
Boolean algebra
Boolean algebra
Less terms is preferred
Less variables in one term is preferred
“Big not” should be simplified
Boolean algebra
De Morgan’s theorems
Complement
Sum of products <> product of sums
Boolean algebra De Morgan’s theorems
Boolean algebra De Morgan’s theorems
Boolean algebra
De Morgan’s theorems
Complement
Sum of products <> product of sums
• Review
• Boolean algebra
• Exercise Examples (a)-(e) P61
Day 5
• Start
• K-map
• Review Boolean algebra
• (Application of De Morgan’s and Exercise 2 )
• Read
• Applications of combinational logic
Day 6
• Review: Axioms and Theorems, solution manual, link,
reference
• Karnaugh Map
• Review Boolean algebra (Exercise 2)
• (Application of De Morgan’s and Exercise 2 )
• Reading for next class
• Applications of combinational logic
• Multiplexer ? Adder ? Decoder?
Day 6
• A two-dimensional tool of the truth table
• Could be used to simplify Boolean
expressions
• Review “truth table” & “minterm”
• 2^n lines vs. 2^n cells
Karnaugh Map (K-Map)
KarnaughMaps
Karnaugh Maps
Karnaugh Maps, how to plot
By truth table
By Boolean expression
F= A’D+A’BCD+ACD’
Karnaugh Maps, how to plot
Examples:
Karnaugh Maps, how to plot
Examples:
F= B+A’C
F= AB’C +BC
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
Larger group >> less variables in one term
Karnaugh Maps, to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
Larger group >> less variables in one term
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
F=A’B’ + A’BCD+ACD
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
For a four-variable K-map
Karnaugh Maps, to simplify
Map the terms
Group adjacent cells
• Start
• K-map
• Review Boolean algebra (announce quiz2)
• (Application of De Morgan’s and Exercise 2 )
• Read
• Applications of combinational logic
Day 6
Boolean algebra Applications of De Morgan’s theorems
Boolean algebra Ap.
In this course, you
● Identify and apply timing arc information from a library, such as unateness, delays, and slew
● Identify cell delays from a library and calculate output slew degradation
● Use wire-load information to calculate net delays
● Identify the properties of a clock, including period, edges, and slew, and calculate the duty cycle
● Apply setup and hold checks to diagnose design violations
● Identify timing path types to calculate slack values
● Set environmental constraints, clocks constraints, and path exceptions
● Constrain a design using SDC
● Analyze reports to identify timing problems
- Basic overview of transmission line analysis
-How transmission line analysis differs from basic circuit analysis
- How distributed circuit element differs from Lumped elements
-Links to be referred for Smith Chart
Computer Organization1
CS1400
Feng Jiang
Boolean algebra
• Reading 2.5 P57-P65
• Axioms and Theorems
• Theorems required P57 P58 T1- T3
• Could derive T6 T7 T8
• De Morgan’s theorems and T9 T10
Boolean algebra
Boolean algebra
Digital Logic Fundamentals
Z = X+Y Z =
——
Z = Z = X + Y—
—
NOT all variables
Change & to | and | to &
NOT the result
De Morgan's
theorems
X�Y
X�Y
Boolean algebra
Boolean algebra
T8 T3
Duality
P59
• Review
• Boolean algebra
• Exercise Examples (a)-(e) P61
Day 5
Boolean algebra
• Exercise
• P61
• Homework(no submission)
• P98-100 2.1 -2.12, 2.14
Boolean algebra
Boolean algebra
Boolean algebra
Less terms is preferred
Less variables in one term is preferred
“Big not” should be simplified
Boolean algebra
De Morgan’s theorems
Complement
Sum of products <> product of sums
Boolean algebra De Morgan’s theorems
Boolean algebra De Morgan’s theorems
Boolean algebra
De Morgan’s theorems
Complement
Sum of products <> product of sums
• Review
• Boolean algebra
• Exercise Examples (a)-(e) P61
Day 5
• Start
• K-map
• Review Boolean algebra
• (Application of De Morgan’s and Exercise 2 )
• Read
• Applications of combinational logic
Day 6
• Review: Axioms and Theorems, solution manual, link,
reference
• Karnaugh Map
• Review Boolean algebra (Exercise 2)
• (Application of De Morgan’s and Exercise 2 )
• Reading for next class
• Applications of combinational logic
• Multiplexer ? Adder ? Decoder?
Day 6
• A two-dimensional tool of the truth table
• Could be used to simplify Boolean
expressions
• Review “truth table” & “minterm”
• 2^n lines vs. 2^n cells
Karnaugh Map (K-Map)
KarnaughMaps
Karnaugh Maps
Karnaugh Maps, how to plot
By truth table
By Boolean expression
F= A’D+A’BCD+ACD’
Karnaugh Maps, how to plot
Examples:
Karnaugh Maps, how to plot
Examples:
F= B+A’C
F= AB’C +BC
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
Larger group >> less variables in one term
Karnaugh Maps, to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
Larger group >> less variables in one term
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
F=A’B’ + A’BCD+ACD
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
Karnaugh Maps, how to simplify
Map the terms
Group adjacent cells
*NO diagonal adjacent
*torus shaped
For a four-variable K-map
Karnaugh Maps, to simplify
Map the terms
Group adjacent cells
• Start
• K-map
• Review Boolean algebra (announce quiz2)
• (Application of De Morgan’s and Exercise 2 )
• Read
• Applications of combinational logic
Day 6
Boolean algebra Applications of De Morgan’s theorems
Boolean algebra Ap.
In this course, you
● Identify and apply timing arc information from a library, such as unateness, delays, and slew
● Identify cell delays from a library and calculate output slew degradation
● Use wire-load information to calculate net delays
● Identify the properties of a clock, including period, edges, and slew, and calculate the duty cycle
● Apply setup and hold checks to diagnose design violations
● Identify timing path types to calculate slack values
● Set environmental constraints, clocks constraints, and path exceptions
● Constrain a design using SDC
● Analyze reports to identify timing problems
- Basic overview of transmission line analysis
-How transmission line analysis differs from basic circuit analysis
- How distributed circuit element differs from Lumped elements
-Links to be referred for Smith Chart
Instructions for Submissions thorugh G- Classroom.pptxJheel Barad
This presentation provides a briefing on how to upload submissions and documents in Google Classroom. It was prepared as part of an orientation for new Sainik School in-service teacher trainees. As a training officer, my goal is to ensure that you are comfortable and proficient with this essential tool for managing assignments and fostering student engagement.
Welcome to TechSoup New Member Orientation and Q&A (May 2024).pdfTechSoup
In this webinar you will learn how your organization can access TechSoup's wide variety of product discount and donation programs. From hardware to software, we'll give you a tour of the tools available to help your nonprofit with productivity, collaboration, financial management, donor tracking, security, and more.
Model Attribute Check Company Auto PropertyCeline George
In Odoo, the multi-company feature allows you to manage multiple companies within a single Odoo database instance. Each company can have its own configurations while still sharing common resources such as products, customers, and suppliers.
The Roman Empire A Historical Colossus.pdfkaushalkr1407
The Roman Empire, a vast and enduring power, stands as one of history's most remarkable civilizations, leaving an indelible imprint on the world. It emerged from the Roman Republic, transitioning into an imperial powerhouse under the leadership of Augustus Caesar in 27 BCE. This transformation marked the beginning of an era defined by unprecedented territorial expansion, architectural marvels, and profound cultural influence.
The empire's roots lie in the city of Rome, founded, according to legend, by Romulus in 753 BCE. Over centuries, Rome evolved from a small settlement to a formidable republic, characterized by a complex political system with elected officials and checks on power. However, internal strife, class conflicts, and military ambitions paved the way for the end of the Republic. Julius Caesar’s dictatorship and subsequent assassination in 44 BCE created a power vacuum, leading to a civil war. Octavian, later Augustus, emerged victorious, heralding the Roman Empire’s birth.
Under Augustus, the empire experienced the Pax Romana, a 200-year period of relative peace and stability. Augustus reformed the military, established efficient administrative systems, and initiated grand construction projects. The empire's borders expanded, encompassing territories from Britain to Egypt and from Spain to the Euphrates. Roman legions, renowned for their discipline and engineering prowess, secured and maintained these vast territories, building roads, fortifications, and cities that facilitated control and integration.
The Roman Empire’s society was hierarchical, with a rigid class system. At the top were the patricians, wealthy elites who held significant political power. Below them were the plebeians, free citizens with limited political influence, and the vast numbers of slaves who formed the backbone of the economy. The family unit was central, governed by the paterfamilias, the male head who held absolute authority.
Culturally, the Romans were eclectic, absorbing and adapting elements from the civilizations they encountered, particularly the Greeks. Roman art, literature, and philosophy reflected this synthesis, creating a rich cultural tapestry. Latin, the Roman language, became the lingua franca of the Western world, influencing numerous modern languages.
Roman architecture and engineering achievements were monumental. They perfected the arch, vault, and dome, constructing enduring structures like the Colosseum, Pantheon, and aqueducts. These engineering marvels not only showcased Roman ingenuity but also served practical purposes, from public entertainment to water supply.
Operation “Blue Star” is the only event in the history of Independent India where the state went into war with its own people. Even after about 40 years it is not clear if it was culmination of states anger over people of the region, a political game of power or start of dictatorial chapter in the democratic setup.
The people of Punjab felt alienated from main stream due to denial of their just demands during a long democratic struggle since independence. As it happen all over the word, it led to militant struggle with great loss of lives of military, police and civilian personnel. Killing of Indira Gandhi and massacre of innocent Sikhs in Delhi and other India cities was also associated with this movement.
How to Create Map Views in the Odoo 17 ERPCeline George
The map views are useful for providing a geographical representation of data. They allow users to visualize and analyze the data in a more intuitive manner.
Unit 8 - Information and Communication Technology (Paper I).pdfThiyagu K
This slides describes the basic concepts of ICT, basics of Email, Emerging Technology and Digital Initiatives in Education. This presentations aligns with the UGC Paper I syllabus.
29. Independent Set
Short Turing Machine Acceptance
(qa,happy)
Read b and (a,b) is not an edge.
(qa,happy) —> (QUIT)
30. Independent Set
Short Turing Machine Acceptance
(qa,happy)
Read b and (a,b) is not an edge.
(qa,happy) —> (QUIT)
(qa,happy) —> (qa,happy); move right
31. Independent Set
Short Turing Machine Acceptance
(qa,happy)
(qa,happy) —> (QUIT)
(qa,happy) —> (qa,happy); move right
32. Independent Set
Short Turing Machine Acceptance
(qa,happy)
Read an EOF symbol.
(qa,happy) —> (QUIT)
(qa,happy) —> (qa,happy); move right
33. Independent Set
Short Turing Machine Acceptance
(qa,happy)
Read an EOF symbol.
(qa,happy) —> (QUIT)
(qa,happy) —> (qa,happy); move right
(qa,happy) —> (q[move,a],happy); move left
34. Independent Set
Short Turing Machine Acceptance
(qa,happy)
(qa,happy) —> (QUIT)
(qa,happy) —> (qa,happy); move right
(qa,happy) —> (q[move,a],happy); move left
35. Independent Set
Short Turing Machine Acceptance
(qa,happy)
Read a.
(qa,happy) —> (QUIT)
(qa,happy) —> (qa,happy); move right
(qa,happy) —> (q[move,a],happy); move left
36. Independent Set
Short Turing Machine Acceptance
(qa,happy)
Read a.
(qa,happy) —> (QUIT)
(qa,happy) —> (qa,happy); move right
(qa,happy) —> (q[move,a],happy); move left
(q[move,a],happy) —> (q[read],happy); move right
37. Independent Set
Short Turing Machine Acceptance
(qa,happy)
(qa,happy) —> (QUIT)
(qa,happy) —> (qa,happy); move right
(qa,happy) —> (q[move,a],happy); move left
(q[move,a],happy) —> (q[read],happy); move right
38. Independent Set
Short Turing Machine Acceptance
(qa,happy)
(qa,happy) —> (QUIT)
(qa,happy) —> (qa,happy); move right
(qa,happy) —> (q[move,a],happy); move left
(q[move,a],happy) —> (q[read],happy); move right
(q[read],happy) —> (qb,happy); move right
48. Short Turing Machine Acceptance
Encode every configuration as a vertex.
At step i, the head is at j, and the transition is δ.
49. Short Turing Machine Acceptance
Encode every configuration as a vertex.
At step i, the head is at j, and the transition is δ.
At step i, the symbol at j is t, and the head is not at j.
50. [Step 3, Position 1, δ]
[Step 3, Position 2, δ]
[Step 3, Position 3, δ]
51. [Step 3, Position 1, a]
[Step 3, Position 1, b]
[Step 3, Position 2, a]
[Step 3, Position 2, b]
[Step 3, Position 3, a]
[Step 3, Position 3, b]
[Step 3, Position 1, δ]
[Step 3, Position 2, δ]
[Step 3, Position 3, δ]
52. [Step 3, Position 1, a]
[Step 3, Position 1, b]
[Step 3, Position 2, a]
[Step 3, Position 2, b]
[Step 3, Position 3, a]
[Step 3, Position 3, b]
[Step 3, Position 1, δ]
[Step 3, Position 2, δ]
[Step 3, Position 3, δ]
53. [Step 3, Position 1, a]
[Step 3, Position 1, b]
[Step 3, Position 2, a]
[Step 3, Position 2, b]
[Step 3, Position 3, a]
[Step 3, Position 3, b]
[Step 3, Position 1, δ]
[Step 3, Position 2, δ]
[Step 3, Position 3, δ]
54. [Step 3, Position 1, a]
[Step 3, Position 1, b]
[Step 3, Position 2, a]
[Step 3, Position 2, b]
[Step 3, Position 3, a]
[Step 3, Position 3, b]
[Step 3, Position 1, δ]
[Step 3, Position 2, δ]
[Step 3, Position 3, δ]
55. [Step 3, Position 1, a]
[Step 3, Position 1, b]
[Step 3, Position 2, a]
[Step 3, Position 2, b]
[Step 3, Position 3, a]
[Step 3, Position 3, b]
[Step 3, Position 1, δ]
[Step 3, Position 2, δ]
[Step 3, Position 3, δ]
61. Weighted Circuit Satisfiablity
Input
A circuit C, and an integer k.
Is there an assignment setting EXACTLY k variables
to one, that satisfies C?
Question