The document presents a current amplifier based transimpedance amplifier (TIA) design for biosensor applications. It aims to resolve fabrication issues related to using high value feedback resistors typically required in TIAs. The proposed design uses a current amplifier as the input stage to amplify low input currents in the picoamp range up to the nanoamp range. This allows the feedback resistor in the second-stage TIA to be reduced from megaohms or gigohms down to kilohms, simplifying fabrication. The designed current amplifier and TIA implemented in a 90nm CMOS process achieves a transimpedance gain of 800 kΩ with a 5 kHz bandwidth. Input referred current noise is 0.
This document summarizes the design of a sigma-delta analog-to-digital converter (ADC) using operational transconductance amplifiers (OTAs). It first describes the basic architecture of a sigma-delta ADC and the role of the OTA. It then presents the design of a two-stage OTA with sleep insertion and leakage feedback techniques to improve parameters such as gain and power consumption. The design is simulated in 0.18μm CMOS technology with a 1.8V supply. Other blocks of the ADC such as the comparator, 1-bit digital-to-analog converter, and integrator are also described along with simulation results showing improvements in power and performance over earlier designs.
1) The document describes the design and simulation of a linear amplifier that operates in the C band frequency range of 5-6 GHz.
2) A Class A amplifier design approach was used to ensure linearity at higher frequencies. A GaAs FET transistor was selected and biased in its linear region.
3) Input and output matching networks were designed using S-parameter simulations. Multiple transistor stages were cascaded to increase the gain to 30 dB.
4) Simulation results showed a gain of 19.241 dB, S-parameters, stability above 1, and a noise figure of around 3 dB as expected for a low noise pre-amplifier.
This document describes the design of a low frequency filter using an operational transconductance amplifier (OTA). It begins with an introduction explaining that biomedical signals are usually low frequency (10 mHz to 500 Hz) and require low power and portable equipment. OTA filters can meet these needs. It then discusses OTA circuit design principles and how to simulate a resistor using an OTA. The document presents circuits for simulating a positive floating resistor with one or two OTAs. It describes using these OTA resistor simulations to design an OTA-C low pass filter and shows simulation results validating the theoretical cut-off frequencies achieved by varying the bias current.
This document describes the design of a 2.4GHz CMOS power amplifier for wireless communication using a 130nm technology. It begins with an introduction to power amplifiers and their importance in wireless transmitters for amplifying transmitted signals. It then reviews previous work on power amplifier design using different technologies. The document proposes a class-B power amplifier design using a 130nm technology to achieve a gain of more than 15dB. Simulation results show the designed class-B power amplifier meets the frequency response requirement at 2.4GHz with a gain of 67.321dB. The power amplifier is designed to operate with a power supply voltage range of 1.3-3V, making it suitable for battery-powered portable electronics and wireless communication
IRJET - Design and Analysis of a Comparator for ADC in Tanner EDAIRJET Journal
This document describes the design and analysis of comparators for use in flash analog-to-digital converters (ADCs). It discusses several comparator circuit designs including dynamic comparators, latch-track comparators, low voltage comparators, and high-speed comparators. The comparators are simulated in Cadence Virtuoso using a 180nm CMOS technology to compare their power, area, and delay characteristics for optimizing flash ADC design. Key goals in comparator design for flash ADCs include reducing power consumption, area overhead, and increasing conversion speed.
A Review on Wide Bandwidth Low Noise Amplifier for Modern Wireless CommunicationIRJET Journal
This document reviews techniques for designing wide bandwidth low noise amplifiers for modern wireless communication. It discusses several techniques used in recent decades to improve the performance and linearity of low noise amplifiers, including wide range derivative superposition technique, direct-coupled amplifier topology, resistive shunt feedback topology, forward combining technique, and gate-inductive gain-peaking technique. The document also reviews the applications of low noise amplifiers in areas like low noise amplifier, distributed amplifier, broadband mixer, power amplifier and active balunes.
This document describes a proposed low power and high speed voltage sense amplifier circuit. The circuit replaces the back-to-back inverters in a previous design with a dual input single output differential amplifier. This modification improves noise immunity and reduces delay and power consumption. Simulation results show a 24% reduction in delay and 23% reduction in energy usage compared to the previous circuit, while maintaining the same offset voltage. The circuit is designed using a 180nm CMOS process at 1.8V.
The document analyzes operational transconductance amplifiers (OTAs). It discusses the basic properties and uses of OTAs, including as voltage-controlled amplifiers and in first-order and second-order active filters with controllable frequencies. OTAs are well-suited for these applications because they can precisely control parameters like gain or filter frequency over a wide range using an external bias current. The document also examines MOS OTA designs and compares OTA-based filters to traditional op-amp based filters, noting OTAs require fewer components and allow for integrated voltage or current control features.
This document summarizes the design of a sigma-delta analog-to-digital converter (ADC) using operational transconductance amplifiers (OTAs). It first describes the basic architecture of a sigma-delta ADC and the role of the OTA. It then presents the design of a two-stage OTA with sleep insertion and leakage feedback techniques to improve parameters such as gain and power consumption. The design is simulated in 0.18μm CMOS technology with a 1.8V supply. Other blocks of the ADC such as the comparator, 1-bit digital-to-analog converter, and integrator are also described along with simulation results showing improvements in power and performance over earlier designs.
1) The document describes the design and simulation of a linear amplifier that operates in the C band frequency range of 5-6 GHz.
2) A Class A amplifier design approach was used to ensure linearity at higher frequencies. A GaAs FET transistor was selected and biased in its linear region.
3) Input and output matching networks were designed using S-parameter simulations. Multiple transistor stages were cascaded to increase the gain to 30 dB.
4) Simulation results showed a gain of 19.241 dB, S-parameters, stability above 1, and a noise figure of around 3 dB as expected for a low noise pre-amplifier.
This document describes the design of a low frequency filter using an operational transconductance amplifier (OTA). It begins with an introduction explaining that biomedical signals are usually low frequency (10 mHz to 500 Hz) and require low power and portable equipment. OTA filters can meet these needs. It then discusses OTA circuit design principles and how to simulate a resistor using an OTA. The document presents circuits for simulating a positive floating resistor with one or two OTAs. It describes using these OTA resistor simulations to design an OTA-C low pass filter and shows simulation results validating the theoretical cut-off frequencies achieved by varying the bias current.
This document describes the design of a 2.4GHz CMOS power amplifier for wireless communication using a 130nm technology. It begins with an introduction to power amplifiers and their importance in wireless transmitters for amplifying transmitted signals. It then reviews previous work on power amplifier design using different technologies. The document proposes a class-B power amplifier design using a 130nm technology to achieve a gain of more than 15dB. Simulation results show the designed class-B power amplifier meets the frequency response requirement at 2.4GHz with a gain of 67.321dB. The power amplifier is designed to operate with a power supply voltage range of 1.3-3V, making it suitable for battery-powered portable electronics and wireless communication
IRJET - Design and Analysis of a Comparator for ADC in Tanner EDAIRJET Journal
This document describes the design and analysis of comparators for use in flash analog-to-digital converters (ADCs). It discusses several comparator circuit designs including dynamic comparators, latch-track comparators, low voltage comparators, and high-speed comparators. The comparators are simulated in Cadence Virtuoso using a 180nm CMOS technology to compare their power, area, and delay characteristics for optimizing flash ADC design. Key goals in comparator design for flash ADCs include reducing power consumption, area overhead, and increasing conversion speed.
A Review on Wide Bandwidth Low Noise Amplifier for Modern Wireless CommunicationIRJET Journal
This document reviews techniques for designing wide bandwidth low noise amplifiers for modern wireless communication. It discusses several techniques used in recent decades to improve the performance and linearity of low noise amplifiers, including wide range derivative superposition technique, direct-coupled amplifier topology, resistive shunt feedback topology, forward combining technique, and gate-inductive gain-peaking technique. The document also reviews the applications of low noise amplifiers in areas like low noise amplifier, distributed amplifier, broadband mixer, power amplifier and active balunes.
This document describes a proposed low power and high speed voltage sense amplifier circuit. The circuit replaces the back-to-back inverters in a previous design with a dual input single output differential amplifier. This modification improves noise immunity and reduces delay and power consumption. Simulation results show a 24% reduction in delay and 23% reduction in energy usage compared to the previous circuit, while maintaining the same offset voltage. The circuit is designed using a 180nm CMOS process at 1.8V.
The document analyzes operational transconductance amplifiers (OTAs). It discusses the basic properties and uses of OTAs, including as voltage-controlled amplifiers and in first-order and second-order active filters with controllable frequencies. OTAs are well-suited for these applications because they can precisely control parameters like gain or filter frequency over a wide range using an external bias current. The document also examines MOS OTA designs and compares OTA-based filters to traditional op-amp based filters, noting OTAs require fewer components and allow for integrated voltage or current control features.
A Novel Design of a Microstrip Microwave Power Amplifier for DCS Application ...IJECEIAES
This paper presents a 1.80GHz class-A Microwave power amplifier (PA). The proposed power amplifier is designed with single-stage architecture. This power amplifier consists of a bipolar transistor and improved by Collector-Feedback Biasing fed with a single power supply. The aim of this work is to improve the performance of this amplifier by using simple stubs with 50Ω microstrip transmissions lines. The proposed PA is investigated and optimized by utilizing Advanced Design System (ADS) software. The simulation results show that the amplifier achieves a high power gain of 13dB, output power rise up to 21dBm and good impedances matching ;For the input reflection coefficient (S11) is below than - 46.39dB. Regarding the output reflection coefficient (S22) is below than -29.898dB, with an overall size of about 93 x 59mm². By the end; we find that this power amplifier offers an excellent performance for DCS applications.
Design of Low Power & High Speed Comparator with 0.18μm Technology for ADC Ap...IJERA Editor
In Analog to Digital Converter (ADC), high speed comparator influences the overall performance of ADC directly. This paper presents the high speed & low power design of a CMOS comparator. Schematic design of this comparator is fabricated in a 0.18μm UMC Technology with 1.8V power supply and simulated in cadence Virtuoso. Simulation results are presented and it shows that this design can work under high speed of 0.8108 GHz. The design has a low offset voltage, low power dissipation 108.0318μw. In addition we have verified present results with schematic view design and also compared these results with earlier reported work and got improvement in this reported work.
This document reviews the design and performance analysis of low power transceiver circuits in wireless sensor networks. It discusses the key components of transceivers including power amplifiers and mixers. For power amplifiers, CMOS implementations are highlighted as offering advantages over other technologies like lower power dissipation, smaller size, and lower cost. The document also reviews several existing studies on power amplifiers and mixers designed for wireless applications. It proposes a two-stage CMOS power amplifier design and discusses improving power added efficiency while maintaining output power. Overall, the document analyzes the importance of low power transceiver circuits for wireless sensor networks and reviews relevant existing work.
Review on Design and Performance Analysis of Low Power Transceiver Circuit in...iosrjce
IOSR Journal of Electronics and Communication Engineering(IOSR-JECE) is a double blind peer reviewed International Journal that provides rapid publication (within a month) of articles in all areas of electronics and communication engineering and its applications. The journal welcomes publications of high quality papers on theoretical developments and practical applications in electronics and communication engineering. Original research papers, state-of-the-art reviews, and high quality technical notes are invited for publications.
Welcome to International Journal of Engineering Research and Development (IJERD)IJERD Editor
This document provides a tutorial on designing microwave amplifiers using CAD software. It discusses:
1) The key steps in microwave amplifier design including selecting an active device, biasing it, characterizing the device, analyzing stability, and implementing matching networks.
2) Methods for stability analysis including the Rollett K-factor test, source-load circle graphical analysis on the Smith Chart, and evaluating the reflection coefficients Γin and Γout.
3) How CAD tools like AWR's Microwave Office can be used to design microwave amplifiers by simulating the circuit and evaluating performance based on the device specifications and design parameters.
Variable Frequency on Wireless Power Transfer for Pacemaker using Embedded Te...IRJET Journal
This document describes a proposed wireless power transfer system for powering implantable medical devices like pacemakers. It discusses the challenges with using batteries in implants and proposes using inductive coupling between an external coil and implanted coil for contactless power transfer. The system would use a microcontroller to control power transmission frequency and rectifiers to convert the received AC power to DC for use in the implant. Design considerations like coil sizes, capacitors for impedance matching, and efficiency are analyzed. The document outlines the various circuit components that would be needed for the transmitter, receiver, and power regulation components for a wireless power transfer system for medical implants.
Implementation of a High Speed and Power Efficient Reliable Multiplier Using ...iosrjce
The document describes the implementation of a high-speed and power-efficient reliable multiplier using an adaptive hold technique (AHT). It aims to address issues like negative bias temperature instability (NBTI) and positive bias temperature instability (PBTI) that degrade transistor performance over time. The proposed design uses a column-bypassing or row-bypassing multiplier integrated with an AHT circuit and Razor flip-flops. Simulation results show the AHT multipliers offer significantly reduced delay of 47.004ns and 79mW lower power compared to traditional multipliers for 32-bit versions. While area is increased, the design provides reliable operation even with aging effects and minimizes timing violations and performance degradation.
The document describes the implementation of a high-speed and power-efficient reliable multiplier using an adaptive hold technique (AHT). Traditional multipliers experience performance degradation over time due to negative bias temperature instability (NBTI) and positive bias temperature instability (PBTI) effects. The proposed design uses an AHT circuit with a column-bypassing or row-bypassing multiplier, Razor flip-flops, and other components to reduce delays, power consumption, and eliminate timing violations caused by aging effects. Simulation results show the AHT multipliers have significantly lower delay and power compared to traditional array, row-bypassing, and column-bypassing multipliers for both 16-bit and 32-bit designs.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
High Voltage Gain with low Current Stress Interleaved Boost Converter for Pho...Premier Publishers
A novel two stage interleaved boost converter (IBC) is investigated. In the proposed topology the advantages of IBC like current sharing, high voltage gain and less voltage and current stress on the switches are more effective. The stand-alone PV system is installed at a convenient place. The output of battery is given to proposed converter. The prototype hardware is developed without isolation transformer to drive the load about 600W with the use of pulse width modulated integrated circuits (PWM ICs) and the efficiency about 93%.
This document describes the design of a programmable gain linear pulse amplifier based on energy spectrum analysis. It uses a quasi-Gaussian CR-RC-CR shaping circuit structure with non-volatile digital potentiometers and precision operational amplifiers. This allows for multistage gain changes, low temperature drift, good pulse linearity, and stronger anti-jamming ability. The amplifier is used to amplify and filter nuclear detector output signals for analysis in multichannel spectrometers.
The document describes a technique called Local Common Mode Feedback (LCMFB) that can be applied to operational transconductance amplifiers (OTAs) to improve their performance. Applying LCMFB to the conventional OTA structure provides significant increases in gain-bandwidth and slew rate without increasing static power consumption or requiring much additional silicon area. LCMFB works by connecting the gates of the OTA's active load transistors to a common node with matched resistors, forming a feedback loop that enhances the amplifier's characteristics and versatility. The proposed OTA architecture with LCMFB can achieve high slew rates and gain bandwidth needed for wireless applications while keeping low static power, addressing demands for improved performance in battery-powered systems.
This document summarizes a 60 GHz distributed active transformer (DAT) implemented in a 130nm silicon-germanium process that achieves a record output power of 23 dBm (200 mW). Key points:
1) The DAT utilizes stacked coupled wires to achieve a high coupling factor of 0.8 at 60 GHz, enabling efficient power combining and impedance transformation.
2) A two-stage power amplifier combines the power of eight cascode amplifiers using the DAT into a 100 ohm differential load, achieving 13 dB of gain and 6.4% power-added efficiency.
3) The small-area 160x160 micron DAT demonstrates the feasibility of efficient millimeter-wave power combining
IRJET- Modified Cascaded H - Bridge Multilevel Inverter for Household AppliancesIRJET Journal
This document describes a study on a modified cascaded H-bridge multilevel inverter for household appliances. The researchers developed a 9-level single phase inverter using 4 H-bridge cells. They used sinusoidal pulse width modulation to generate switching signals and reduce harmonic distortion. Simulations in MATLAB/Simulink showed the output voltage waveform and total harmonic distortion of 9.12%. A hardware prototype was built and tested to verify the design, demonstrating a 53.9V output voltage with 8.22% total harmonic distortion. The modified topology reduces switching losses and improves output capability compared to other multilevel inverter configurations.
Design of Low Voltage Low Power CMOS OP-AMPIJERA Editor
Operational amplifiers are an integral part of many analog and mixed signal systems. As the demand for mixed
mode integrated circuits increases, the design of analog circuits such as operational amplifiers in CMOS
technology becomes more critical. This paper presents a two stage CMOS operational amplifier, which operates
at ±1.8V power supply using TSMC 0.18um CMOS technology. The OP-AMP designed exhibit unity gain
frequency of 12.6 MHz, and gain of 55.5db with 300uw power dissipation. The gain margin and phase margin
of OP-AMP is 45˚ and 60˚ respectively. Design and simulation has been carried out in P Spice tool.
A 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifierVLSICS Design
This document summarizes the results of simulating a two-stage 130nm RF CMOS power amplifier designed for 2.4GHz applications. The power amplifier was simulated with variations in supply voltage from 1V to 5V and size of the second stage transistor from 150um to 500um. Supply voltage significantly impacted output power, ranging from 10.684dBm to 25.08dBm at 1dB compression point. Transistor size also impacted output power but to a lesser degree, from 15.47dBm to 20.338dBm. Power added efficiency was maximized at intermediate supply voltages and transistor sizes, from 16.65% to 48.46% and 29.085% to 45.439% respectively
International Journal of Engineering Research and DevelopmentIJERD Editor
Electrical, Electronics and Computer Engineering,
Information Engineering and Technology,
Mechanical, Industrial and Manufacturing Engineering,
Automation and Mechatronics Engineering,
Material and Chemical Engineering,
Civil and Architecture Engineering,
Biotechnology and Bio Engineering,
Environmental Engineering,
Petroleum and Mining Engineering,
Marine and Agriculture engineering,
Aerospace Engineering.
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal1
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um
Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software.
And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate
goal for such application is to reach high performance and low cost, and between high performance and
low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and
RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can
transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the
specification requirements of the desired.
Low Power SI Class E Power Amplifier and Rf Switch for Health Careieijjournal1
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software. And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate goal for such application is to reach high performance and low cost, and between high performance and low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the specification requirements of the desired.
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um
Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software.
And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate goal for such application is to reach high performance and low cost, and between high performance and low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and
RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can
transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the specification requirements of the desired.
Because of the rapid growth in technology breakthroughs, including
multimedia and cell phones, Telugu character recognition (TCR) has recently
become a popular study area. It is still necessary to construct automated and
intelligent online TCR models, even if many studies have focused on offline
TCR models. The Telugu character dataset construction and validation using
an Inception and ResNet-based model are presented. The collection of 645
letters in the dataset includes 18 Achus, 38 Hallus, 35 Othulu, 34×16
Guninthamulu, and 10 Ankelu. The proposed technique aims to efficiently
recognize and identify distinctive Telugu characters online. This model's main
pre-processing steps to achieve its goals include normalization, smoothing,
and interpolation. Improved recognition performance can be attained by using
stochastic gradient descent (SGD) to optimize the model's hyperparameters.
Scientific workload execution on a distributed computing platform such as a
cloud environment is time-consuming and expensive. The scientific workload
has task dependencies with different service level agreement (SLA)
prerequisites at different levels. Existing workload scheduling (WS) designs
are not efficient in assuring SLA at the task level. Alongside, induces higher
costs as the majority of scheduling mechanisms reduce either time or energy.
In reducing, cost both energy and makespan must be optimized together for
allocating resources. No prior work has considered optimizing energy and
processing time together in meeting task level SLA requirements. This paper
presents task level energy and performance assurance-workload scheduling
(TLEPA-WS) algorithm for the distributed computing environment. The
TLEPA-WS guarantees energy minimization with the performance
requirement of the parallel application under a distributed computational
environment. Experiment results show a significant reduction in using energy
and makespan; thereby reducing the cost of workload execution in comparison
with various standard workload execution models.
More Related Content
Similar to Pre-current amplifier based transimpedance amplifier for biosensors
A Novel Design of a Microstrip Microwave Power Amplifier for DCS Application ...IJECEIAES
This paper presents a 1.80GHz class-A Microwave power amplifier (PA). The proposed power amplifier is designed with single-stage architecture. This power amplifier consists of a bipolar transistor and improved by Collector-Feedback Biasing fed with a single power supply. The aim of this work is to improve the performance of this amplifier by using simple stubs with 50Ω microstrip transmissions lines. The proposed PA is investigated and optimized by utilizing Advanced Design System (ADS) software. The simulation results show that the amplifier achieves a high power gain of 13dB, output power rise up to 21dBm and good impedances matching ;For the input reflection coefficient (S11) is below than - 46.39dB. Regarding the output reflection coefficient (S22) is below than -29.898dB, with an overall size of about 93 x 59mm². By the end; we find that this power amplifier offers an excellent performance for DCS applications.
Design of Low Power & High Speed Comparator with 0.18μm Technology for ADC Ap...IJERA Editor
In Analog to Digital Converter (ADC), high speed comparator influences the overall performance of ADC directly. This paper presents the high speed & low power design of a CMOS comparator. Schematic design of this comparator is fabricated in a 0.18μm UMC Technology with 1.8V power supply and simulated in cadence Virtuoso. Simulation results are presented and it shows that this design can work under high speed of 0.8108 GHz. The design has a low offset voltage, low power dissipation 108.0318μw. In addition we have verified present results with schematic view design and also compared these results with earlier reported work and got improvement in this reported work.
This document reviews the design and performance analysis of low power transceiver circuits in wireless sensor networks. It discusses the key components of transceivers including power amplifiers and mixers. For power amplifiers, CMOS implementations are highlighted as offering advantages over other technologies like lower power dissipation, smaller size, and lower cost. The document also reviews several existing studies on power amplifiers and mixers designed for wireless applications. It proposes a two-stage CMOS power amplifier design and discusses improving power added efficiency while maintaining output power. Overall, the document analyzes the importance of low power transceiver circuits for wireless sensor networks and reviews relevant existing work.
Review on Design and Performance Analysis of Low Power Transceiver Circuit in...iosrjce
IOSR Journal of Electronics and Communication Engineering(IOSR-JECE) is a double blind peer reviewed International Journal that provides rapid publication (within a month) of articles in all areas of electronics and communication engineering and its applications. The journal welcomes publications of high quality papers on theoretical developments and practical applications in electronics and communication engineering. Original research papers, state-of-the-art reviews, and high quality technical notes are invited for publications.
Welcome to International Journal of Engineering Research and Development (IJERD)IJERD Editor
This document provides a tutorial on designing microwave amplifiers using CAD software. It discusses:
1) The key steps in microwave amplifier design including selecting an active device, biasing it, characterizing the device, analyzing stability, and implementing matching networks.
2) Methods for stability analysis including the Rollett K-factor test, source-load circle graphical analysis on the Smith Chart, and evaluating the reflection coefficients Γin and Γout.
3) How CAD tools like AWR's Microwave Office can be used to design microwave amplifiers by simulating the circuit and evaluating performance based on the device specifications and design parameters.
Variable Frequency on Wireless Power Transfer for Pacemaker using Embedded Te...IRJET Journal
This document describes a proposed wireless power transfer system for powering implantable medical devices like pacemakers. It discusses the challenges with using batteries in implants and proposes using inductive coupling between an external coil and implanted coil for contactless power transfer. The system would use a microcontroller to control power transmission frequency and rectifiers to convert the received AC power to DC for use in the implant. Design considerations like coil sizes, capacitors for impedance matching, and efficiency are analyzed. The document outlines the various circuit components that would be needed for the transmitter, receiver, and power regulation components for a wireless power transfer system for medical implants.
Implementation of a High Speed and Power Efficient Reliable Multiplier Using ...iosrjce
The document describes the implementation of a high-speed and power-efficient reliable multiplier using an adaptive hold technique (AHT). It aims to address issues like negative bias temperature instability (NBTI) and positive bias temperature instability (PBTI) that degrade transistor performance over time. The proposed design uses a column-bypassing or row-bypassing multiplier integrated with an AHT circuit and Razor flip-flops. Simulation results show the AHT multipliers offer significantly reduced delay of 47.004ns and 79mW lower power compared to traditional multipliers for 32-bit versions. While area is increased, the design provides reliable operation even with aging effects and minimizes timing violations and performance degradation.
The document describes the implementation of a high-speed and power-efficient reliable multiplier using an adaptive hold technique (AHT). Traditional multipliers experience performance degradation over time due to negative bias temperature instability (NBTI) and positive bias temperature instability (PBTI) effects. The proposed design uses an AHT circuit with a column-bypassing or row-bypassing multiplier, Razor flip-flops, and other components to reduce delays, power consumption, and eliminate timing violations caused by aging effects. Simulation results show the AHT multipliers have significantly lower delay and power compared to traditional array, row-bypassing, and column-bypassing multipliers for both 16-bit and 32-bit designs.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
High Voltage Gain with low Current Stress Interleaved Boost Converter for Pho...Premier Publishers
A novel two stage interleaved boost converter (IBC) is investigated. In the proposed topology the advantages of IBC like current sharing, high voltage gain and less voltage and current stress on the switches are more effective. The stand-alone PV system is installed at a convenient place. The output of battery is given to proposed converter. The prototype hardware is developed without isolation transformer to drive the load about 600W with the use of pulse width modulated integrated circuits (PWM ICs) and the efficiency about 93%.
This document describes the design of a programmable gain linear pulse amplifier based on energy spectrum analysis. It uses a quasi-Gaussian CR-RC-CR shaping circuit structure with non-volatile digital potentiometers and precision operational amplifiers. This allows for multistage gain changes, low temperature drift, good pulse linearity, and stronger anti-jamming ability. The amplifier is used to amplify and filter nuclear detector output signals for analysis in multichannel spectrometers.
The document describes a technique called Local Common Mode Feedback (LCMFB) that can be applied to operational transconductance amplifiers (OTAs) to improve their performance. Applying LCMFB to the conventional OTA structure provides significant increases in gain-bandwidth and slew rate without increasing static power consumption or requiring much additional silicon area. LCMFB works by connecting the gates of the OTA's active load transistors to a common node with matched resistors, forming a feedback loop that enhances the amplifier's characteristics and versatility. The proposed OTA architecture with LCMFB can achieve high slew rates and gain bandwidth needed for wireless applications while keeping low static power, addressing demands for improved performance in battery-powered systems.
This document summarizes a 60 GHz distributed active transformer (DAT) implemented in a 130nm silicon-germanium process that achieves a record output power of 23 dBm (200 mW). Key points:
1) The DAT utilizes stacked coupled wires to achieve a high coupling factor of 0.8 at 60 GHz, enabling efficient power combining and impedance transformation.
2) A two-stage power amplifier combines the power of eight cascode amplifiers using the DAT into a 100 ohm differential load, achieving 13 dB of gain and 6.4% power-added efficiency.
3) The small-area 160x160 micron DAT demonstrates the feasibility of efficient millimeter-wave power combining
IRJET- Modified Cascaded H - Bridge Multilevel Inverter for Household AppliancesIRJET Journal
This document describes a study on a modified cascaded H-bridge multilevel inverter for household appliances. The researchers developed a 9-level single phase inverter using 4 H-bridge cells. They used sinusoidal pulse width modulation to generate switching signals and reduce harmonic distortion. Simulations in MATLAB/Simulink showed the output voltage waveform and total harmonic distortion of 9.12%. A hardware prototype was built and tested to verify the design, demonstrating a 53.9V output voltage with 8.22% total harmonic distortion. The modified topology reduces switching losses and improves output capability compared to other multilevel inverter configurations.
Design of Low Voltage Low Power CMOS OP-AMPIJERA Editor
Operational amplifiers are an integral part of many analog and mixed signal systems. As the demand for mixed
mode integrated circuits increases, the design of analog circuits such as operational amplifiers in CMOS
technology becomes more critical. This paper presents a two stage CMOS operational amplifier, which operates
at ±1.8V power supply using TSMC 0.18um CMOS technology. The OP-AMP designed exhibit unity gain
frequency of 12.6 MHz, and gain of 55.5db with 300uw power dissipation. The gain margin and phase margin
of OP-AMP is 45˚ and 60˚ respectively. Design and simulation has been carried out in P Spice tool.
A 10 d bm 25 dbm, 0.363 mm2 two stage 130 nm rf cmos power amplifierVLSICS Design
This document summarizes the results of simulating a two-stage 130nm RF CMOS power amplifier designed for 2.4GHz applications. The power amplifier was simulated with variations in supply voltage from 1V to 5V and size of the second stage transistor from 150um to 500um. Supply voltage significantly impacted output power, ranging from 10.684dBm to 25.08dBm at 1dB compression point. Transistor size also impacted output power but to a lesser degree, from 15.47dBm to 20.338dBm. Power added efficiency was maximized at intermediate supply voltages and transistor sizes, from 16.65% to 48.46% and 29.085% to 45.439% respectively
International Journal of Engineering Research and DevelopmentIJERD Editor
Electrical, Electronics and Computer Engineering,
Information Engineering and Technology,
Mechanical, Industrial and Manufacturing Engineering,
Automation and Mechatronics Engineering,
Material and Chemical Engineering,
Civil and Architecture Engineering,
Biotechnology and Bio Engineering,
Environmental Engineering,
Petroleum and Mining Engineering,
Marine and Agriculture engineering,
Aerospace Engineering.
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal1
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um
Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software.
And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate
goal for such application is to reach high performance and low cost, and between high performance and
low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and
RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can
transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the
specification requirements of the desired.
Low Power SI Class E Power Amplifier and Rf Switch for Health Careieijjournal1
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software. And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate goal for such application is to reach high performance and low cost, and between high performance and low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the specification requirements of the desired.
LOW POWER SI CLASS E POWER AMPLIFIER AND RF SWITCH FOR HEALTH CAREieijjournal
This research was to design a 2.4 GHz class E Power Amplifier (PA) for health care, with 0.18um
Semiconductor Manufacturing International Corporation CMOS technology by using Cadence software.
And also RF switch was designed at cadence software with power Jazz 180nm SOI process. The ultimate goal for such application is to reach high performance and low cost, and between high performance and low power consumption design. This paper introduces the design of a 2.4GHz class E power amplifier and
RF switch design. PA consists of cascade stage with negative capacitance. This power amplifier can
transmit 16dBm output power to a 50Ω load. The performance of the power amplifier and switch meet the specification requirements of the desired.
Similar to Pre-current amplifier based transimpedance amplifier for biosensors (20)
Because of the rapid growth in technology breakthroughs, including
multimedia and cell phones, Telugu character recognition (TCR) has recently
become a popular study area. It is still necessary to construct automated and
intelligent online TCR models, even if many studies have focused on offline
TCR models. The Telugu character dataset construction and validation using
an Inception and ResNet-based model are presented. The collection of 645
letters in the dataset includes 18 Achus, 38 Hallus, 35 Othulu, 34×16
Guninthamulu, and 10 Ankelu. The proposed technique aims to efficiently
recognize and identify distinctive Telugu characters online. This model's main
pre-processing steps to achieve its goals include normalization, smoothing,
and interpolation. Improved recognition performance can be attained by using
stochastic gradient descent (SGD) to optimize the model's hyperparameters.
Scientific workload execution on a distributed computing platform such as a
cloud environment is time-consuming and expensive. The scientific workload
has task dependencies with different service level agreement (SLA)
prerequisites at different levels. Existing workload scheduling (WS) designs
are not efficient in assuring SLA at the task level. Alongside, induces higher
costs as the majority of scheduling mechanisms reduce either time or energy.
In reducing, cost both energy and makespan must be optimized together for
allocating resources. No prior work has considered optimizing energy and
processing time together in meeting task level SLA requirements. This paper
presents task level energy and performance assurance-workload scheduling
(TLEPA-WS) algorithm for the distributed computing environment. The
TLEPA-WS guarantees energy minimization with the performance
requirement of the parallel application under a distributed computational
environment. Experiment results show a significant reduction in using energy
and makespan; thereby reducing the cost of workload execution in comparison
with various standard workload execution models.
Investigating human subjects is the goal of predicting human emotions in the
real world scenario. A significant number of psychological effects require
(feelings) to be produced, directly releasing human emotions. The
development of effect theory leads one to believe that one must be aware of
one's sentiments and emotions to forecast one's behavior. The proposed line
of inquiry focuses on developing a reliable model incorporating
neurophysiological data into actual feelings. Any change in emotional affect
will directly elicit a response in the body's physiological systems. This
approach is named after the notion of Gaussian mixture models (GMM). The
statistical reaction following data processing, quantitative findings on emotion
labels, and coincidental responses with training samples all directly impact the
outcomes that are accomplished. In terms of statistical parameters such as
population mean and standard deviation, the suggested method is evaluated
compared to a technique considered to be state-of-the-art. The proposed
system determines an individual's emotional state after a minimum of 6
iterative learning using the Gaussian expectation-maximization (GEM)
statistical model, in which the iterations tend to continue to zero error. Perhaps
each of these improves predictions while simultaneously increasing the
amount of value extracted.
Early diagnosis of cancers is a major requirement for patients and a
complicated job for the oncologist. If it is diagnosed early, it could have made
the patient more likely to live. For a few decades, fuzzy logic emerged as an
emphatic technique in the identification of diseases like different types of
cancers. The recognition of cancer diseases mostly operated with inexactness,
inaccuracy, and vagueness. This paper aims to design the fuzzy expert system
(FES) and its implementation for the detection of prostate cancer. Specifically,
prostate-specific antigen (PSA), prostate volume (PV), age, and percentage
free PSA (%FPSA) are used to determine prostate cancer risk (PCR), while
PCR serves as an output parameter. Mamdani fuzzy inference method is used
to calculate a range of PCR. The system provides a scale of risk of prostate
cancer and clears the path for the oncologist to determine whether their
patients need a biopsy. This system is fast as it requires minimum calculation
and hence comparatively less time which reduces mortality and morbidity and
is more reliable than other economic systems and can be frequently used by
doctors.
The biomedical profession has gained importance due to the rapid and accurate diagnosis of clinical patients using computer-aided diagnosis (CAD) tools.
The diagnosis and treatment of Alzheimer’s disease (AD) using complementary multimodalities can improve the quality of life and mental state of patients.
In this study, we integrated a lightweight custom convolutional neural network
(CNN) model and nature-inspired optimization techniques to enhance the performance, robustness, and stability of progress detection in AD. A multi-modal
fusion database approach was implemented, including positron emission tomography (PET) and magnetic resonance imaging (MRI) datasets, to create a fused
database. We compared the performance of custom and pre-trained deep learning models with and without optimization and found that employing natureinspired algorithms like the particle swarm optimization algorithm (PSO) algorithm significantly improved system performance. The proposed methodology,
which includes a fused multimodality database and optimization strategy, improved performance metrics such as training, validation, test accuracy, precision, and recall. Furthermore, PSO was found to improve the performance of
pre-trained models by 3-5% and custom models by up to 22%. Combining different medical imaging modalities improved the overall model performance by
2-5%. In conclusion, a customized lightweight CNN model and nature-inspired
optimization techniques can significantly enhance progress detection, leading to
better biomedical research and patient care.
Class imbalance is a pervasive issue in the field of disease classification from
medical images. It is necessary to balance out the class distribution while training a model. However, in the case of rare medical diseases, images from affected
patients are much harder to come by compared to images from non-affected
patients, resulting in unwanted class imbalance. Various processes of tackling
class imbalance issues have been explored so far, each having its fair share of
drawbacks. In this research, we propose an outlier detection based image classification technique which can handle even the most extreme case of class imbalance. We have utilized a dataset of malaria parasitized and uninfected cells. An
autoencoder model titled AnoMalNet is trained with only the uninfected cell images at the beginning and then used to classify both the affected and non-affected
cell images by thresholding a loss value. We have achieved an accuracy, precision, recall, and F1 score of 98.49%, 97.07%, 100%, and 98.52% respectively,
performing better than large deep learning models and other published works.
As our proposed approach can provide competitive results without needing the
disease-positive samples during training, it should prove to be useful in binary
disease classification on imbalanced datasets.
Recently, plant identification has become an active trend due to encouraging
results achieved in plant species detection and plant classification fields
among numerous available plants using deep learning methods. Therefore,
plant classification analysis is performed in this work to address the problem
of accurate plant species detection in the presence of multiple leaves together,
flowers, and noise. Thus, a convolutional neural network based deep feature
learning and classification (CNN-DFLC) model is designed to analyze
patterns of plant leaves and perform classification using generated finegrained feature weights. The proposed CNN-DFLC model precisely estimates
which the given image belongs to which plant species. Several layers and
blocks are utilized to design the proposed CNN-DFLC model. Fine-grained
feature weights are obtained using convolutional and pooling layers. The
obtained feature maps in training are utilized to predict labels and model
performance is tested on the Vietnam plant image (VPN-200) dataset. This
dataset consists of a total number of 20,000 images and testing results are
achieved in terms of classification accuracy, precision, recall, and other
performance metrics. The mean classification accuracy obtained using the
proposed CNN-DFLC model is 96.42% considering all 200 classes from the
VPN-200 dataset.
Big data as a service (BDaaS) platform is widely used by various
organizations for handling and processing the high volume of data generated
from different internet of things (IoT) devices. Data generated from these IoT
devices are kept in the form of big data with the help of cloud computing
technology. Researchers are putting efforts into providing a more secure and
protected access environment for the data available on the cloud. In order to
create a safe, distributed, and decentralised environment in the cloud,
blockchain technology has emerged as a useful tool. In this research paper, we
have proposed a system that uses blockchain technology as a tool to regulate
data access that is provided by BDaaS platforms. We are securing the access
policy of data by using a modified form of ciphertext policy-attribute based
encryption (CP-ABE) technique with the help of blockchain technology. For
secure data access in BDaaS, algorithms have been created using a mix of CPABE with blockchain technology. Proposed smart contract algorithms are
implemented using Eclipse 7.0 IDE and the cloud environment has been
simulated on CloudSim tool. Results of key generation time, encryption time,
and decryption time has been calculated and compared with access control
mechanism without blockchain technology.
Internet of things (IoT) has become one of the eminent phenomena in human
life along with its collaboration with wireless sensor networks (WSNs), due
to enormous growth in the domain; there has been a demand to address the
various issues regarding it such as energy consumption, redundancy, and
overhead. Data aggregation (DA) is considered as the basic mechanism to
minimize the energy efficiency and communication overhead; however,
security plays an important role where node security is essential due to the
volatile nature of WSN. Thus, we design and develop proximate node aware
secure data aggregation (PNA-SDA). In the PNA-SDA mechanism, additional
data is used to secure the original data, and further information is shared with
the proximate node; moreover, further security is achieved by updating the
state each time. Moreover, the node that does not have updated information is
considered as the compromised node and discarded. PNA-SDA is evaluated
considering the different parameters like average energy consumption, and
average deceased node; also, comparative analysis is carried out with the
existing model in terms of throughput and correct packet identification.
Drones provide an alternative progression in protection submissions since
they are capable of conducting autonomous seismic investigations. Recent
advancement in unmanned aerial vehicle (UAV) communication is an internet
of a drone combined with 5G networks. Because of the quick utilization of
rapidly progressed registering frameworks besides 5G officialdoms, the
information from the user is consistently refreshed and pooled. Thus, safety
or confidentiality is vital among clients, and a proficient substantiation
methodology utilizing a vigorous sanctuary key. Conventional procedures
ensure a few restrictions however taking care of the assault arrangements in
information transmission over the internet of drones (IOD) environmental
frameworks. A unique hyperelliptical curve (HEC) cryptographically based
validation system is proposed to provide protected data facilities among
drones. The proposed method has been compared with the existing methods
in terms of packet loss rate, computational cost, and delay and thereby
provides better insight into efficient and secure communication. Finally, the
simulation results show that our strategy is efficient in both computation and
communication.
Monitoring behavior, numerous actions, or any such information is considered
as surveillance and is done for information gathering, influencing, managing,
or directing purposes. Citizens employ surveillance to safeguard their
communities. Governments do this for the purposes of intelligence collection,
including espionage, crime prevention, the defense of a method, a person, a
group, or an item; or the investigation of criminal activity. Using an internet
of things (IoT) rover, the area will be secured with better secrecy and
efficiency instead of humans, will provide an additional safety step. In this
paper, there is a discussion about an IoT rover for remote surveillance based
around a Raspberry Pi microprocessor which will be able to monitor a
closed/open space. This rover will allow safer survey operations and would
help to reduce the risks involved with it.
In a world where climate change looms large the spotlight often shines on
greenhouse gases, but the shadow of man-made aerosols should not be
underestimated. These tiny particles play a pivotal role in disrupting Earth's
radiative equilibrium, yet many mysteries surround their influence on various
physical aspects of our planet. The root of these mysteries lies in the limited
data we have on aerosol sources, formation processes, conversion dynamics,
and collection methods. Aerosols, composed of particulate matter (PM),
sulfates, and nitrates, hold significant sway across the hemisphere. Accurate
measurement demands the refinement of in-situ, satellite, and ground-based
techniques. As aerosols interact intricately with the environment, their full
impact remains an enigma. Enter a groundbreaking study in Morocco that
dared to compare an internet of thing (IoT) system with satellite-based
atmospheric models, with a focus on fine particles below 10 and 2.5
micrometers in diameter. The initial results, particularly in regions abundant
with extraction pits, shed light on the IoT system's potential to decode
aerosols' role in the grand narrative of climate change. These findings inspire
hope as we confront the formidable global challenge of climate change.
The use of technology has a significant impact to reduce the consequences of
accidents. Sensors, small components that detect interactions experienced by
various components, play a crucial role in this regard. This study focuses on
how the MPU6050 sensor module can be used to detect the movement of
people who are falling, defined as the inability of the lower body, including
the hips and feet, to support the body effectively. An airbag system is
proposed to reduce the impact of a fall. The data processing method in this
study involves the use of a threshold value to identify falling motion. The
results of the study have identified a threshold value for falling motion,
including an acceleration relative (AR) value of less than or equal to 0.38 g,
an angle slope of more than or equal to 40 degrees, and an angular velocity
of more than or equal to 30 °/s. The airbag system is designed to inflate
faster than the time of impact, with a gas flow rate of 0.04876 m3
/s and an
inflating time of 0.05 s. The overall system has a specificity value of 100%,
a sensitivity of 85%, and an accuracy of 94%.
The fundamental principle of the paper is that the soil moisture sensor obtains
the moisture content level of the soil sample. The water pump is automatically
activated if the moisture content is insufficient, which causes water to flow
into the soil. The water pump is immediately turned off when the moisture
content is high enough. Smart home, smart city, smart transportation, and
smart farming are just a few of the new intelligent ideas that internet of things
(IoT) includes. The goal of this method is to increase productivity and
decrease manual labour among farmers. In this paper, we present a system for
monitoring and regulating water flow that employs a soil moisture sensor to
keep track of soil moisture content as well as the land’s water level to keep
track of and regulate the amount of water supplied to the plant. The device
also includes an automated led lighting system.
In order to provide sensing services to low-powered IoT devices, wireless sensor networks (WSNs) organize specialized transducers into networks. Energy usage is one of the most important design concerns in WSN because it is very hard to replace or recharge the batteries in sensor nodes. For an energy-constrained network, the clustering technique is crucial in preserving battery life. By strategically selecting a cluster head (CH), a network's load can be balanced, resulting in decreased energy usage and extended system life. Although clustering has been predominantly used in the literature, the concept of chain-based clustering has not yet been explored. As a result, in this paper, we employ a chain-based clustering architecture for data dissemination in the network. Furthermore, for CH selection, we employ the coati optimisation algorithm, which was recently proposed and has demonstrated significant improvement over other optimization algorithms. In this method, the parameters considered for selecting the CH are energy, node density, distance, and the network’s average energy. The simulation results show tremendous improvement over the competitive cluster-based routing algorithms in the context of network lifetime, stability period (first node dead), transmission rate, and the network's power reserves.
The construction industry is an industry that is always surrounded by
uncertainties and risks. The industry is always associated with a threatindustry which has a complex, tedious layout and techniques characterized by
unpredictable circumstances. It comprises a variety of human talents and the
coordination of different areas and activities associated with it. In this
competitive era of the construction industry, delays and cost overruns of the
project are often common in every project and the causes of that are also
common. One of the problems which we are trying to cater to is the improper
handling of materials at the construction site. In this paper, we propose
developing a system that is capable of tracking construction material on site
that would benefit the contractor and client for better control over inventory
on-site and to minimize loss of material that occurs due to theft and misplacing
of materials.
Today, health monitoring relies heavily on technological advancements. This
study proposes a low-power wide-area network (LPWAN) based, multinodal
health monitoring system to monitor vital physiological data. The suggested
system consists of two nodes, an indoor node, and an outdoor node, and the
nodes communicate via long range (LoRa) transceivers. Outdoor nodes use an
MPU6050 module, heart rate, oxygen pulse, temperature, and skin resistance
sensors and transmit sensed values to the indoor node. We transferred the data
received by the master node to the cloud using the Adafruit cloud service. The
system can operate with a coverage of 4.5 km, where the optimal distance
between outdoor sensor nodes and the indoor master node is 4 km. To further
predict fall detection, various machine learning classification techniques have
been applied. Upon comparing various classifier techniques, the decision tree
method achieved an accuracy of 0.99864 with a training and testing ratio of
70:30. By developing accurate prediction models, we can identify high-risk
individuals and implement preventative measures to reduce the likelihood of
a fall occurring. Remote monitoring of the health and physical status of elderly
people has proven to be the most beneficial application of this technology.
The effectiveness of adaptive filters are mainly dependent on the design
techniques and the algorithm of adaptation. The most common adaptation
technique used is least mean square (LMS) due its computational simplicity.
The application depends on the adaptive filter configuration used and are well
known for system identification and real time applications. In this work, a
modified delayed μ-law proportionate normalized least mean square
(DMPNLMS) algorithm has been proposed. It is the improvised version of the
µ-law proportionate normalized least mean square (MPNLMS) algorithm.
The algorithm is realized using Ladner-Fischer type of parallel prefix
logarithmic adder to reduce the silicon area. The simulation and
implementation of very large-scale integration (VLSI) architecture are done
using MATLAB, Vivado suite and complementary metal–oxide–
semiconductor (CMOS) 90 nm technology node using Cadence RTL and
Genus Compiler respectively. The DMPNLMS method exhibits a reduction
in mean square error, a higher rate of convergence, and more stability. The
synthesis results demonstrate that it is area and delay effective, making it
practical for applications where a faster operating speed is required.
The increasing demand for faster, robust, and efficient device development of enabling technology to mass production of industrial research in circuit design deals with challenges like size, efficiency, power, and scalability. This paper, presents a design and analysis of low power high speed full adder using negative capacitance field effecting transistors. A comprehensive study is performed with adiabatic logic and reversable logic. The performance of full adder is studied with metal oxide field effect transistor (MOSFET) and negative capacitance field effecting (NCFET). The NCFET based full adder offers a low power and high speed compared with conventional MOSFET. The complete design and analysis are performed using cadence virtuoso. The adiabatic logic offering low delay of 0.023 ns and reversable logic is offering low power of 7.19 mw.
The global agriculture system faces significant challenges in meeting the
growing demand for food production, particularly given projections that the
world's population will reach 70% by 2050. Hydroponic farming is an
increasingly popular technique in this field, offering a promising solution to
these challenges. This paper will present the improvement of the current
traditional hydroponic method by providing a system that can be used to
monitor and control the important element in order to help the plant grow up
smoothly. This proposed system is quite efficient and user-friendly that can
be used by anyone. This is a combination of a traditional hydroponic system,
an automatic control system and a smartphone. The primary objective is to
develop a smart system capable of monitoring and controlling potential
hydrogen (pH) levels, a key factor that affects hydroponic plant growth.
Ultimately, this paper offers an alternative approach to address the challenges
of the existing agricultural system and promote the production of clean,
disease-free, and healthy food for a better future.
More from International Journal of Reconfigurable and Embedded Systems (20)
Applications of artificial Intelligence in Mechanical Engineering.pdfAtif Razi
Historically, mechanical engineering has relied heavily on human expertise and empirical methods to solve complex problems. With the introduction of computer-aided design (CAD) and finite element analysis (FEA), the field took its first steps towards digitization. These tools allowed engineers to simulate and analyze mechanical systems with greater accuracy and efficiency. However, the sheer volume of data generated by modern engineering systems and the increasing complexity of these systems have necessitated more advanced analytical tools, paving the way for AI.
AI offers the capability to process vast amounts of data, identify patterns, and make predictions with a level of speed and accuracy unattainable by traditional methods. This has profound implications for mechanical engineering, enabling more efficient design processes, predictive maintenance strategies, and optimized manufacturing operations. AI-driven tools can learn from historical data, adapt to new information, and continuously improve their performance, making them invaluable in tackling the multifaceted challenges of modern mechanical engineering.
Introduction- e - waste – definition - sources of e-waste– hazardous substances in e-waste - effects of e-waste on environment and human health- need for e-waste management– e-waste handling rules - waste minimization techniques for managing e-waste – recycling of e-waste - disposal treatment methods of e- waste – mechanism of extraction of precious metal from leaching solution-global Scenario of E-waste – E-waste in India- case studies.
Rainfall intensity duration frequency curve statistical analysis and modeling...bijceesjournal
Using data from 41 years in Patna’ India’ the study’s goal is to analyze the trends of how often it rains on a weekly, seasonal, and annual basis (1981−2020). First, utilizing the intensity-duration-frequency (IDF) curve and the relationship by statistically analyzing rainfall’ the historical rainfall data set for Patna’ India’ during a 41 year period (1981−2020), was evaluated for its quality. Changes in the hydrologic cycle as a result of increased greenhouse gas emissions are expected to induce variations in the intensity, length, and frequency of precipitation events. One strategy to lessen vulnerability is to quantify probable changes and adapt to them. Techniques such as log-normal, normal, and Gumbel are used (EV-I). Distributions were created with durations of 1, 2, 3, 6, and 24 h and return times of 2, 5, 10, 25, and 100 years. There were also mathematical correlations discovered between rainfall and recurrence interval.
Findings: Based on findings, the Gumbel approach produced the highest intensity values, whereas the other approaches produced values that were close to each other. The data indicates that 461.9 mm of rain fell during the monsoon season’s 301st week. However, it was found that the 29th week had the greatest average rainfall, 92.6 mm. With 952.6 mm on average, the monsoon season saw the highest rainfall. Calculations revealed that the yearly rainfall averaged 1171.1 mm. Using Weibull’s method, the study was subsequently expanded to examine rainfall distribution at different recurrence intervals of 2, 5, 10, and 25 years. Rainfall and recurrence interval mathematical correlations were also developed. Further regression analysis revealed that short wave irrigation, wind direction, wind speed, pressure, relative humidity, and temperature all had a substantial influence on rainfall.
Originality and value: The results of the rainfall IDF curves can provide useful information to policymakers in making appropriate decisions in managing and minimizing floods in the study area.
Software Engineering and Project Management - Introduction, Modeling Concepts...Prakhyath Rai
Introduction, Modeling Concepts and Class Modeling: What is Object orientation? What is OO development? OO Themes; Evidence for usefulness of OO development; OO modeling history. Modeling
as Design technique: Modeling, abstraction, The Three models. Class Modeling: Object and Class Concept, Link and associations concepts, Generalization and Inheritance, A sample class model, Navigation of class models, and UML diagrams
Building the Analysis Models: Requirement Analysis, Analysis Model Approaches, Data modeling Concepts, Object Oriented Analysis, Scenario-Based Modeling, Flow-Oriented Modeling, class Based Modeling, Creating a Behavioral Model.
Batteries -Introduction – Types of Batteries – discharging and charging of battery - characteristics of battery –battery rating- various tests on battery- – Primary battery: silver button cell- Secondary battery :Ni-Cd battery-modern battery: lithium ion battery-maintenance of batteries-choices of batteries for electric vehicle applications.
Fuel Cells: Introduction- importance and classification of fuel cells - description, principle, components, applications of fuel cells: H2-O2 fuel cell, alkaline fuel cell, molten carbonate fuel cell and direct methanol fuel cells.
Pre-current amplifier based transimpedance amplifier for biosensors
1. International Journal of Reconfigurable and Embedded Systems (IJRES)
Vol. 11, No. 2, July 2022, pp. 188~195
ISSN: 2089-4864, DOI: 10.11591/ijres.v11.i2.pp188-195 188
Journal homepage: http://ijres.iaescore.com
Pre-current amplifier based transimpedance amplifier for
biosensors
Jyoti M. Roogi1
, Manju Devi2
1
Department of Electronics and Communication Engineering, CMR Institute of Technology Bengaluru, Bengaluru, India
2
Department of Electronics and Communication Engineering, The Oxford College of Engineering, Bengaluru, India
Article Info ABSTRACT
Article history:
Received Jan 3, 2022
Revised Feb 25, 2022
Accepted Mar 12, 2022
In this paper, we present current amplifier based transimpedance amplifier
(TIA) for biosensor applications. Proposed design has low-noise, high
Transimpedance gain that can be used for low current measurement
applications. The current amplifier based TIA is implemented in order to
resolve the fabrication issues related to high value feedback resistor. In this
design, the input block to TIA is a low amplitude current amplifier. The
designed amplifier is implemented in 90 nm complementary metal-oxide
semiconductor (CMOS) technology. The design achieves transimpedance
gain of 800 kΩ with a bandwidth of 5 kHz and input referred current noise is
of 0.152 pA/√𝐻𝑍 for an input of 41 nA bypassed from current amplifier with
input of 200 pA.
Keywords:
Current amplifier
Fabrication
Noise
Resistor
Transimpedance amplifier This is an open access article under the CC BY-SA license.
Corresponding Author:
Jyoti M. Roogi
Department of Electronics and Communication Engineering, CMR Institute of Technology
Sri Nivasa Reddy Layout, AECS Layout, Marathahalli, Bengaluru, Karnataka 560037, India
Email: jyotimr@gmail.com
1. INTRODUCTION
In the field of biosensor and optical communication low current measurement is one of the
important block as instrumentation system or readout circuit is concerned. For any biosensor or optical
photonic readout circuit measuring low current and processing for further usage is one of the complex task.
Apart from sensor field TIA can be used in the design of optoelectronics devices. In order to perform this
step a sensitive and fast current measurement device is used i.e., transimpedance amplifier (TIA). Designing
a TIA with constraints like low noise, low power and high transimpedance gain found to be complex. metal-
oxide semiconductor (CMOS) TIA is preferred because of CMOS advantages with respect to scaling and
performance parametrs. For implementation TIA two configurations called open and closed loop are
followed. Open loop TIA uses common gate configuration for low input impedance and in this configuration
noise is more. In the case of closed loop configuration feedback which includes shunt-shunt configuration is
followed.
Usually in closed loop TIA feedback resistor is used for conversion of low current input from sensor
or photodiode to equivalent voltage. In open loop configuration input referred noise is high because of this
reason open loop TIAs are not suited for the design of front ends. For higher gain common source amplifier,
cascade amplifier or a CMOS inverter are used.
TIA design procedure mainly involves design of amplifier with feedback resistor. The resistor plays
a very important role in converting current to voltage. TIA topologies has been introduced and analyzed by
authors with respect to design and topologies. Various TIA topologies have appeared in including various
fields and also many domains which make the choice of the best TIA topology, but for a certain application is
2. Int J Reconfigurable & Embedded Syst ISSN: 2089-4864
Pre-current amplifier based transimpedance amplifier for biosensors (Jyoti M. Roogi)
189
a challenging task. TIA topologies analyzed with respect to parameters like transimpedance gain, noise,
power and even feedback resistor value. Different topologies are followed in order to design and analyze
Transimpedance amplifier. There are different TIA topologies are designed and their characteristics are
studied and compared [1]. TIA design challenge is measuring low current in the order of pA to nA. Many
TIA design shown by Authors have closed loop with feedback high value resistor value. Feedback resistor
design plays a very important role with respect to parameters like noise, transimpedance gain and Bandwidth.
For noise reduction high value resistor is implemented in design but issues related to high value resistor is
fabrication of resistor. To resolve the issue related to feed back resistor authors showed different fabrication
techniques like using pseudo resistor, OTA in the feedback and also active feedback resistor [2]-[3].
Passive components can be used in the low current measurements in shunt or feedback configuration
with respect to an active amplifier. For large current sensing Inductors also used for measurement but with
biosensor inductors are not practically used. In this paper we propose new current amplifier based TIA where
first stage of TIA is current amplifier and second stage we can employ differrent TIA topologies. Current
amplifier is used to amplify current with amplitude from pA to nA. In the proposed design for feed back
resistor fabrication more significance is given. For low input amplitude current to reduce feedback resistor
value current amplifier is employed. Some authors presented pixel-level current readout circuit and new
group-cluster architecture to address the circuit challenges in high-performance biosensor arrays, and also
some authors presented current mirror based, switched capacitor based, resistive feedback TIA, OTA as
feedback resistor in TIA feedback path [4]-[10]. The literature contains numerous examples of CMOS
electrochemical current readout circuits for multi-channel measurement [11]-[15], including a recent review.
Transimpedance gain is one of the parameter which specify the amplitude of current being measured with
limitations [16]-[18] very few authors presented current amplifier based TIA that is efficient in reducing
feedback resistance value. One of the technique current amplifiers with different transistor aspect ratio can be
used as current amplifier but it is required to match size of transistor in order to mirror proper value of
current. There some current amplifier design which doesn’t follow the aspect ratio [19]-[21] which is
efficient design to overcome issues related to mismatch transistor size. Main aim of TIA design is to provide
a optimized circuit with the requirement of bandwidth and also low input impedance. Along with required
bandwidth and input impedance it’s also important to obtain high gain and low input noise. In order to get
noise as low as possible different TIA topologies are initiated by many designers. TIA design involves
current mirrors for biasing and also implementation of amplifiers [22]-[26]. In the bio sensing application
TIA design is reffered to obtain required optimized parameters open loop configuration is not suited, so
closed loop configuration with feedback path is used and also it provides better performance with respect to
gain, bandwidth and noise [27]. This configuration also gives better stability to the system.
2. TRANSIMPEDANCE AMPLIFIER
Figure 1 shows simple shunt feedback of Transimpedance amplifier. As we can see resistor is used
in the feedback path, which plays very important role in converting low amplitude current to voltage.
Researchers developed different TIA topologies, one of the main challenges in designing TIA is the feedback
resistor which is used to convert low amplitude current into voltage. As per the literature survey resistor
value is in the range of Mega ohm to Giga ohm as it’s used to convert very low amplitude of nA to pA
current to voltage. If the input current is in the range of PA to nA definitely feedback resistor range will be
high in the range of GΩ, to fabricate this high value resistor in very-large-scale integration (VLSI) is
difficult. Many authors shows even how to implement high value resistor using pseudo resistors and using
operational transconductance amplifier (OTA) in feedback path. Reducing resistor value without
compromising noise and gain with respect input is great challenge in TIA design and analysis.
Figure 1. Block diagram of resistive feedback TIA
3. ISSN: 2089-4864
Int J Reconfigurable & Embedded Syst, Vol. 11, No. 2, July 2022: 188-195
190
Very less authors showed design and analysis of current amplifier based TIA. Using current
amplifier in the design of TIA feedback resistance value can be optimized. In this paper current amplifier
based TIA is presented and analyzed. Same design can be used in different applications like sensor,
communication, optoelectronics and also photonics field where data is in terms of light. Data which is
coming from photodiode can be measured using TIA. Basic current amplifier is current mirror with different
aspect ratio so that current input from different source like sensor or photodiode can be converted into
voltage and also amplified. There are various current mirror designs are used in the design of voltage and
current amplifiers. As TIA is mainly used in order to measure current from photodiode also high precision
instrumentation systems that measure physical properties often include a TIA.
Figure 2 shows inverter cascade based TIA, it is extended version of Inverter based TIA. In this
configuration two transistors are introduced positive-MOS (PM2) and negative-MOS (NM2). Because of
these two transistors gain and gain bandwidth product (GBW) is enhanced. Gain of TIA is illustrated in (1)
and (2). Gain dependence on gm of tranistor NM1 and PM1. Equation (3) illustrates ouput resistance.
𝐴𝑇𝐼𝐴 = −𝐺𝑚 ∗ 𝑅𝑜𝑢𝑡 (1)
out
mPM
mNM
TIA R
g
g
A )
( 1
1 +
= (2)
𝑅𝑜𝑢𝑡 = (𝑔𝑚𝑁𝑀2 + 1/𝑟𝑜𝑃𝑀2 + 1/𝑟𝑜𝑃𝑀2)𝑟𝑜𝑁𝑀1𝑟𝑜𝑁𝑀2||(𝑔𝑚𝑃𝑀2 + 1/𝑟𝑜𝑃𝑀1 +
1/𝑟0𝑃𝑀2)𝑟𝑜𝑃𝑀1𝑟𝑜𝑃𝑀2 (3)
The noise current equation for above mentioned TIA is given in (4). Noise equation has 4 terms,
first term describes the input noise contribution due to Rfb i.e., feedback resistor. Second term is due to
transistors MNM1 and MPM1.Third term and fourth term are contribution to MNM2 and MPM2 respectively.
𝐼2
𝑖𝑛 = 4𝐾𝐵𝑇[(𝐺𝑚
2
+ 2𝜋𝑓𝐶𝑝𝑑)2
/(1 − 𝐺𝑚𝑅𝑓𝑏)2
]𝑅𝑓𝑏 + [(1 + 2𝜋𝑓𝐶𝑝𝑑𝑅𝑓𝑏)2
/(1 − 𝐺𝑚𝑅𝑓𝑏)](𝑔𝑚𝑁𝑀𝛾𝑁𝑀1 + 𝑔𝑚𝑃𝑀1𝛾𝑝) +
[(1 + 2𝜋𝑓𝐶𝑝𝑑𝑅𝑓𝑏)2
/(1 − 𝐺𝑚𝑅𝑓𝑏)(𝑔𝑚𝑁𝑀2 + 1/𝑟𝑜𝑁𝑀2)𝑟𝑜𝑁𝑀1] + [(1 + 2𝜋𝑓𝐶𝑝𝑑𝑅𝑓𝑏)2
/(1 − 𝐺𝑚𝑅𝑓𝑏)(𝑔𝑚𝑁𝑀2 + 1/𝑟𝑜𝑁𝑀2)𝑟𝑜𝑁𝑀1] (4)
Noise equation has 4 terms; first term describes the input noise contribution due to Rfb i.e.,
feedback resistor. Second term is due to transistors MNM1 and MPM1.Third term and fourth term are
contribution to MNM2 and MPM2 respectively.
Figure 2. Inverter cascade based TIA
If we consider (4) and first term dominates at low frequencies then noise related to Rfb will be
more. If we want to reduce noise at low frequencies that some biomedical application which handles low
4. Int J Reconfigurable & Embedded Syst ISSN: 2089-4864
Pre-current amplifier based transimpedance amplifier for biosensors (Jyoti M. Roogi)
191
frequencies definitely Rfb must be low. If it is required to measure low current in the range of pA-nA
definitely Rfb will in the range of GΩ. As the feedback resistor value increases noise also increases and also
high value resistor implementation in VLSI is difficult. To overcome this difficulty and reduce the value of
Rfb current amplifier based TIA is best suited as shown in Figure 3.
Figure 3. Current amplifier based TIA
Main reason behind using current amplifier based TIA is to amplify low amplitude current and
applied to TIA in order to convert it to voltage. For the conversion of current to voltage using TIA feedback
resistor is used. If input current amplitude is low definitely feedback resistance value will be in the range of
MΩ to GΩ. As we know fabrication of high value resistance is difficult.
Figure 4 shows test bench diagram of current amplifier based TIA where first block is current
amplifier and second block is Inverter cascade based TIA. If we apply low amplitude current directly to TIA
if we measure feedback resistance value will be in terms MΩ if input current range in µA. So fabricating MΩ
resistor in VLSI is difficult so if we pre amplify the current and convert it to voltage with feedback resistance
value is less than MΩ.
As the feedback resistance value is decreasing definitely noise will be more as per (4). Using
optimized noise reduction techniques design can be validated with low noise with low feedback resistance.
Based on the Input current to the TIA noise calculation can be done. In the proposed TIA design slight
increase in noise as it compared with existing one, using optimal fabrication techniques the KΩ feedback
resistor can be fabricated for the input in the range of nA.
Figure 4. Schematic of low amplitude current amplifier
5. ISSN: 2089-4864
Int J Reconfigurable & Embedded Syst, Vol. 11, No. 2, July 2022: 188-195
192
3. RESULTS AND DISCUSSION
Transimpedance amplifier is simulated in Cadence using 90 nm technology with different design
parameters like input current, different feedback resistor values and also with current signal frequency.
Figure 5 and Figure 6 shows transient analysis of current amplifier based TIA with 10 MΩ and 1 MΩ
resistor. Input current applied is in the range of 200 pA and amplified using current amplifier with the output
of 41 nA. Figure 7 show similar transient analysis of for Rfb values around 800 kΩ.
Figure 8 shows noise analysis of Transimpedance amplifier, for 200 pA input current with current
amplifier as input stage to TIA noise value is optimal. Figure 9 shows schematic diagram of current amplifier
based Transimpedance amplifier schematic. Table 1 depicts the comparison parameters of proposed design
with existing one, if we analyze with respect to feedback resistor value, if we use current amplifier based TIA
definitely resistor value is reduced but slight rise in noise as compared to other authors designs. As the input
of TIA is in the range of nA after amplifying from current amplifier the required resistance value in kΩ
range. From GΩ the resistor value is reduced from kΩ, its takes lower fabrication processing steps as
compared to fabrication of high resistor value in the range of GΩ. This method definitely useful if we
consider design with lower resistor value for low amplitude current conversion to voltage. Current amplifier
based TIA is best suited for bio sensing application if we consider the fabrication process steps.
Figure 5. Transient analysis of TIA with Rfb of 10 MΩ
Figure 6. Transient analysis of TIA with Rfb of 1 MΩ
6. Int J Reconfigurable & Embedded Syst ISSN: 2089-4864
Pre-current amplifier based transimpedance amplifier for biosensors (Jyoti M. Roogi)
193
Figure 7. Transient analysis of TIA with Rfb of 800 kΩ
Figure 8. Input referred noise of current amplifier based TIA
Figure 9. Schematic of current amplifier based TIA
7. ISSN: 2089-4864
Int J Reconfigurable & Embedded Syst, Vol. 11, No. 2, July 2022: 188-195
194
Table 1. Comparison of design parameters
Sl.no. Mulberry et al. [2] Romanova and Barzdenas [3] Li et al. [4]
Proposed TIA design (CA
based INV CAS TIA)
Application technology 180 nm 180 nm 180 nm 90 nm
Input current 200 nA 150 nA 200 pA 200 pA
Current amplifier output --- -- --- 41 nA
Bandwidth 5 MHz ---- 180 MHz 5 kHz
Transimpedance gain 6 MΩ 1 MΩ 1.72 GΩ 800K Ω
Supply voltage in V 1.2 1.2 1.4 1.2
Input referred noise 3.2 pA/√𝐻𝑧 3.2 pA/√𝐻𝑧 18 fA/√𝐻𝑧 493 pA/√𝐻𝑧
4. CONCLUSION
In this paper we implemented current amplifier based Transimpedance Amplifier for low current
measurement Biosensor applications. Mainly in this paper feedback resistor value is considered as one of the
important parameter for fabrication, so current amplifier based TIA is designed and achieved high
transimpedance gain 800 kΩ with respect to amplified current from sensor with 1.2 V in 90 nm CMOS
technology. Input referred current noise found to be 0.159 pA/√𝐻𝑧 and bandwidth of 5 kHz.
REFERENCES
[1] A. Atef, M. Atef, E. E. M. Khaled and M. Abbas, "CMOS transimpedance amplifiers for biomedical applications: a comparative
study," in IEEE Circuits and Systems Magazine, vol. 20, no. 1, pp. 12-31, Firstquarter 2020, doi: 10.1109/MCAS.2019.2961724.
[2] G. Mulberry, K. A. White and B. N. Kim, "Analysis of simple half-shared transimpedance amplifier for picoampere biosensor
measurements," in IEEE Transactions on Biomedical Circuits and Systems, vol. 13, no. 2, pp. 387-395, April 2019, doi:
10.1109/TBCAS.2019.2897287.
[3] A. Romanova and V. Barzdenas, "A review of modern CMOS transimpedance amplifiers for OTDR," Electronics, vol. 8, no. 10,
p. 1073, 2019 doi: 10.3390/electronics8101073.
[4] H. Li, S. Parsnejad, E. Ashoori, C. Thompson, E. K. Purcell and A. J. Mason, "Ultracompact microwatt CMOS current readout
with picoampere noise and kilohertz bandwidth for biosensor arrays," in IEEE Transactions on Biomedical Circuits and Systems,
vol. 12, no. 1, pp. 35-46, Feb. 2018, doi: 10.1109/TBCAS.2017.2752742.
[5] S. Zohoori, M. Dolatshahi, M. Pourahmadi, and M. Hajisafari, "A CMOS, low-power current-mirror-based transimpedance
amplifier for 10 Gbps optical communications," Microelectronics Journal, vol. 80, pp. 18–27, 2018, doi:
10.1016/j.mejo.2018.08.001.
[6] S. Ray and M. M. Hella, "A 53 dB Ω 7 -GHz inductorless transimpedance amplifier and a 1-THz+ GBP limiting amplifier in
0.13- μ m CMOS," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 8, pp. 2365-2377, Aug. 2018,
doi: 10.1109/TCSI.2017.2788799.
[7] K. Puttananjegowda and S. Thomas, "A low-power low-noise multi-stage transimpedance amplifier for amperometric based blood
glucose monitoring systems," Analog Integrated Circuits and Signal Processing, vol. 102, pp. 659-666, 2020, doi:
10.1007/s10470-020-01600-5.
[8] M. M. R. Ibrahim and P. M. Levine, "CMOS transimpedance amplifier for biosensor signal acquisition," 2014 IEEE International
Symposium on Circuits and Systems (ISCAS), 2014, pp. 25-28, doi: 10.1109/ISCAS.2014.6865056.
[9] D. Kim, B. Goldstein, W. Tang, F. J. Sigworth and E. Culurciello, "Noise analysis and performance comparison of low current
measurement systems for biomedical applications," in IEEE Transactions on Biomedical Circuits and Systems, vol. 7, no. 1, pp.
52-62, Feb. 2013, doi: 10.1109/TBCAS.2012.2192273.
[10] J. H. Chuah and D. Holburn, “Design of low-noise CMOS transimpedance amplifier,” Microelectronics International, vol. 30 ,
no. 3, pp. 115–124, 2013, doi: 10.1108/MI-11-2012-0080.
[11] B. Goldstein, D. Kim, J. Xu, T. K. Vanderlick and E. Culurciello, "CMOS low current measurement system for biomedical
applications," in IEEE Transactions on Biomedical Circuits and Systems, vol. 6, no. 2, pp. 111-119, April 2012, doi:
10.1109/TBCAS.2011.2182512.
[12] M. M. R. Ibrahim and P. M. Levine, "CMOS transimpedance amplifier for biosensor signal acquisition," 2014 IEEE International
Symposium on Circuits and Systems (ISCAS), 2014, pp. 25-28, doi: 10.1109/ISCAS.2014.6865056.
[13] M. Kubo, H. Yotsuda, T. Kosaka and N. Nakano, "A design of transimpedance amplifier using OTA as a feedback resistor for
patch-clamp measurement system," 2015 International Symposium on Intelligent Signal Processing and Communication Systems
(ISPACS), 2015, pp. 307-311, doi: 10.1109/ISPACS.2015.7432786.
[14] J. Hu, Y. Kim and J. Ayers, "A low power 100MΩ CMOS front-end transimpedance amplifier for biosensing applications," 2010
53rd IEEE International Midwest Symposium on Circuits and Systems, 2010, pp. 541-544, doi:
10.1109/MWSCAS.2010.5548884.
[15] L. R. Cenkeramaddi, T. Singh and T. Ytterdal, "Inverter-based 1V transimpedance amplifier in 90nm CMOS for medical
ultrasound imaging," 2009 NORCHIP, 2009, pp. 1-4, doi: 10.1109/NORCHP.2009.5397856.
[16] E. Kamrani, A. Chaddad, F. Lesage and M. Sawan, "Integrated transimpedance amplifiers dedicated to low-noise and low-power
biomedical applications," 2013 29th Southern Biomedical Engineering Conference, 2013, pp. 5-6, doi: 10.1109/SBEC.2013.11.
[17] D. Kim, B. Goldstein, W. Tang, F. J. Sigworth and E. Culurciello, "Noise analysis and performance comparison of low current
measurement systems for biomedical applications," in IEEE Transactions on Biomedical Circuits and Systems, vol. 7, no. 1, pp.
52-62, Feb. 2013, doi: 10.1109/TBCAS.2012.2192273.
8. Int J Reconfigurable & Embedded Syst ISSN: 2089-4864
Pre-current amplifier based transimpedance amplifier for biosensors (Jyoti M. Roogi)
195
[18] E. Säckinger, "The transimpedance limit," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 57, no. 8, pp.
1848-1856, Aug. 2010, doi: 10.1109/TCSI.2009.2037847.
[19] Chunyan Wang, M. O. Ahmad and M. N. S. Swamy, "A CMOS current amplifier for very weak current operations," Proceedings
of the 28th European Solid-State Circuits Conference, 2002, pp. 751-754.
[20] L. Zhang, Z. Yu and X. He, "Design and Verification of Ultra Low Current Mode Amplifier Aiming at Biosensor Applications,"
2007 14th IEEE International Conference on Electronics, Circuits and Systems, 2007, pp. 1304-1307, doi:
10.1109/ICECS.2007.4511237.
[21] Y. -S. Sung, W. -M. Chen and C. -Y. Wu, "The design of 8-channel CMOS area-efficient low-power current-mode analog front-
end amplifier for EEG signal recording," 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, pp. 530-
533, doi: 10.1109/ISCAS.2016.7527294
[22] R. J. Baker, CMOS circuit design, layout and simulation, 3rd Ed. New York: Wiley, 2010.
[23] A. S. Sedra, and K. C. Smith, Microelectronic circuits, New York: Oxford D University Press, 2004.
[24] P. R. Gray, Analysis and design of analog integrated circuits, New York: Wiley, 2009.
[25] P. E. Allen and D. R. Holberg, CMOS analog circuit design, Oxford University Press, 2002.
[26] C. Tzschoppe, U. Jörges, A. Richter, B. Lindner and F. Ellinger, "Theory and design of advanced CMOS current mirrors," 2015
SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC), 2015, pp. 1-5, doi:
10.1109/IMOC.2015.7369125.
[27] E. Monahan, "CMOS transimpedance amplifier ECG 720 advanced analog ic design," 2017. [Online]. Available:
http://cmosedu.com/jbaker/students/eric/CMOS_TIA.pdf.
BIOGRAPHIES OF AUTHORS
Jyoti M. Roogi graduated from Gulbarga University for BE degree, M.Tech from
Visvesvaraya Technological University (VTU), Karnataka and she is pursving PhD from
Visvesvaraya Technological University (VTU). She is working as assistant professor in the
ECE Department at CMRIT college Bangalore. She has 13 year teaching and 2 year research
experience. She has many publications in national and international journal and also
conferences. Her area of interest are VLSI design, Machine learning in VLSI design, and also
sensors. She can be contacted at: jyotimr@gmail.com.
Manju Devi graduated from Anna University for B. E (ECE) degree in 1996 , M.
Tech degree in Applied Electronics from BMSCE, and Ph, D from Visvesvaraya
Technological University (VTU), Karnataka.She is working as a Professor and Head in the
ECE department at The Oxford College of Engineering Bangalore. In addition, she has worked
as Vice-Principal and Professor at BTLIT, Bangalore. She has almost twenty-two years of
academic teaching experience and worked for both NBA and NAAC. She has more than 98
publications in international conferences and journals. She is guiding eight students from
Visvesvaraya Technological University (VTU), Karnataka. Her areas of interest are VLSI
design, Analog and Mixed-mode VLSI design, and Digital Electronics. She can be contacted
at: manju3devi@gmail.com.