2. IEEE
Proof
W
eb
Version
2 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
II. MILLIMETER-WAVE DAT
DATs, as described in [1], use two single-turn planar slab
inductors at 2.4 GHz to form a transformer where the primary
inductor is broken up into four quarter sections to facilitate
the connection of four synchronized push–pull amplifiers.
Each synchronized push–pull amplifier couples magnetically
to the same single turn primary inductor in such a way that
their alternating magnetic fluxes add constructively to form a
uniform circular current in the secondary winding. Since each
amplifier on the primary side utilizes only one quarter of the
primary inductor length, and not its full length, the impedance
transformation ratio is (1 : 4) instead of known
for a regular four-turn transformer.
Scaling the DAT topology from 2.4 GHz to millimeter-wave
frequencies imposes a series of challenges. Coplanar trans-
formers are typically used only at lower frequencies where
low coupling factors, substrate and skin effect losses, and
inaccuracies caused by model to hardware discrepancies can
be tolerated [2]. Monolithic on-chip transformers have been
widely used for matching and power-combining purposes in the
past up to a few tens of gigahertz, where the tuned circuits used
for matching have been formed by the transformer primary
inductances and additional capacitors to achieve the band-
width and efficiency required [20]. Commonly used on-chip
transformers are either made of inter-wound spiral inductors
or coplanar coupled wires (slab inductors) to promote mutual
magnetic coupling. In order to operate any transformer in the
millimeter-wave frequency range, its primary inductance has to
be reduced substantially, which, in turn, requires the values of
additional tuning capacitors to be extremely small. Therefore,
it is crucial to have a transformer or DAT structure that allows
accurate modeling and the prediction of parasitic effects. The
most important design challenges for millimeter-wave DATs
are: 1) the DAT requires well synchronized push–pull ampli-
fiers under all operating conditions to maintain the correct load
line impedance for each amplifier; 2) tuning of the DAT for
low loss and high efficiency requires accurate compact EM
modeling, as well as accurate parasitic extraction techniques;
and 3) nonidealities of the transformer such as its inter-winding
capacitance limit the scaling to higher frequencies and requires
optimized 1 : 1 transformer structures.
In the following, various design aspects of the DAT are de-
scribed. This includes a description of the transformer unit cell,
the DAT circuit architecture, a description of the input power
distribution network, the corner amplifier circuits, the compact
EM transformer modeling, the principle of active terminations,
the tuning of the DAT, parasitic effects at millimeter waves, as
well as scaling of the transformer to higher frequencies.
A. Transformer Unit Cell
Stacked transformers have an improved coupling factor on
silicon substrates than coplanar transformers. They can be ef-
fectively shielded from the lossy substrate with perpendicular
ground wires. Such wires do not allow longitudinal currents and,
therefore, do not change the inductance matrix and resulting
magnetic coupling [21], [22]. Stacked transformers can be used
for on-chip impedance transformation, power combining, RF
filters, and single-ended to differential conversion [23], [24].
Fig. 1. (a) Transformer cross section is shown with its primary and secondary
conductor above a ground shield. (b) 3-D view of the transformer from which
the ground shields perpendicular slots and side shields can be seen.
The transformer stack-up used in this paper is shown in
Fig. 1(a). The transformer is arranged in a “sandwich-like”
structure where the primary inductor is stacked vertically
above the secondary inductor. Both wires are located above
a ground shield and achieve a coupling factor of .
Fig. 1(b) shows a 3-D view of the transformer, which uses
a ground shield with perpendicular slots. To improve the
ability to predict the structures parasitic effects, side bars have
been added, which act as a well-defined return path, and a
closed environment EM condition for compact modeling at
millimeter-wave frequencies. Such modeling is scalable by
length and insensitive to close-by metal structures that may
be present dependent on the application and circuit layout,
an important feature that makes it a parametrized cell that
can be used in more complex DAT structures. Eight of these
identical unit cell transformers make up the full DAT structure,
as will be shown in Section II-B. The primary conductor uses
the 4- m-thick aluminum top metal layer (AM), whereas the
secondary conductor is on the 1.25- m-thick second aluminum
layer (LY). The ground shield with its slots orthogonal to wave
propagation and side bars collinear to wave propagation are on
a 0.5- m-thick copper layer (MQ). The transformer template
provides an extremely compact and optimized structure for
millimeter-wave operation. For example, its quality factor
for a 80- m-long transformer at 60 GHz is 32.
B. DAT Circuit Architecture
Fig. 2 shows a 3-D conceptual drawing of the DAT trans-
former structure. The simplified figure only shows the metal
shapes on the first three metal layers and omits the four dif-
ferential push–pull amplifiers in the corners for better clarity.
The DAT uses the thick top-level metal for the primary winding
and the second-level metal for the secondary winding. The dc
supply current for the push–pull amplifiers is supplied via a con-
nection in the center of the structure. A large via field in the
center connects a lower level 4-V power plane to ac grounds
in the center of the primary inductors on the top-level metal.
Note that the primary side is more susceptible to electromigra-
tion than the secondary side of the transformer since their pri-
mary inductor carries the amplifiers’ dc current in addition to its
primary RF current. The top-level metal is three times as thick
3. IEEE
Proof
W
eb
Version
PFEIFFER AND GOREN: 23-dBm 60-GHz DAT IN SILICON PROCESS TECHNOLOGY 3
Fig. 2. Conceptual 3-D drawing of the DAT physical structure.
as the second-level metal and is, therefore, the layer of choice
for the primary side, although the amplifiers’ signals have to go
all the way up through the metal stack to connect to the primary
inductors.
The millimeter-wave transformer requires its primary induc-
tance to be small to operate the DAT efficiently at millimeter-
wave frequencies. Its size is, therefore, only 160 160 m (see
Section II-G for the transformer tuning). Generally speaking, a
small transformer has some negative mutual magnetic coupling
between opposite sides of a wire loop since not all of the mag-
netic flux can pass entirely through the center of the structure.
This is primarily a problem in other, e.g., coplanar and trans-
former structures, since it makes the 3-D EM modeling depen-
dent on the diameter and shape (square or circular) of a trans-
former. As a result, one has to perform iterative 3-D EM simu-
lations to optimize the DAT geometry.
Unlike the coplanar DAT described in [1], [2], [25], and [26],
the millimeter-wave DAT transformer in this paper maximizes
the mutual magnetic coupling and simultaneously minimizes
the negative mutual induction to a point where it can be ne-
glected. The electrical performance of the DAT transformer
structure can, therefore, simply be modeled by the stacked
transformer templates described in Section II-A. A simplified
schematic of the DAT is shown in Fig. 3. Eight transformer
templates can be connected in series on the secondary winding
to form a single secondary turn. On the primary side, two
of them are connected to a 4-V supply (ac-ground) in the
center and the push–pull amplifiers at the opposite ends. The
ground shield with the slots orthogonal to wave propagation
and the side bars collinear to wave propagation are adapted
to accommodate the corners of the structure. The structure
maintains its closed environment EM condition, which relaxes
the parasitic effects and boundary conditions. The magnetic
flux is localized around the two wires so that only a small
amount of flux passes through the inner portion of the ring.
This provides the ability to use 2-D compact modeling, which
is scalable by length and independent of the proximity of other
structures in the layout (see Section II-E for EM modeling
of the transformer template). The transformer templates are
decoupled from each other, which allows them to be treated as
independent building blocks. This is specifically an important
feature at millimeter-wave frequencies where prior art coupled
line transformers require 3-D EM simulations for each circular
geometry.
Fig. 3. Schematic of the DAT showing eight transformer templates and the
four differential push–pull amplifiers. A pre-driver followed by six inter-leaved
Wilkinson power splitters is used to create the phase matched inputs with alter-
nating polarity (not shown).
The differential input signal to the four synchronized
push–pull amplifiers is pre-amplified by a pre-driver fol-
lowed by six inter-leaved Wilkinson power splitters (see
Section II-C for more details). The impedance transforma-
tion ratio for an ideal DAT is , which
ideally creates a load line impedance for each amplifier of
. At millimeter-wave frequencies, the DAT,
however, is far from being ideal, which requires the reactive
part of the transformer to be tuned for an optimum load line and
coupling efficiency (see Sections II-G and H for more details).
C. Input Power Distribution Network
The input power distribution network is shown in Fig. 4. Six
equal-split Wilkinson power dividers (three for each polariza-
tion) are used to split the power from a differential driver am-
plifier in quarters. The network layout is inter-leaved to create
four signals with alternating phases. Additional wire segments
are inserted to ensure an equal wire length of 2.3 mm.
Each equal-split Wilkinson power divider is made of 77-
quarter-wave side-shielded transmission lines with a 100-
[Au. Pls. define NS.] NS resistor (npn sub-collector
diffusion resistor). All other interconnects use side-shielded mi-
crostrips with a 50- characteristic impedance. Side-shielded
microstrip transmission lines have been used throughout the
design to avoid any crosstalk in on-chip interconnects. The
total loss of the network is approximately 5 dB, where each
divider has approximately 2-dB insertion loss. Despite their
length and associated losses, on-chip Wilkinson power di-
viders are favorable at the input of the transformer since they
provide a good port isolation, which decouples the inputs of
the corner amplifiers from each other for better DAT stability.
Although their loss and large size can be tolerated at the input
to the DAT, they are rather inadequate for an efficient output
power-combining network and cannot be considered for a DAT
replacement. Apparently, the input splitter area is 400 times
larger than the 160 160 m output transformer and clearly
4. IEEE
Proof
W
eb
Version
4 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
Fig. 4. Input power distribution network. Six inter-leaved Wilkinson power di-
viders are used to create the alternating phases for the corner amplifiers. The
signal path for the north–east amplifier (PA4) is highlighted here with the di-
vider sections in black and additional interconnects in gray.
Fig. 5. Circuit schematic of the four identical push–pull corner amplifier. Only
two of the four amplifiers (PA1 and PA2) require an additional tuning capacitor
C .
shows the attractiveness of the tiny millimeter-wave DAT for
power-combining purposes.
D. Corner-Amplifier Circuit
The corner amplifiers are made of four identical differential
PAs, one in each corner of the DAT transformer. Each PA uses a
single-stage push–pull amplifier topology where the differential
output is connected to the ends of adjacent primary windings. A
simplified amplifier schematic is shown in Fig. 5. The single-
stage amplifier uses two cascode gain stages in a differential
mode to provide high power gain and high output voltage swing.
Note that, in a DAT topology, it is merely a matter of definition
which cascode stage forms a differential amplifier (see [1] and
[2]). Due to their close proximity to one another, it is beneficial
for the design of the input matching network to consider the
two corner cascode stages as being a differential amplifier as
opposed to the spatially separated amplifiers that span across
the length of the primary inductor.
The base of the common-base (CB) output devices (T1 and
T2) are directly connected together to provide an ac ground
at the base ( V). This minimizes impact ionization
and, thus, maximizes the breakdown voltage of the output de-
vice [27], [28]. The ac ground provides zero external base re-
sistance at RF and the voltage swing is not limited by .
This allows the output voltage to swing 2.5 V around the 4-V
dc supply voltage without causing the device to break down. A
low impedance at the base is also important to ensure stable op-
eration of the amplifier. A compact layout with minimized para-
sitics is, therefore, important and any residual inductance at the
base was minimized to improve the stability of the amplifier.
Note that, in a balanced configuration without an ac ground, a
low impedance at the CB base is difficult to achieve since many
bypass capacitors are needed to handle the large base current
swing. Such base decoupling is well beyond self-resonance at
millimeter-wave frequencies and can cause stability problems.
A single inductor with an ac ground is connected across the
base from T3 to T4 to supply the bias voltage for the ampli-
fier. The length of the input bias inductor can be smaller than a
quarter-wave RF choke since its reactance can be tuned with the
input parasitics of the device and the input matching network to
form a real 100- differential input impedance for maximum
power transfer.
E. Compact EM Modeling
The transformer model used for circuit simulations is imple-
mented in a filter resistive capacitive inductive (RLC) network
plus dependent sources. This physical model takes the skin
and proximity effects between the three transformer conduc-
tors up to the third harmonic of the fundamental frequency
(180 GHz) into account. Compared to other approaches [29],
such modeling enhances its frequency range up to a point where
it can be used to simulate nonlinear effects in millimeter-wave
amplifier designs. The silicon substrate induced losses and
added frequency dependence is being effectively canceled by
the shielding effect of the perpendicular wires of the bottom
ground shield. The model is designed to describe the trans-
former operation in all its operation modes, namely, it does not
assume in advance that the transformer is being matched to a
given input and output impedance. This allows for the correct
tuning and matching of the transformer using the model inside a
circuit level simulation. The model has been tuned and verified
using a 3-D EM solver [30].
For illustrative purposes, it is, however, easier to create an
equivalent-circuit model similar to the one shown in Fig. 6.
Although this model was not used as part of the design process,
it is shown here to illustrate the nonidealities of a trans-
former including its distributed parasitic capacitance like the
inter-winding capacitance and the parasitic capacitance
to the ground shield.
The equivalent transformer circuit model assumes an ideal
transformer with a coupling factor of and a
primary inductance . The nonidealities are modeled with
a stray inductance of , where is the total primary
inductance of the transformer. For an 80- m-long section,
5. IEEE
Proof
W
eb
Version
PFEIFFER AND GOREN: 23-dBm 60-GHz DAT IN SILICON PROCESS TECHNOLOGY 5
Fig. 6. Equivalent transformer model used for illustrative purposes only. A dis-
tributed filter RLC network plus dependent sources was used instead for circuit
simulations. Additional matching elements (L and C ) can be used on the pri-
mary side that add some level of tuning of the otherwise fixed 1 : 4 impedance
transformation ration (not used in this paper’s PA).
is 43.87 pH with fF and fF. At 60 GHz,
the differential output impedance of a differential amplifier can
be modeled by a parasitic capacitance of fF. For ad-
ditional information on the modeling and design of SiGe HBTs
PAs operating at millimeter-wave frequencies, see [7].
F. Active Push–Pull Amplifier Termination
In this paper, the term active termination is used to under-
line that a DAT does not resistively terminate each individual
push–pull amplifier. Unlike resistors with a fixed impedance
of , the impedance provided by the DAT depends on its
impedance transformation ratio, which requires a synchronous
operation of the push–pull amplifiers. The push–pull amplifiers
need to couple synchronously to the primary inductor to add
the induced currents (e.g., magnetic fluxes) constructively. If
the amplifiers are out of phase or have an amplitude imbal-
ance, the circular current in the secondary winding will not have
its maximum and cause a change of the load line impedance
by , where are the com-
plex secondary currents induced from each push–pull amplifier
and is the push–pull amplifier output voltage. As such, the
load-line impedance seen by each amplifier may change if the
other amplifies go out of phase or change their output voltage
or current swings. Strictly speaking, the impedance seen by one
amplifier could change from to an open or even be negative
depending on how the secondary currents add up. Therefore,
under all operating conditions, the amplifiers should maintain
their relative phase, voltage, and current swings to maintain the
1 : 4 impedance transformation ratio. This is a challenging task
at millimeter-wave frequencies and across various power levels
and process variations, as we will see in Section II-H. A change
in load impedance will cause nonlinear effects or stability prob-
lems if the push–pull amplifiers are not unconditionally stable
(see also Section II-J for more details).
Interestingly to note, the neighbor push–pull amplifier load
the other amplifiers through the transformer with their output
impedances. They act like Thévenin voltage sources with
being the internal voltage source impedance. The amplifier’s
output impedance, therefore, should be rather small to avoid
a further degradation of the impedance transformation ratio.
Strictly speaking, the impedance transformation ratio is only
, where is dominated by the output capac-
itance ( ) of the differential push–pull amplifiers. We will see
Fig. 7. Illustration of the active termination mechanism of the DAT. (a) Col-
lective operation of the four push–pull amplifiers where the alternating primary
currents add constructively. (b) Transformation ration of the same transformer
where three of the four push–pull amplifiers add destructively.
in the following Section II-G that the output capacitance ( )
can be tuned with the primary inductance of the transformer
to generate a real load impedance.
Fig. 7 illustrates the active termination mechanism. Fig. 7(a)
shows the ideal case where the secondary induced currents add
constructively with a load-line impedance of .
Fig. 7(b) shows a case where three of the four amplifiers are
either switched off or add destructively to generate a load-line
impedance of only. In the case where the other three
amplifiers operate in antiphase with respect to the investigated
amplifier, the load impedance is negative (not
shown). In other words, only the synchronous operation of the
push–pull amplifiers makes them act like a single source with an
internal impedance of . The impedance seen at the output
port of the DAT, therefore, is , with an output return loss
( ) that is four times larger than a single push–pull amplifier
would have.
G. Impedance Tuning of the DAT
The equivalent-circuit model for the transformer has previ-
ously been shown in Fig. 6. It models the nonidealities of the
transformer for with a stray inductance of
on the primary side of an ideal transformer. The purpose
of tuning the DAT is to remove the total primary inductance
while resonating it with an additional tuning capacitor. This will
make the transformer look like an ideal transformer.
Unlike the DAT described in [1] and [2], the millimeter-wave
DAT in this paper does not require additional tuning caps to
achieve this resonance. The size of the millimeter-wave trans-
former has been adapted such that its primary inductance is
large enough to resonate with the parasitics of the transistor
amplifiers directly. While at low frequencies the corner am-
plifiers output impedance is primarily resistive, at millimeter-
wave frequencies, it is dominated by its parasitic capacitance
( ). No additional capacitors are thus required and the scal-
able transformer model described in Section II-E was used to
find the right size of the transformer. At 60 GHz, the differen-
tial output capacitance ( ) is approximately 62 fF and is
87.74 pH for a 160- m-long transformer. With the inclusion of
additional wiring parasitics, this leads to a resonant frequency
of at 60 GHz.
6. IEEE
Proof
W
eb
Version
6 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
H. Parasitic Effects at Millimeter-Wave Frequencies
The millimeter-wave transformer uses ground-shielded input
and output pads with a 0.4-dB insertion loss at 60 GHz. The pads
themselves are matched to provide a 50- on-chip impedance
[31]. No additional output impedance transformation network
is used and the tuned 1 : 4 millimeter-wave DAT should, there-
fore, provide a 25- load line to all corner amplifiers simul-
taneously. Unfortunately, the inter-winding and shunt parasitic
capacitances of the stacked transformer affect the symmetry
of this impedance transformation significantly. On one hand,
the inter-winding capacitance fF resonates with
the transformer winding inductance pH (80 m)
at GHz. At that frequency, the re-
turn loss becomes high impedance, causing potential sta-
bility problems if the corner amplifiers are not unconditionally
stable. On the other hand, the same inter-winding capacitance
causes an asymmetry in the impedance transformation ratio.
The impedance seen by the corner amplifiers deviates in the
west–east direction from their ideal load lines. For example,
the 25 is only seen by PA2 and PA3, while the impedance
at PA1 and PA4 is turning inductive with increased capacitive
inter-winding coupling. Additional tuning caps have, therefore,
been used at the north–east and south–east sides to tune this
impedance back to a resistive load. However, their impedance
is higher than the desired 25 , which causes an earlier voltage
compression for PA1 and PA4 affecting the large-signal com-
pression characteristic of the DAT. A compression asymmetry
in turn affects the required alternating phase and amplitude bal-
ance and may cause a dynamic change of the impedance trans-
formation ratio required by the active termination principle de-
scribed in Section II-F. A power dependency of the load-line
impedance is a nonlinear effect and can be observed, for ex-
ample, as a power gain expansion (see the measurement results
in Section III). The shunt winding capacitance to ground is only
fF for the 80- -long transformer and, thus, adds only a
little to the impedance asymmetry.
I. Transformer Frequency Scaling
As described in Section II-G, the DAT is tuned to resonate
directly with the parasitic capacitance of the corner amplifier.
Scaling the transformer to higher frequencies may require a
smaller sized transformer. At some frequencies though, the min-
imum size will be limited by the accuracy of the compact trans-
former modeling described in Section II-E and parasitic effects
might be predominant. Likewise, the uses of larger transistors
to create more output power requires a change in transformer
length. Increasing the length of the transformer in turn causes
the distributed inter-winding capacitance to go up, which makes
it more difficult to achieve a symmetric load-line impedance
across all corners of the DAT. Additionally, it may move the
resonance of the inter-winding capacitance with the transformer
primary inductance into the desired operating frequency band.
J. Transformer Stability Considerations
There are two design aspects that need special considerations
for stable DAT operation. First, the corner amplifiers have to
be unconditionally stable, and second, the transformer has to be
designed such that its load-line impedance variation is minimal
with varying operating conditions. Note, among each other, the
corner amplifiers act like active terminations, which require pre-
cisely phase and amplitude balanced input signals to provide a
constant load-line impedance (see Section II-F). If this is not
provided, the changing load-line impedance may cause stability
problems for push–pull amplifiers that are only conditionally
stable.
For a stable design of the cascode stage described in
Section II-D, it is important to avoid any residual inductance at
the base of transistor T1 and T2. While the desired balanced op-
eration helps to provide an ac ground at the base, it is primarily
difficult to do so in the common mode. Bypass capacitors are
needed to handle the large base current swing, which may not
be broadband enough at millimeter-wave frequencies.
The inter-winding and shunt parasitic capacitances of the
stacked transformer affect the symmetry of the impedance
transformation ratio significantly, as described in Section II-H.
While PA3 and PA2 see a 25- load-line impedance, the
amplifier PA1 and PA4 see an impedance that is slightly higher
(approximately 35 ). A common amplifier circuit and layout,
therefore, must cover both load lines equally well. Finally, the
resonance of the inter-winding capacitance with the transformer
primary inductance may be close to the desired operating fre-
quency band (see Section II-I) causing a high return loss.
III. MEASURED RESULTS
The PA was designed in IBM’s advanced bipolar technology
SiGe8HP. It is a 0.13- m SiGe BiCMOS technology with cutoff
frequencies GHz. The five-layer back-end
of the line has three copper layers with two thick aluminum
layers for the low-loss interconnects available. In addition to
the transformer model being described earlier in Section II-A,
the design kit includes interconnect models for side-shielded
microstrips up to 110 GHz [32]. Such models are scalable
by length and width for simple circuit schematic integration.
The SiGe HBT breakdown voltages are V and
V, respectively. Fig. 8 shows a chip micro-
graph of the PA. The input and output pads are laid out in a
ground–signal–ground–signal–ground (GSGSG) configuration.
The chip has a size of 1.9 1.8 mm including bond pads.
The input and output pads use shunt transmission line stubs
to resonate the pad capacitance, thereby providing a matched
100- impedance (50 for each microstrip) [31].
Swept power gain compression measurements at 60 GHz
require accurate calibration and deembedding techniques at
each power level and frequency in order to remove nonlinear
effects of the test equipment and any driver amplifier that may
precede the device-under-test. To enhance the dynamic range of
the measurement, a calibrated thermal power detector was used
to calibrate a spectrum analyzer that uses an external harmonic
mixer for measurements in the 58–65-GHz frequency range.
The frequency dependent loss ([Au. "mag"? correct
as follows? Text missing?] mag in decibels)
from the spectrum analyzer to the output probe tip (probe
included) was calibrated using a second-tier short-open-load
(SOL) adapter removal technique with an accuracy of 0.2 dB
[31]. Note, any error in the output calibration will affect the
measured output power, as well as the measured PAE. The
7. IEEE
Proof
W
eb
Version
PFEIFFER AND GOREN: 23-dBm 60-GHz DAT IN SILICON PROCESS TECHNOLOGY 7
Fig. 8. Chip micrograph. The overall size of the chip is 1.9 21.8 mm , while
the size of the transformer is only 160 2160 m . Most of the area between
the driver amplifier and the DAT is taken up by the Wilkinson power divider
network.
available input power from the source has been calibrated with
a through measurement on a low-loss differential GSGSG
calibration substrate. The large-signal measurements in this
paper have been made on-wafer with a differential 100- input
impedance. A pure-mode network analyzer concept described
in [33] with an external waveguide balun was used to ensure
phase and amplitude balanced input signals. This is crucial for
the measurements since the amplifier requires ac grounds for
optimum performance and a frequency-dependent phase shift
may cause some gain and output power variation across the
band. Single-ended data can only be measured at the output,
while the amplifier is driven differentially. The overall calibra-
tion accuracy of this setup is estimated to be within 0.5 dB
for both input and output power levels.
Fig. 9 shows the measured large-signal compression char-
acteristic at 64 GHz. The figure includes the power gain,
output power measured differential, and PAE versus input
power. At 64 GHz, the amplifier achieves a saturated output
power of 23 dBm (200 mW) into a differential 100- load.
This is equivalent to a 6.3–Vpp swing, which is well above
the V of the SiGe technology. The PA has a
compressed gain of 13 dB with a peak PAE of 6.3%.
Fig. 10 shows a summary plot of the measured large-signal
gain, saturated output power, and efficiency in the 59–64-GHz
frequency band. The highest output power (23.1 dBm) was mea-
sured at the center of the band at 61.5 GHz. The maximum gain
is at approximately 20 dB, of which 10 dB are provided by
the DAT output stage. The driver amplifier provides a net gain
of 10–11 dB including the 5-dB loss of the Wilkinson power
Fig. 9. Large-signal compression at 64 GHz. At 64 GHz, the amplifier
achieves a saturated output power of 23 dBm (200 mW), which is well above
the BV = 1:7 V of the SiGe technology.
Fig. 10. Measured large-signal gain, saturated output power, and efficiency at
59, 61.5, and 64 GHz.
splitters. The DAT works as expected (conditionally stable) for
supply voltages between 4.0–4.3 V. At lower supply voltages
( V), the DAT amplifier shows signs of instabilities
in the output stage and tends to oscillate at around 52 GHz. Low-
ering the supply voltage causes a shift in the corner amplifiers
output impedance moving it into an unstable operating range
(see Section II-J for a detailed discussion of stability considera-
tions at millimeter-wave frequencies). The amplifier shows ap-
proximately 1–2-dB gain expansion indicating that the DAT is
operating in a nonlinear mode of operation due to the load-line
impedance asymmetry described in Section II-H. The driver am-
plifier design has been previously published in [10]. It is the
first amplifier that is going into compression with a saturated
output power of 16–17 dBm and approximately 7–8-dB com-
pressed gain. The push–pull amplifiers in the corners have a sim-
ilar saturated power due to their identical device sizes. As such,
the measured results suggests that the DAT is efficiently power
combining the four amplifiers while showing 23-dBm (approx-
imately 6 dB higher) total output power compared with a single
8. IEEE
Proof
W
eb
Version
8 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
TABLE I
COMPARISON OF SiGe MILLIMETER-WAVE PAs
amplifier design (compare to [10]). This shows that the loss of
the DAT output transformer is comparable to the loss of regular
transmission-line-based output matching networks while power
combining the outputs of four amplifiers at the same time.
IV. SUMMARY AND CONCLUSION
In this paper, a 60-GHz DAT has been presented. The
two-stage PA achieves 200 mW (23 dBm), which is equivalent
to a 6.3–Vpp swing into a 100- load, which is well above
the V of the SiGe technology. The PA has
a compressed gain of 13 dB with a peak PAE of 6.3% at
61.5 GHz. The silicon area of the output transformer is only
160 160 m . Stacked coupled wires as opposed to slab
inductors have been used to minimize substrate induced losses
and to achieve a high coupling factor of . As of today,
the presented PA has the highest output power reported at mil-
limeter-wave frequencies in an SiGe process technology. See
Table I for a comparison. The amplifier is primarily intended
for wireless data communication with a low peak-to-average
power ratio. Linear operation of the DAT at millimeter-wave
frequencies is limited due to the inter-winding capacitance,
which causes an asymmetry in the impedance transformation.
A scalable transformer model was used during the design and
analysis of the DAT without iterative 3-D EM simulations. The
impedance transformation ratio and the active termination of the
push–pull amplifiers was investigated showing the importance
of unconditionally stable push–pull amplifier design. Detailed
millimeter-wave design considerations have been given that
will ease the design of DATs at millimeter-wave frequencies.
Finally, the measured results show a 4 power enhancement
(6-dB increase) compared with a single PA being used in [10].
This shows that the loss of the transformer is comparable to the
loss of regular transmission-line-based matching networks and,
as such, demonstrates an efficient power-combining technique
in a silicon process technology at millimeter-wave frequencies.
Further study will investigate the efficiency of the interstage
matching and power distribution network currently being dom-
inated by large Wilkinson power divider to reduce the overall
chip area and to further enhance the overall PAE.
ACKNOWLEDGMENT
The authors would like to thank all who contributed to the
fabrication of the chip, especially the IBM SiGe Technology
Group, IBM Burlington, Essex Junction VT, B. Welch, Cor-
nell University, Ithaca, NY, for the layout of the input power di-
vider, and R. Carmon, IBM Haifa Research Laboratories, Mount
Carmel Haifa, Israel, for EM modeling support. Much appreci-
ation goes to B. Gaucher, M. Soyuer, and M. Oprysko, all with
the Communications Department, IBM T. J. Watson Research
Center, Yorktown Heights NY, for their support of this study.
REFERENCES
[1] I. Aoki, S. Kee, D. Rutledge, and A. Hajimiri, “Distributed active trans-
former—A new power-combining and impedance-transformation tech-
nique,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 316–331,
Jan. 2002.
[2] ——, “A fully integrated 1.8-V, 2.8-W, 1.9-GHz, CMOS power ampli-
fier,” in Radio Freq. Integr. Circuits Symp., Jun. 2003, pp. 199–202.
[3] K. Russell, “Microwave power combining techniques,” IEEE Trans.
Microw. Theory Tech., vol. MTT-27, no. 5, pp. 472–478, May 1979.
[4] K. Chang and C. Sun, “Millimeter-wave power-combining tech-
niques,” IEEE Trans. Microw. Theory Tech., vol. MTT-31, no. 2, pp.
91–107, Feb. 1983.
[5] J.-S. Rieh, D. Greenberg, A. Stricker, and G. Freeman, “Scaling of
SiGe heterojunction bipolar transistors,” Proc. IEEE, vol. 93, no. 9, pp.
1522–1538, Sep. 2005.
[6] J.-S. Rieh, M. Khater, K. Schonenberg, F. Pagette, P. S. T. Adam, K.
Stein, D. Ahlgren, and G. Freeman, “Collector vertical scaling and per-
formance tradeoffs in 300 GHz SiGe HBTs,” in Device Res. Conf., Jun.
2004, vol. 1, pp. 235–236.
[7] U. Pfeiffer and A. Valdes-Garcia, “Millimeter-wave design considera-
tions for power amplifiers in a SiGe process technology,” IEEE Trans.
Microw. Theory Tech., vol. 54, no. 1, pp. 57–64, Jan. 2006.
[8] M. Khater, J.-S. Rieh, T. Adams, A. Chinthakindi, J. Johnson, R. Krish-
nasamy, M. Meghelli, F. Pagette, D. Sanderson, C. Schnabel, K. Scho-
nenberg, P. Smith, K. Stein, A. Stricker, S.-J. Jeng, D. Ahlgren, and D.
Freeman, “SiGe HBT technology with f =f = 350=300GHz and
gate delay below 3.3 ps,” in IEEE Int. Electron Devices Meeting, Dec.
2004, pp. 247–250.
[9] U. Pfeiffer, J. Grzyb, D. Liu, B. Gaucher, T. Beukema, B. Floyd, and
S. Reynolds, “A 60-GHz radio chipset fully integrated in a low-cost
packaging technology,” in 56th Electron. Compon. Technol. Conf., Jun.
2006, pp. 1343–1346.
[10] B. Floyd, S. Reynolds, U. R. Pfeiffer, T. Beukema, J. Grzyb, and C.
Haymes, “A silicon 60 GHz receiver and transmitter chipset for broad-
band communications,” in IEEE Int. Solid-State Circuits Conf., Feb.
2006, pp. 184–185.
[11] A. Natarajan, A. Komijani, X. Guan, A. Babakhani, Y. Wang, and
A. Hajimiri, “A 77 GHz phased array transmitter with local LO-path
phase-shifting in silicon,” in IEEE Int. Solid-State Circuits Conf., Feb.
2006, pp. 182–183.
[12] A. Valdes-Garcia, S. Reynolds, and U. R. Pfeiffer, “A 60 GHz class-E
power amplifier in SiGe,” in Asian Solid-State Circuits Conf., Nov.
2006, pp. 199–202.
[13] U. R. Pfeiffer, D. Goren, B. A. Floyd, and S. K. Reynolds, “SiGe trans-
former matched power amplifier for operation at millimeter-wave fre-
quencies,” in Eur. Solid-State Circuits Conf., Sep. 2005, pp. 141–144.
9. IEEE
Proof
W
eb
Version
PFEIFFER AND GOREN: 23-dBm 60-GHz DAT IN SILICON PROCESS TECHNOLOGY 9
[14] C. Wang, Y. Cho, C. Lin, H. Wang, C. Chen, D. Niu, J. Yeh, C. Lee, and
J. Chern, “A 60 GHz transmitter with integrated antenna in 0.18 m
SiGe BiCMOS technology,” in IEEE Int. Solid-State Circuits Conf.,
Feb. 2006, pp. 186–187.
[15] U. Pfeiffer, S. Reynolds, and B. Floyd, “A 77 GHz SiGe power ampli-
fier for potential applications in automotive radar systems,” in Radio
Freq. Integr. Circuits Symp., Jun. 2004, pp. 91–94.
[16] H. Li, H.-M. Rein, T. Suttorp, and J. Boeck, “Fully integrated SiGe
VCOs with powerful output buffer for 77-GHz automotive radar sys-
tems and applications around 100 GHz,” IEEE J. Solid-State Circuits,
vol. 39, pp. 1650–1658, Oct. 2004.
[17] U. R. Pfeiffer, “A 20 dBm fully integrated 60 GHz SiGe power am-
plifier with automatic level control,” in Eur. Solid-State Circuits Conf.,
Sep. 2006, pp. 356–359.
[18] A. Komijani and A. Hajimiri, “A wideband 77 GHz, 17.5 dBm power
amplifier in silicon,” in Custom Integrated Circuits Conf., Sep. 2005,
pp. 566–569.
[19] E. Afshari, H. Bhat, X. Li, and A. Hajimiri, “Electrical funnel: A
broadband signal combining method,” in IEEE Int. Solid-State Circuits
Conf., Feb. 2006, pp. 206–207.
[20] [Au. Must provide inclusive page num-
bers.]T. Cheung, J. Long, Y. Tretiakov, and D. Harame, “A 21–27
GHz self-shielded 4-way power-combining PA balun,” in IEEE Custom
Integr. Circuits Conf., Oct. 2004.
[21] T. S. D. Cheung and J. R. Long, “Shielded passive devices for silicon-
based monolithic microwave and millimeter-wave integrated circuits,”
IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1183–1200, May 2006.
[22] T. Dickson, M.-A. LaCroix, S. Boret, D. Gloria, R. Beerkens, and
S. Voinigescu, “30–100-GHz inductors and transformers for mil-
limeter-wave (Bi)CMOS integrated circuits,” IEEE Trans. Microw.
Theory Tech., vol. 53, no. 1, pp. 123–133, Jan. 2005.
[23] E. Laskin, S. Nicolson, P. Chevalier, A. Chantre, B. Sautreuil, and S.
Voinigescu, “Low-power, low-phase noise SiGe HBT static frequency
divider topologies up to 100 GHz,” in IEEE BCTM Dig., Oct. 2006, pp.
235–238.
[24] T. Yao, M. Gordon, K. Yau, M. Yang, and S. Voinigescu, “60-GHz PA
and LNA in 90-nm RF-CMOS,” in IEEE RFIC Symp. Dig., Jun. 2006,
pp. 147–150.
[25] [Au. Must provide first initial(s) of first
author, subsequent author names, and
day.]FIRST INITIAL(S) Aoki, “Distributed circular geometry
power amplifier architecture,” U.S. Patents 6 737 948, May DAY, 2004.
[26] I. Aoki, S. Kee, D. Rutledge, and A. Hajimiri, “Fully integrated CMOS
power amplifier design using the distributed active-transformer archi-
tecture,” IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 371–383, Mar.
2002.
[27] M. Rickelt and H.-M. Rein, “A novel transistor model for simulating
avalanche-breakdown effects in Si bipolar circuits,” IEEE J. Solid-State
Circuits, vol. 37, no. 9, pp. 1184–1197, Sep. 2002.
[28] R. Singh, D. L. Harame, and M. M. Oprysko, Silicon Germanium:
Technology, Modeling, and Design. Piscataway, NJ: IEEE Press,
2003.
[29] T. Biondi, A. Scuderi, E. Ragonese, and G. Palmisano, “Wideband
lumped scalable modeling of monolithic stacked transformers on sil-
icon,” in IEEE Bipolar/BiCMOS Circuits Technol. Meeting, Sep. 2004,
pp. 265–268.
[30] [Au. Must provide year.]High Frequency Structure
Simulator (HFSS). ver. 9, Ansoft Corporation, Pittsburgh, PA, YEAR.
[31] U. R. Pfeiffer, “Low-loss contact pad with tuned impedance for opera-
tion at millimeter wave frequencies,” in Proc. 9th IEEE Signal Propag.
on Interconnects Workshop, May 2005, pp. 61–64.
[32] T. Zwick, Y. Tretiakov, and D. Goren, “On-chip SiGe transmission line
measurements and model verification up to 110 GHz,” IEEE Microw.
Wireless Compon. Lett., vol. 15, no. 2, pp. 65–67, Feb. 2005.
[33] T. Zwick and U. R. Pfeiffer, “Pure-mode network analyzer concept
for on-wafer measurements of differential circuits at millimeter wave
frequencies,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 3, pp.
934–937, Mar. 2005.
Ullrich R. Pfeiffer (M’02–SM’06) received the
Diploma degree in physics and Ph.D. in physics from
the University of Heidelberg, Heidelberg, Germany,
in 1996 and 1999, respectively.
In 1997, he was a Research Fellow with the
Rutherford Appleton Laboratory, Oxfordshire, U.K.,
where he developed high-speed multichip modules.
In 2000, his research was based on high-integrated
real-time electronics for a particle physics exper-
iment at the European Organization for Nuclear
Research (CERN), Geneva, Switzerland. From 2001
to 2006, he was a Research Staff Member with the IBM T. J. Watson Research
Center, where his research involved RF circuit design, PA design at 60 and
77 GHz, and high-frequency modeling and packaging for millimeter-wave
communication systems. Since 2007, he has been the Head of the Terahertz
Electronics Group, Institute of High-Frequency and Quantum Electronics,
University of Siegen, Siegen, Germany.
Dr. Pfeiffer is a member of the German Physical Society (DPG). He was the
corecipient of the 2004 and 2006 Lewis Winner Award for Outstanding Paper
presented at the IEEE International Solid-State Circuit Conference. He was also
the recipient of the 2006 European Young Investigator Award.
David Goren (M’01) received the B.Sc., M.Sc.,
and Ph.D. degrees in electrical engineering from the
Technion, Israel Institute of Technology, Technion
City, Haifa, Israel, in [Year, Year,]and 1998,
respectively. His doctoral research specialized in
semiconductor device physics and microelectronics.
In 1997, he joined IBM, where he is currently a Re-
search Staff Member with the IBM Haifa Research
Laboratories, Haifa, Israel, involved in the general
field of analog and mixed signal design research. He
is currently the Technology Leader (and founder) of the IBM On-Chip T-line
project, whose products are integrated within IBM technology design kits ever
since 2001. Since 1998, he has also been a Lecturer and Graduate Student Ad-
visor with the Technion. He has authored or coauthored 30 papers in IEEE and
Applied Physics publications. He holds 12 patents.
Dr. Goren was the recipient of the 2003 IBM Outstanding Innovation Award.
11. IEEE
Proof
PrintVersion
2 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
II. MILLIMETER-WAVE DAT
DATs, as described in [1], use two single-turn planar slab
inductors at 2.4 GHz to form a transformer where the primary
inductor is broken up into four quarter sections to facilitate
the connection of four synchronized push–pull amplifiers.
Each synchronized push–pull amplifier couples magnetically
to the same single turn primary inductor in such a way that
their alternating magnetic fluxes add constructively to form a
uniform circular current in the secondary winding. Since each
amplifier on the primary side utilizes only one quarter of the
primary inductor length, and not its full length, the impedance
transformation ratio is (1 : 4) instead of known
for a regular four-turn transformer.
Scaling the DAT topology from 2.4 GHz to millimeter-wave
frequencies imposes a series of challenges. Coplanar trans-
formers are typically used only at lower frequencies where
low coupling factors, substrate and skin effect losses, and
inaccuracies caused by model to hardware discrepancies can
be tolerated [2]. Monolithic on-chip transformers have been
widely used for matching and power-combining purposes in the
past up to a few tens of gigahertz, where the tuned circuits used
for matching have been formed by the transformer primary
inductances and additional capacitors to achieve the band-
width and efficiency required [20]. Commonly used on-chip
transformers are either made of inter-wound spiral inductors
or coplanar coupled wires (slab inductors) to promote mutual
magnetic coupling. In order to operate any transformer in the
millimeter-wave frequency range, its primary inductance has to
be reduced substantially, which, in turn, requires the values of
additional tuning capacitors to be extremely small. Therefore,
it is crucial to have a transformer or DAT structure that allows
accurate modeling and the prediction of parasitic effects. The
most important design challenges for millimeter-wave DATs
are: 1) the DAT requires well synchronized push–pull ampli-
fiers under all operating conditions to maintain the correct load
line impedance for each amplifier; 2) tuning of the DAT for
low loss and high efficiency requires accurate compact EM
modeling, as well as accurate parasitic extraction techniques;
and 3) nonidealities of the transformer such as its inter-winding
capacitance limit the scaling to higher frequencies and requires
optimized 1 : 1 transformer structures.
In the following, various design aspects of the DAT are de-
scribed. This includes a description of the transformer unit cell,
the DAT circuit architecture, a description of the input power
distribution network, the corner amplifier circuits, the compact
EM transformer modeling, the principle of active terminations,
the tuning of the DAT, parasitic effects at millimeter waves, as
well as scaling of the transformer to higher frequencies.
A. Transformer Unit Cell
Stacked transformers have an improved coupling factor on
silicon substrates than coplanar transformers. They can be ef-
fectively shielded from the lossy substrate with perpendicular
ground wires. Such wires do not allow longitudinal currents and,
therefore, do not change the inductance matrix and resulting
magnetic coupling [21], [22]. Stacked transformers can be used
for on-chip impedance transformation, power combining, RF
filters, and single-ended to differential conversion [23], [24].
Fig. 1. (a) Transformer cross section is shown with its primary and secondary
conductor above a ground shield. (b) 3-D view of the transformer from which
the ground shields perpendicular slots and side shields can be seen.
The transformer stack-up used in this paper is shown in
Fig. 1(a). The transformer is arranged in a “sandwich-like”
structure where the primary inductor is stacked vertically
above the secondary inductor. Both wires are located above
a ground shield and achieve a coupling factor of .
Fig. 1(b) shows a 3-D view of the transformer, which uses
a ground shield with perpendicular slots. To improve the
ability to predict the structures parasitic effects, side bars have
been added, which act as a well-defined return path, and a
closed environment EM condition for compact modeling at
millimeter-wave frequencies. Such modeling is scalable by
length and insensitive to close-by metal structures that may
be present dependent on the application and circuit layout,
an important feature that makes it a parametrized cell that
can be used in more complex DAT structures. Eight of these
identical unit cell transformers make up the full DAT structure,
as will be shown in Section II-B. The primary conductor uses
the 4- m-thick aluminum top metal layer (AM), whereas the
secondary conductor is on the 1.25- m-thick second aluminum
layer (LY). The ground shield with its slots orthogonal to wave
propagation and side bars collinear to wave propagation are on
a 0.5- m-thick copper layer (MQ). The transformer template
provides an extremely compact and optimized structure for
millimeter-wave operation. For example, its quality factor
for a 80- m-long transformer at 60 GHz is 32.
B. DAT Circuit Architecture
Fig. 2 shows a 3-D conceptual drawing of the DAT trans-
former structure. The simplified figure only shows the metal
shapes on the first three metal layers and omits the four dif-
ferential push–pull amplifiers in the corners for better clarity.
The DAT uses the thick top-level metal for the primary winding
and the second-level metal for the secondary winding. The dc
supply current for the push–pull amplifiers is supplied via a con-
nection in the center of the structure. A large via field in the
center connects a lower level 4-V power plane to ac grounds
in the center of the primary inductors on the top-level metal.
Note that the primary side is more susceptible to electromigra-
tion than the secondary side of the transformer since their pri-
mary inductor carries the amplifiers’ dc current in addition to its
primary RF current. The top-level metal is three times as thick
12. IEEE
Proof
PrintVersion
PFEIFFER AND GOREN: 23-dBm 60-GHz DAT IN SILICON PROCESS TECHNOLOGY 3
Fig. 2. Conceptual 3-D drawing of the DAT physical structure.
as the second-level metal and is, therefore, the layer of choice
for the primary side, although the amplifiers’ signals have to go
all the way up through the metal stack to connect to the primary
inductors.
The millimeter-wave transformer requires its primary induc-
tance to be small to operate the DAT efficiently at millimeter-
wave frequencies. Its size is, therefore, only 160 160 m (see
Section II-G for the transformer tuning). Generally speaking, a
small transformer has some negative mutual magnetic coupling
between opposite sides of a wire loop since not all of the mag-
netic flux can pass entirely through the center of the structure.
This is primarily a problem in other, e.g., coplanar and trans-
former structures, since it makes the 3-D EM modeling depen-
dent on the diameter and shape (square or circular) of a trans-
former. As a result, one has to perform iterative 3-D EM simu-
lations to optimize the DAT geometry.
Unlike the coplanar DAT described in [1], [2], [25], and [26],
the millimeter-wave DAT transformer in this paper maximizes
the mutual magnetic coupling and simultaneously minimizes
the negative mutual induction to a point where it can be ne-
glected. The electrical performance of the DAT transformer
structure can, therefore, simply be modeled by the stacked
transformer templates described in Section II-A. A simplified
schematic of the DAT is shown in Fig. 3. Eight transformer
templates can be connected in series on the secondary winding
to form a single secondary turn. On the primary side, two
of them are connected to a 4-V supply (ac-ground) in the
center and the push–pull amplifiers at the opposite ends. The
ground shield with the slots orthogonal to wave propagation
and the side bars collinear to wave propagation are adapted
to accommodate the corners of the structure. The structure
maintains its closed environment EM condition, which relaxes
the parasitic effects and boundary conditions. The magnetic
flux is localized around the two wires so that only a small
amount of flux passes through the inner portion of the ring.
This provides the ability to use 2-D compact modeling, which
is scalable by length and independent of the proximity of other
structures in the layout (see Section II-E for EM modeling
of the transformer template). The transformer templates are
decoupled from each other, which allows them to be treated as
independent building blocks. This is specifically an important
feature at millimeter-wave frequencies where prior art coupled
line transformers require 3-D EM simulations for each circular
geometry.
Fig. 3. Schematic of the DAT showing eight transformer templates and the
four differential push–pull amplifiers. A pre-driver followed by six inter-leaved
Wilkinson power splitters is used to create the phase matched inputs with alter-
nating polarity (not shown).
The differential input signal to the four synchronized
push–pull amplifiers is pre-amplified by a pre-driver fol-
lowed by six inter-leaved Wilkinson power splitters (see
Section II-C for more details). The impedance transforma-
tion ratio for an ideal DAT is , which
ideally creates a load line impedance for each amplifier of
. At millimeter-wave frequencies, the DAT,
however, is far from being ideal, which requires the reactive
part of the transformer to be tuned for an optimum load line and
coupling efficiency (see Sections II-G and H for more details).
C. Input Power Distribution Network
The input power distribution network is shown in Fig. 4. Six
equal-split Wilkinson power dividers (three for each polariza-
tion) are used to split the power from a differential driver am-
plifier in quarters. The network layout is inter-leaved to create
four signals with alternating phases. Additional wire segments
are inserted to ensure an equal wire length of 2.3 mm.
Each equal-split Wilkinson power divider is made of 77-
quarter-wave side-shielded transmission lines with a 100-
[Au. Pls. define NS.] NS resistor (npn sub-collector
diffusion resistor). All other interconnects use side-shielded mi-
crostrips with a 50- characteristic impedance. Side-shielded
microstrip transmission lines have been used throughout the
design to avoid any crosstalk in on-chip interconnects. The
total loss of the network is approximately 5 dB, where each
divider has approximately 2-dB insertion loss. Despite their
length and associated losses, on-chip Wilkinson power di-
viders are favorable at the input of the transformer since they
provide a good port isolation, which decouples the inputs of
the corner amplifiers from each other for better DAT stability.
Although their loss and large size can be tolerated at the input
to the DAT, they are rather inadequate for an efficient output
power-combining network and cannot be considered for a DAT
replacement. Apparently, the input splitter area is 400 times
larger than the 160 160 m output transformer and clearly
13. IEEE
Proof
PrintVersion
4 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
Fig. 4. Input power distribution network. Six inter-leaved Wilkinson power di-
viders are used to create the alternating phases for the corner amplifiers. The
signal path for the north–east amplifier (PA4) is highlighted here with the di-
vider sections in black and additional interconnects in gray.
Fig. 5. Circuit schematic of the four identical push–pull corner amplifier. Only
two of the four amplifiers (PA1 and PA2) require an additional tuning capacitor
C .
shows the attractiveness of the tiny millimeter-wave DAT for
power-combining purposes.
D. Corner-Amplifier Circuit
The corner amplifiers are made of four identical differential
PAs, one in each corner of the DAT transformer. Each PA uses a
single-stage push–pull amplifier topology where the differential
output is connected to the ends of adjacent primary windings. A
simplified amplifier schematic is shown in Fig. 5. The single-
stage amplifier uses two cascode gain stages in a differential
mode to provide high power gain and high output voltage swing.
Note that, in a DAT topology, it is merely a matter of definition
which cascode stage forms a differential amplifier (see [1] and
[2]). Due to their close proximity to one another, it is beneficial
for the design of the input matching network to consider the
two corner cascode stages as being a differential amplifier as
opposed to the spatially separated amplifiers that span across
the length of the primary inductor.
The base of the common-base (CB) output devices (T1 and
T2) are directly connected together to provide an ac ground
at the base ( V). This minimizes impact ionization
and, thus, maximizes the breakdown voltage of the output de-
vice [27], [28]. The ac ground provides zero external base re-
sistance at RF and the voltage swing is not limited by .
This allows the output voltage to swing 2.5 V around the 4-V
dc supply voltage without causing the device to break down. A
low impedance at the base is also important to ensure stable op-
eration of the amplifier. A compact layout with minimized para-
sitics is, therefore, important and any residual inductance at the
base was minimized to improve the stability of the amplifier.
Note that, in a balanced configuration without an ac ground, a
low impedance at the CB base is difficult to achieve since many
bypass capacitors are needed to handle the large base current
swing. Such base decoupling is well beyond self-resonance at
millimeter-wave frequencies and can cause stability problems.
A single inductor with an ac ground is connected across the
base from T3 to T4 to supply the bias voltage for the ampli-
fier. The length of the input bias inductor can be smaller than a
quarter-wave RF choke since its reactance can be tuned with the
input parasitics of the device and the input matching network to
form a real 100- differential input impedance for maximum
power transfer.
E. Compact EM Modeling
The transformer model used for circuit simulations is imple-
mented in a filter resistive capacitive inductive (RLC) network
plus dependent sources. This physical model takes the skin
and proximity effects between the three transformer conduc-
tors up to the third harmonic of the fundamental frequency
(180 GHz) into account. Compared to other approaches [29],
such modeling enhances its frequency range up to a point where
it can be used to simulate nonlinear effects in millimeter-wave
amplifier designs. The silicon substrate induced losses and
added frequency dependence is being effectively canceled by
the shielding effect of the perpendicular wires of the bottom
ground shield. The model is designed to describe the trans-
former operation in all its operation modes, namely, it does not
assume in advance that the transformer is being matched to a
given input and output impedance. This allows for the correct
tuning and matching of the transformer using the model inside a
circuit level simulation. The model has been tuned and verified
using a 3-D EM solver [30].
For illustrative purposes, it is, however, easier to create an
equivalent-circuit model similar to the one shown in Fig. 6.
Although this model was not used as part of the design process,
it is shown here to illustrate the nonidealities of a trans-
former including its distributed parasitic capacitance like the
inter-winding capacitance and the parasitic capacitance
to the ground shield.
The equivalent transformer circuit model assumes an ideal
transformer with a coupling factor of and a
primary inductance . The nonidealities are modeled with
a stray inductance of , where is the total primary
inductance of the transformer. For an 80- m-long section,
14. IEEE
Proof
PrintVersion
PFEIFFER AND GOREN: 23-dBm 60-GHz DAT IN SILICON PROCESS TECHNOLOGY 5
Fig. 6. Equivalent transformer model used for illustrative purposes only. A dis-
tributed filter RLC network plus dependent sources was used instead for circuit
simulations. Additional matching elements (L and C ) can be used on the pri-
mary side that add some level of tuning of the otherwise fixed 1 : 4 impedance
transformation ration (not used in this paper’s PA).
is 43.87 pH with fF and fF. At 60 GHz,
the differential output impedance of a differential amplifier can
be modeled by a parasitic capacitance of fF. For ad-
ditional information on the modeling and design of SiGe HBTs
PAs operating at millimeter-wave frequencies, see [7].
F. Active Push–Pull Amplifier Termination
In this paper, the term active termination is used to under-
line that a DAT does not resistively terminate each individual
push–pull amplifier. Unlike resistors with a fixed impedance
of , the impedance provided by the DAT depends on its
impedance transformation ratio, which requires a synchronous
operation of the push–pull amplifiers. The push–pull amplifiers
need to couple synchronously to the primary inductor to add
the induced currents (e.g., magnetic fluxes) constructively. If
the amplifiers are out of phase or have an amplitude imbal-
ance, the circular current in the secondary winding will not have
its maximum and cause a change of the load line impedance
by , where are the com-
plex secondary currents induced from each push–pull amplifier
and is the push–pull amplifier output voltage. As such, the
load-line impedance seen by each amplifier may change if the
other amplifies go out of phase or change their output voltage
or current swings. Strictly speaking, the impedance seen by one
amplifier could change from to an open or even be negative
depending on how the secondary currents add up. Therefore,
under all operating conditions, the amplifiers should maintain
their relative phase, voltage, and current swings to maintain the
1 : 4 impedance transformation ratio. This is a challenging task
at millimeter-wave frequencies and across various power levels
and process variations, as we will see in Section II-H. A change
in load impedance will cause nonlinear effects or stability prob-
lems if the push–pull amplifiers are not unconditionally stable
(see also Section II-J for more details).
Interestingly to note, the neighbor push–pull amplifier load
the other amplifiers through the transformer with their output
impedances. They act like Thévenin voltage sources with
being the internal voltage source impedance. The amplifier’s
output impedance, therefore, should be rather small to avoid
a further degradation of the impedance transformation ratio.
Strictly speaking, the impedance transformation ratio is only
, where is dominated by the output capac-
itance ( ) of the differential push–pull amplifiers. We will see
Fig. 7. Illustration of the active termination mechanism of the DAT. (a) Col-
lective operation of the four push–pull amplifiers where the alternating primary
currents add constructively. (b) Transformation ration of the same transformer
where three of the four push–pull amplifiers add destructively.
in the following Section II-G that the output capacitance ( )
can be tuned with the primary inductance of the transformer
to generate a real load impedance.
Fig. 7 illustrates the active termination mechanism. Fig. 7(a)
shows the ideal case where the secondary induced currents add
constructively with a load-line impedance of .
Fig. 7(b) shows a case where three of the four amplifiers are
either switched off or add destructively to generate a load-line
impedance of only. In the case where the other three
amplifiers operate in antiphase with respect to the investigated
amplifier, the load impedance is negative (not
shown). In other words, only the synchronous operation of the
push–pull amplifiers makes them act like a single source with an
internal impedance of . The impedance seen at the output
port of the DAT, therefore, is , with an output return loss
( ) that is four times larger than a single push–pull amplifier
would have.
G. Impedance Tuning of the DAT
The equivalent-circuit model for the transformer has previ-
ously been shown in Fig. 6. It models the nonidealities of the
transformer for with a stray inductance of
on the primary side of an ideal transformer. The purpose
of tuning the DAT is to remove the total primary inductance
while resonating it with an additional tuning capacitor. This will
make the transformer look like an ideal transformer.
Unlike the DAT described in [1] and [2], the millimeter-wave
DAT in this paper does not require additional tuning caps to
achieve this resonance. The size of the millimeter-wave trans-
former has been adapted such that its primary inductance is
large enough to resonate with the parasitics of the transistor
amplifiers directly. While at low frequencies the corner am-
plifiers output impedance is primarily resistive, at millimeter-
wave frequencies, it is dominated by its parasitic capacitance
( ). No additional capacitors are thus required and the scal-
able transformer model described in Section II-E was used to
find the right size of the transformer. At 60 GHz, the differen-
tial output capacitance ( ) is approximately 62 fF and is
87.74 pH for a 160- m-long transformer. With the inclusion of
additional wiring parasitics, this leads to a resonant frequency
of at 60 GHz.
15. IEEE
Proof
PrintVersion
6 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
H. Parasitic Effects at Millimeter-Wave Frequencies
The millimeter-wave transformer uses ground-shielded input
and output pads with a 0.4-dB insertion loss at 60 GHz. The pads
themselves are matched to provide a 50- on-chip impedance
[31]. No additional output impedance transformation network
is used and the tuned 1 : 4 millimeter-wave DAT should, there-
fore, provide a 25- load line to all corner amplifiers simul-
taneously. Unfortunately, the inter-winding and shunt parasitic
capacitances of the stacked transformer affect the symmetry
of this impedance transformation significantly. On one hand,
the inter-winding capacitance fF resonates with
the transformer winding inductance pH (80 m)
at GHz. At that frequency, the re-
turn loss becomes high impedance, causing potential sta-
bility problems if the corner amplifiers are not unconditionally
stable. On the other hand, the same inter-winding capacitance
causes an asymmetry in the impedance transformation ratio.
The impedance seen by the corner amplifiers deviates in the
west–east direction from their ideal load lines. For example,
the 25 is only seen by PA2 and PA3, while the impedance
at PA1 and PA4 is turning inductive with increased capacitive
inter-winding coupling. Additional tuning caps have, therefore,
been used at the north–east and south–east sides to tune this
impedance back to a resistive load. However, their impedance
is higher than the desired 25 , which causes an earlier voltage
compression for PA1 and PA4 affecting the large-signal com-
pression characteristic of the DAT. A compression asymmetry
in turn affects the required alternating phase and amplitude bal-
ance and may cause a dynamic change of the impedance trans-
formation ratio required by the active termination principle de-
scribed in Section II-F. A power dependency of the load-line
impedance is a nonlinear effect and can be observed, for ex-
ample, as a power gain expansion (see the measurement results
in Section III). The shunt winding capacitance to ground is only
fF for the 80- -long transformer and, thus, adds only a
little to the impedance asymmetry.
I. Transformer Frequency Scaling
As described in Section II-G, the DAT is tuned to resonate
directly with the parasitic capacitance of the corner amplifier.
Scaling the transformer to higher frequencies may require a
smaller sized transformer. At some frequencies though, the min-
imum size will be limited by the accuracy of the compact trans-
former modeling described in Section II-E and parasitic effects
might be predominant. Likewise, the uses of larger transistors
to create more output power requires a change in transformer
length. Increasing the length of the transformer in turn causes
the distributed inter-winding capacitance to go up, which makes
it more difficult to achieve a symmetric load-line impedance
across all corners of the DAT. Additionally, it may move the
resonance of the inter-winding capacitance with the transformer
primary inductance into the desired operating frequency band.
J. Transformer Stability Considerations
There are two design aspects that need special considerations
for stable DAT operation. First, the corner amplifiers have to
be unconditionally stable, and second, the transformer has to be
designed such that its load-line impedance variation is minimal
with varying operating conditions. Note, among each other, the
corner amplifiers act like active terminations, which require pre-
cisely phase and amplitude balanced input signals to provide a
constant load-line impedance (see Section II-F). If this is not
provided, the changing load-line impedance may cause stability
problems for push–pull amplifiers that are only conditionally
stable.
For a stable design of the cascode stage described in
Section II-D, it is important to avoid any residual inductance at
the base of transistor T1 and T2. While the desired balanced op-
eration helps to provide an ac ground at the base, it is primarily
difficult to do so in the common mode. Bypass capacitors are
needed to handle the large base current swing, which may not
be broadband enough at millimeter-wave frequencies.
The inter-winding and shunt parasitic capacitances of the
stacked transformer affect the symmetry of the impedance
transformation ratio significantly, as described in Section II-H.
While PA3 and PA2 see a 25- load-line impedance, the
amplifier PA1 and PA4 see an impedance that is slightly higher
(approximately 35 ). A common amplifier circuit and layout,
therefore, must cover both load lines equally well. Finally, the
resonance of the inter-winding capacitance with the transformer
primary inductance may be close to the desired operating fre-
quency band (see Section II-I) causing a high return loss.
III. MEASURED RESULTS
The PA was designed in IBM’s advanced bipolar technology
SiGe8HP. It is a 0.13- m SiGe BiCMOS technology with cutoff
frequencies GHz. The five-layer back-end
of the line has three copper layers with two thick aluminum
layers for the low-loss interconnects available. In addition to
the transformer model being described earlier in Section II-A,
the design kit includes interconnect models for side-shielded
microstrips up to 110 GHz [32]. Such models are scalable
by length and width for simple circuit schematic integration.
The SiGe HBT breakdown voltages are V and
V, respectively. Fig. 8 shows a chip micro-
graph of the PA. The input and output pads are laid out in a
ground–signal–ground–signal–ground (GSGSG) configuration.
The chip has a size of 1.9 1.8 mm including bond pads.
The input and output pads use shunt transmission line stubs
to resonate the pad capacitance, thereby providing a matched
100- impedance (50 for each microstrip) [31].
Swept power gain compression measurements at 60 GHz
require accurate calibration and deembedding techniques at
each power level and frequency in order to remove nonlinear
effects of the test equipment and any driver amplifier that may
precede the device-under-test. To enhance the dynamic range of
the measurement, a calibrated thermal power detector was used
to calibrate a spectrum analyzer that uses an external harmonic
mixer for measurements in the 58–65-GHz frequency range.
The frequency dependent loss ([Au. mag? correct
as follows? Text missing?] mag in decibels)
from the spectrum analyzer to the output probe tip (probe
included) was calibrated using a second-tier short-open-load
(SOL) adapter removal technique with an accuracy of 0.2 dB
[31]. Note, any error in the output calibration will affect the
measured output power, as well as the measured PAE. The
16. IEEE
Proof
PrintVersion
PFEIFFER AND GOREN: 23-dBm 60-GHz DAT IN SILICON PROCESS TECHNOLOGY 7
Fig. 8. Chip micrograph. The overall size of the chip is 1.9 21.8 mm , while
the size of the transformer is only 160 2160 m . Most of the area between
the driver amplifier and the DAT is taken up by the Wilkinson power divider
network.
available input power from the source has been calibrated with
a through measurement on a low-loss differential GSGSG
calibration substrate. The large-signal measurements in this
paper have been made on-wafer with a differential 100- input
impedance. A pure-mode network analyzer concept described
in [33] with an external waveguide balun was used to ensure
phase and amplitude balanced input signals. This is crucial for
the measurements since the amplifier requires ac grounds for
optimum performance and a frequency-dependent phase shift
may cause some gain and output power variation across the
band. Single-ended data can only be measured at the output,
while the amplifier is driven differentially. The overall calibra-
tion accuracy of this setup is estimated to be within 0.5 dB
for both input and output power levels.
Fig. 9 shows the measured large-signal compression char-
acteristic at 64 GHz. The figure includes the power gain,
output power measured differential, and PAE versus input
power. At 64 GHz, the amplifier achieves a saturated output
power of 23 dBm (200 mW) into a differential 100- load.
This is equivalent to a 6.3–Vpp swing, which is well above
the V of the SiGe technology. The PA has a
compressed gain of 13 dB with a peak PAE of 6.3%.
Fig. 10 shows a summary plot of the measured large-signal
gain, saturated output power, and efficiency in the 59–64-GHz
frequency band. The highest output power (23.1 dBm) was mea-
sured at the center of the band at 61.5 GHz. The maximum gain
is at approximately 20 dB, of which 10 dB are provided by
the DAT output stage. The driver amplifier provides a net gain
of 10–11 dB including the 5-dB loss of the Wilkinson power
Fig. 9. Large-signal compression at 64 GHz. At 64 GHz, the amplifier
achieves a saturated output power of 23 dBm (200 mW), which is well above
the BV = 1:7 V of the SiGe technology.
Fig. 10. Measured large-signal gain, saturated output power, and efficiency at
59, 61.5, and 64 GHz.
splitters. The DAT works as expected (conditionally stable) for
supply voltages between 4.0–4.3 V. At lower supply voltages
( V), the DAT amplifier shows signs of instabilities
in the output stage and tends to oscillate at around 52 GHz. Low-
ering the supply voltage causes a shift in the corner amplifiers
output impedance moving it into an unstable operating range
(see Section II-J for a detailed discussion of stability considera-
tions at millimeter-wave frequencies). The amplifier shows ap-
proximately 1–2-dB gain expansion indicating that the DAT is
operating in a nonlinear mode of operation due to the load-line
impedance asymmetry described in Section II-H. The driver am-
plifier design has been previously published in [10]. It is the
first amplifier that is going into compression with a saturated
output power of 16–17 dBm and approximately 7–8-dB com-
pressed gain. The push–pull amplifiers in the corners have a sim-
ilar saturated power due to their identical device sizes. As such,
the measured results suggests that the DAT is efficiently power
combining the four amplifiers while showing 23-dBm (approx-
imately 6 dB higher) total output power compared with a single
17. IEEE
Proof
PrintVersion
8 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
TABLE I
COMPARISON OF SiGe MILLIMETER-WAVE PAs
amplifier design (compare to [10]). This shows that the loss of
the DAT output transformer is comparable to the loss of regular
transmission-line-based output matching networks while power
combining the outputs of four amplifiers at the same time.
IV. SUMMARY AND CONCLUSION
In this paper, a 60-GHz DAT has been presented. The
two-stage PA achieves 200 mW (23 dBm), which is equivalent
to a 6.3–Vpp swing into a 100- load, which is well above
the V of the SiGe technology. The PA has
a compressed gain of 13 dB with a peak PAE of 6.3% at
61.5 GHz. The silicon area of the output transformer is only
160 160 m . Stacked coupled wires as opposed to slab
inductors have been used to minimize substrate induced losses
and to achieve a high coupling factor of . As of today,
the presented PA has the highest output power reported at mil-
limeter-wave frequencies in an SiGe process technology. See
Table I for a comparison. The amplifier is primarily intended
for wireless data communication with a low peak-to-average
power ratio. Linear operation of the DAT at millimeter-wave
frequencies is limited due to the inter-winding capacitance,
which causes an asymmetry in the impedance transformation.
A scalable transformer model was used during the design and
analysis of the DAT without iterative 3-D EM simulations. The
impedance transformation ratio and the active termination of the
push–pull amplifiers was investigated showing the importance
of unconditionally stable push–pull amplifier design. Detailed
millimeter-wave design considerations have been given that
will ease the design of DATs at millimeter-wave frequencies.
Finally, the measured results show a 4 power enhancement
(6-dB increase) compared with a single PA being used in [10].
This shows that the loss of the transformer is comparable to the
loss of regular transmission-line-based matching networks and,
as such, demonstrates an efficient power-combining technique
in a silicon process technology at millimeter-wave frequencies.
Further study will investigate the efficiency of the interstage
matching and power distribution network currently being dom-
inated by large Wilkinson power divider to reduce the overall
chip area and to further enhance the overall PAE.
ACKNOWLEDGMENT
The authors would like to thank all who contributed to the
fabrication of the chip, especially the IBM SiGe Technology
Group, IBM Burlington, Essex Junction VT, B. Welch, Cor-
nell University, Ithaca, NY, for the layout of the input power di-
vider, and R. Carmon, IBM Haifa Research Laboratories, Mount
Carmel Haifa, Israel, for EM modeling support. Much appreci-
ation goes to B. Gaucher, M. Soyuer, and M. Oprysko, all with
the Communications Department, IBM T. J. Watson Research
Center, Yorktown Heights NY, for their support of this study.
REFERENCES
[1] I. Aoki, S. Kee, D. Rutledge, and A. Hajimiri, “Distributed active trans-
former—A new power-combining and impedance-transformation tech-
nique,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 316–331,
Jan. 2002.
[2] ——, “A fully integrated 1.8-V, 2.8-W, 1.9-GHz, CMOS power ampli-
fier,” in Radio Freq. Integr. Circuits Symp., Jun. 2003, pp. 199–202.
[3] K. Russell, “Microwave power combining techniques,” IEEE Trans.
Microw. Theory Tech., vol. MTT-27, no. 5, pp. 472–478, May 1979.
[4] K. Chang and C. Sun, “Millimeter-wave power-combining tech-
niques,” IEEE Trans. Microw. Theory Tech., vol. MTT-31, no. 2, pp.
91–107, Feb. 1983.
[5] J.-S. Rieh, D. Greenberg, A. Stricker, and G. Freeman, “Scaling of
SiGe heterojunction bipolar transistors,” Proc. IEEE, vol. 93, no. 9, pp.
1522–1538, Sep. 2005.
[6] J.-S. Rieh, M. Khater, K. Schonenberg, F. Pagette, P. S. T. Adam, K.
Stein, D. Ahlgren, and G. Freeman, “Collector vertical scaling and per-
formance tradeoffs in 300 GHz SiGe HBTs,” in Device Res. Conf., Jun.
2004, vol. 1, pp. 235–236.
[7] U. Pfeiffer and A. Valdes-Garcia, “Millimeter-wave design considera-
tions for power amplifiers in a SiGe process technology,” IEEE Trans.
Microw. Theory Tech., vol. 54, no. 1, pp. 57–64, Jan. 2006.
[8] M. Khater, J.-S. Rieh, T. Adams, A. Chinthakindi, J. Johnson, R. Krish-
nasamy, M. Meghelli, F. Pagette, D. Sanderson, C. Schnabel, K. Scho-
nenberg, P. Smith, K. Stein, A. Stricker, S.-J. Jeng, D. Ahlgren, and D.
Freeman, “SiGe HBT technology with f =f = 350=300GHz and
gate delay below 3.3 ps,” in IEEE Int. Electron Devices Meeting, Dec.
2004, pp. 247–250.
[9] U. Pfeiffer, J. Grzyb, D. Liu, B. Gaucher, T. Beukema, B. Floyd, and
S. Reynolds, “A 60-GHz radio chipset fully integrated in a low-cost
packaging technology,” in 56th Electron. Compon. Technol. Conf., Jun.
2006, pp. 1343–1346.
[10] B. Floyd, S. Reynolds, U. R. Pfeiffer, T. Beukema, J. Grzyb, and C.
Haymes, “A silicon 60 GHz receiver and transmitter chipset for broad-
band communications,” in IEEE Int. Solid-State Circuits Conf., Feb.
2006, pp. 184–185.
[11] A. Natarajan, A. Komijani, X. Guan, A. Babakhani, Y. Wang, and
A. Hajimiri, “A 77 GHz phased array transmitter with local LO-path
phase-shifting in silicon,” in IEEE Int. Solid-State Circuits Conf., Feb.
2006, pp. 182–183.
[12] A. Valdes-Garcia, S. Reynolds, and U. R. Pfeiffer, “A 60 GHz class-E
power amplifier in SiGe,” in Asian Solid-State Circuits Conf., Nov.
2006, pp. 199–202.
[13] U. R. Pfeiffer, D. Goren, B. A. Floyd, and S. K. Reynolds, “SiGe trans-
former matched power amplifier for operation at millimeter-wave fre-
quencies,” in Eur. Solid-State Circuits Conf., Sep. 2005, pp. 141–144.
18. IEEE
Proof
PrintVersion
PFEIFFER AND GOREN: 23-dBm 60-GHz DAT IN SILICON PROCESS TECHNOLOGY 9
[14] C. Wang, Y. Cho, C. Lin, H. Wang, C. Chen, D. Niu, J. Yeh, C. Lee, and
J. Chern, “A 60 GHz transmitter with integrated antenna in 0.18 m
SiGe BiCMOS technology,” in IEEE Int. Solid-State Circuits Conf.,
Feb. 2006, pp. 186–187.
[15] U. Pfeiffer, S. Reynolds, and B. Floyd, “A 77 GHz SiGe power ampli-
fier for potential applications in automotive radar systems,” in Radio
Freq. Integr. Circuits Symp., Jun. 2004, pp. 91–94.
[16] H. Li, H.-M. Rein, T. Suttorp, and J. Boeck, “Fully integrated SiGe
VCOs with powerful output buffer for 77-GHz automotive radar sys-
tems and applications around 100 GHz,” IEEE J. Solid-State Circuits,
vol. 39, pp. 1650–1658, Oct. 2004.
[17] U. R. Pfeiffer, “A 20 dBm fully integrated 60 GHz SiGe power am-
plifier with automatic level control,” in Eur. Solid-State Circuits Conf.,
Sep. 2006, pp. 356–359.
[18] A. Komijani and A. Hajimiri, “A wideband 77 GHz, 17.5 dBm power
amplifier in silicon,” in Custom Integrated Circuits Conf., Sep. 2005,
pp. 566–569.
[19] E. Afshari, H. Bhat, X. Li, and A. Hajimiri, “Electrical funnel: A
broadband signal combining method,” in IEEE Int. Solid-State Circuits
Conf., Feb. 2006, pp. 206–207.
[20] [Au. Must provide inclusive page num-
bers.]T. Cheung, J. Long, Y. Tretiakov, and D. Harame, “A 21–27
GHz self-shielded 4-way power-combining PA balun,” in IEEE Custom
Integr. Circuits Conf., Oct. 2004.
[21] T. S. D. Cheung and J. R. Long, “Shielded passive devices for silicon-
based monolithic microwave and millimeter-wave integrated circuits,”
IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1183–1200, May 2006.
[22] T. Dickson, M.-A. LaCroix, S. Boret, D. Gloria, R. Beerkens, and
S. Voinigescu, “30–100-GHz inductors and transformers for mil-
limeter-wave (Bi)CMOS integrated circuits,” IEEE Trans. Microw.
Theory Tech., vol. 53, no. 1, pp. 123–133, Jan. 2005.
[23] E. Laskin, S. Nicolson, P. Chevalier, A. Chantre, B. Sautreuil, and S.
Voinigescu, “Low-power, low-phase noise SiGe HBT static frequency
divider topologies up to 100 GHz,” in IEEE BCTM Dig., Oct. 2006, pp.
235–238.
[24] T. Yao, M. Gordon, K. Yau, M. Yang, and S. Voinigescu, “60-GHz PA
and LNA in 90-nm RF-CMOS,” in IEEE RFIC Symp. Dig., Jun. 2006,
pp. 147–150.
[25] [Au. Must provide first initial(s) of first
author, subsequent author names, and
day.]FIRST INITIAL(S) Aoki, “Distributed circular geometry
power amplifier architecture,” U.S. Patents 6 737 948, May DAY, 2004.
[26] I. Aoki, S. Kee, D. Rutledge, and A. Hajimiri, “Fully integrated CMOS
power amplifier design using the distributed active-transformer archi-
tecture,” IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 371–383, Mar.
2002.
[27] M. Rickelt and H.-M. Rein, “A novel transistor model for simulating
avalanche-breakdown effects in Si bipolar circuits,” IEEE J. Solid-State
Circuits, vol. 37, no. 9, pp. 1184–1197, Sep. 2002.
[28] R. Singh, D. L. Harame, and M. M. Oprysko, Silicon Germanium:
Technology, Modeling, and Design. Piscataway, NJ: IEEE Press,
2003.
[29] T. Biondi, A. Scuderi, E. Ragonese, and G. Palmisano, “Wideband
lumped scalable modeling of monolithic stacked transformers on sil-
icon,” in IEEE Bipolar/BiCMOS Circuits Technol. Meeting, Sep. 2004,
pp. 265–268.
[30] [Au. Must provide year.]High Frequency Structure
Simulator (HFSS). ver. 9, Ansoft Corporation, Pittsburgh, PA, YEAR.
[31] U. R. Pfeiffer, “Low-loss contact pad with tuned impedance for opera-
tion at millimeter wave frequencies,” in Proc. 9th IEEE Signal Propag.
on Interconnects Workshop, May 2005, pp. 61–64.
[32] T. Zwick, Y. Tretiakov, and D. Goren, “On-chip SiGe transmission line
measurements and model verification up to 110 GHz,” IEEE Microw.
Wireless Compon. Lett., vol. 15, no. 2, pp. 65–67, Feb. 2005.
[33] T. Zwick and U. R. Pfeiffer, “Pure-mode network analyzer concept
for on-wafer measurements of differential circuits at millimeter wave
frequencies,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 3, pp.
934–937, Mar. 2005.
Ullrich R. Pfeiffer (M’02–SM’06) received the
Diploma degree in physics and Ph.D. in physics from
the University of Heidelberg, Heidelberg, Germany,
in 1996 and 1999, respectively.
In 1997, he was a Research Fellow with the
Rutherford Appleton Laboratory, Oxfordshire, U.K.,
where he developed high-speed multichip modules.
In 2000, his research was based on high-integrated
real-time electronics for a particle physics exper-
iment at the European Organization for Nuclear
Research (CERN), Geneva, Switzerland. From 2001
to 2006, he was a Research Staff Member with the IBM T. J. Watson Research
Center, where his research involved RF circuit design, PA design at 60 and
77 GHz, and high-frequency modeling and packaging for millimeter-wave
communication systems. Since 2007, he has been the Head of the Terahertz
Electronics Group, Institute of High-Frequency and Quantum Electronics,
University of Siegen, Siegen, Germany.
Dr. Pfeiffer is a member of the German Physical Society (DPG). He was the
corecipient of the 2004 and 2006 Lewis Winner Award for Outstanding Paper
presented at the IEEE International Solid-State Circuit Conference. He was also
the recipient of the 2006 European Young Investigator Award.
David Goren (M’01) received the B.Sc., M.Sc.,
and Ph.D. degrees in electrical engineering from the
Technion, Israel Institute of Technology, Technion
City, Haifa, Israel, in [Year, Year,]and 1998,
respectively. His doctoral research specialized in
semiconductor device physics and microelectronics.
In 1997, he joined IBM, where he is currently a Re-
search Staff Member with the IBM Haifa Research
Laboratories, Haifa, Israel, involved in the general
field of analog and mixed signal design research. He
is currently the Technology Leader (and founder) of the IBM On-Chip T-line
project, whose products are integrated within IBM technology design kits ever
since 2001. Since 1998, he has also been a Lecturer and Graduate Student Ad-
visor with the Technion. He has authored or coauthored 30 papers in IEEE and
Applied Physics publications. He holds 12 patents.
Dr. Goren was the recipient of the 2003 IBM Outstanding Innovation Award.
![IEEE
Proof
W
eb
Version
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES 1
A 23-dBm 60-GHz Distributed Active Transformer
in a Silicon Process Technology
Ullrich R. Pfeiffer, Senior Member, IEEE, and David Goren, Member, IEEE
Abstract—In this paper, a distributed active transformer for the
operation in the millimeter-wave frequency range is presented.
The transformer utilizes stacked coupled wires as opposed to slab
inductors to achieve a high coupling factor of = 0 8at 60 GHz.
Scalable and compact equivalent-circuit models are used for the
transformer design without the need for full-wave electromagnetic
simulations. To demonstrate the feasibility of the millimeter-wave
transformer, a 200-mW (23 dBm) 60-GHz power amplifier has
been implemented in a standard 130-nm SiGe process technology,
which, to date, is the highest reported output power in an SiGe
process technology at millimeter-wave frequencies. The size of the
output transformer is only 160 160 m2 and demonstrates the
feasibility of efficient power combining and impedance transfor-
mation at millimeter-wave frequencies. The two-stage amplifier
has 13 dB of compressed gain and achieves a power-added ef-
ficiency of 6.4% while combining the power of eight cascode
amplifiers into a differential 100-
load. The amplifier supply
voltage is 4 V with a quiescent current consumption of 300 mA.
Index Terms—Distributed active transformer (DAT), millimeter
wave, on-chip power combining, power amplifier (PA), silicon ger-
manium (SiGe), wireless communication.
I. INTRODUCTION
DISTRIBUTED active transformers (DATs) have recently
created some excitement at lower frequencies, e.g., around
2.4 GHz [1], [2], where the DAT topology promises highly effi-
cient, fully integrated, and watt-level power amplifiers (PAs) in
a standard low-voltage CMOS process technology. A fully in-
tegrated CMOS PA is one of the key building blocks that will
enable single-chip integrated transceivers in the future. Unlike
other power-combining techniques [3], [4], the DAT topology
provides power combining and efficient impedance transforma-
tion simultaneously to overcome the low transistor breakdown
voltage limitations that exist today.
Manuscript was received September 11, 2006; revised February 6, 2007. This
work was supported in part by the National Aeronautics and Space Administra-
tion under Grant NAS3-03070 and by the Defense Advanced Research Projects
Agency under Grant N66001-02-C-8014 and Grant N66001-05-C-8013.
U. R. Pfeiffer was with the IBM T. J. Watson Research Center, Yorktown
Heights, NY 10598 USA. He is now with the Terahertz Electronics Group, Insti-
tute of High-Frequency and Quantum Electronics, University of Siegen, 57068
Siegen, Germany.
D. Goren is with IBM Haifa Research Laboratories, Mount Carmel, Haifa
31905, Israel, and with the Technion, Israel Institute of Technology, Technion
City, Haifa 32000, Israel (e-mail: DAVIDG@il.ibm.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TMTT.2007.895654
Similarly, at millimeter-wave frequencies, faster bipolar
transistor technologies like silicon germanium (SiGe) HBTs
suffer the same breakdown voltage limitations due to their
continued device scaling [5], [6]. This makes high-power SiGe
amplifiers a crucial and challenging building block for many
millimeter-wave systems [7]. SiGe HBTs have achieved cutoff
frequencies as high as GHz [8], rivaling
the high-frequency performance of other III/V semiconductors
like InP-based HBTs. Potential applications for SiGe tech-
nologies are high-speed communications systems at 60 GHz
[9], [10] and beyond, as well as automotive radar systems at
77 GHz [11]. The breakdown voltages and of
today’s SiGe process technologies are typically below 2 and
6 V, respectively. For example, if one wants to deliver 23 dBm
(200 mW) from a single common-emitter device biased at 1.1 V
( V swing, V) into a 50- load, one would
need an impedance transformation ration of approximately
50 : 3 ( ); unlikely to be very efficient for
millimeter waves. Recent studies at 60 [7], [10], [12]–[14]
and 77 GHz [15], [16] have demonstrated single device output
powers as high as 15.5 dBm with a power-added efficiency
(PAE) typically lower than 10%. On-chip power combining and
balanced device operation has been exploited to enhance the
maximum available output power per chip (20 [17], 18.5 [16],
17.5 [18], and 21 dBm [19]).
This paper presents a 60-GHz DAT with a small area of
160 160 m . The transformer utilizes ground shielded and
stacked coupled wires as opposed to slab inductors to minimize
substrate induced losses and to achieve a high coupling factor
of . The DAT was used in a two-stage 60-GHz PA to
combine the power of four push–pull amplifiers in a standard
130-nm SiGe BiCMOS process technology. The amplifier de-
livers 200 mW (23 dBm) into a 100- differential load, which,
to date, is the highest reported output power in an SiGe process
technology at millimeter-wave frequencies. It has 13 dB of
compressed gain and achieves a PAE of 6.4%. Throughout
the design, scalable and compact equivalent circuit modeling
was used without iterative full-wave electromagnetic (EM)
simulations.
Section II describes the millimeter-wave design aspects of the
DAT, e.g., the transformer modeling, circuit architecture, and
tuning of the DAT for optimum efficiency. This includes a dis-
cussion of parasitic effects that have a considerable influence on
the symmetry of the DAT impedance transformation ratio, its
large-signal compression, and its stability. Section III describes
the experimental results showing the large-signal compression
of the PA in the 59–64-GHz frequency range. Finally, conclu-
sions from the results are drawn in Section IV.
0018-9480/$25.00 © 2007 IEEE](https://image.slidesharecdn.com/ff161aa1-a20c-4757-931d-85368ce686c3-160524110616/85/55tmtt05pfeifferproof-1-320.jpg)
![IEEE
Proof
W
eb
Version
2 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
II. MILLIMETER-WAVE DAT
DATs, as described in [1], use two single-turn planar slab
inductors at 2.4 GHz to form a transformer where the primary
inductor is broken up into four quarter sections to facilitate
the connection of four synchronized push–pull amplifiers.
Each synchronized push–pull amplifier couples magnetically
to the same single turn primary inductor in such a way that
their alternating magnetic fluxes add constructively to form a
uniform circular current in the secondary winding. Since each
amplifier on the primary side utilizes only one quarter of the
primary inductor length, and not its full length, the impedance
transformation ratio is (1 : 4) instead of known
for a regular four-turn transformer.
Scaling the DAT topology from 2.4 GHz to millimeter-wave
frequencies imposes a series of challenges. Coplanar trans-
formers are typically used only at lower frequencies where
low coupling factors, substrate and skin effect losses, and
inaccuracies caused by model to hardware discrepancies can
be tolerated [2]. Monolithic on-chip transformers have been
widely used for matching and power-combining purposes in the
past up to a few tens of gigahertz, where the tuned circuits used
for matching have been formed by the transformer primary
inductances and additional capacitors to achieve the band-
width and efficiency required [20]. Commonly used on-chip
transformers are either made of inter-wound spiral inductors
or coplanar coupled wires (slab inductors) to promote mutual
magnetic coupling. In order to operate any transformer in the
millimeter-wave frequency range, its primary inductance has to
be reduced substantially, which, in turn, requires the values of
additional tuning capacitors to be extremely small. Therefore,
it is crucial to have a transformer or DAT structure that allows
accurate modeling and the prediction of parasitic effects. The
most important design challenges for millimeter-wave DATs
are: 1) the DAT requires well synchronized push–pull ampli-
fiers under all operating conditions to maintain the correct load
line impedance for each amplifier; 2) tuning of the DAT for
low loss and high efficiency requires accurate compact EM
modeling, as well as accurate parasitic extraction techniques;
and 3) nonidealities of the transformer such as its inter-winding
capacitance limit the scaling to higher frequencies and requires
optimized 1 : 1 transformer structures.
In the following, various design aspects of the DAT are de-
scribed. This includes a description of the transformer unit cell,
the DAT circuit architecture, a description of the input power
distribution network, the corner amplifier circuits, the compact
EM transformer modeling, the principle of active terminations,
the tuning of the DAT, parasitic effects at millimeter waves, as
well as scaling of the transformer to higher frequencies.
A. Transformer Unit Cell
Stacked transformers have an improved coupling factor on
silicon substrates than coplanar transformers. They can be ef-
fectively shielded from the lossy substrate with perpendicular
ground wires. Such wires do not allow longitudinal currents and,
therefore, do not change the inductance matrix and resulting
magnetic coupling [21], [22]. Stacked transformers can be used
for on-chip impedance transformation, power combining, RF
filters, and single-ended to differential conversion [23], [24].
Fig. 1. (a) Transformer cross section is shown with its primary and secondary
conductor above a ground shield. (b) 3-D view of the transformer from which
the ground shields perpendicular slots and side shields can be seen.
The transformer stack-up used in this paper is shown in
Fig. 1(a). The transformer is arranged in a “sandwich-like”
structure where the primary inductor is stacked vertically
above the secondary inductor. Both wires are located above
a ground shield and achieve a coupling factor of .
Fig. 1(b) shows a 3-D view of the transformer, which uses
a ground shield with perpendicular slots. To improve the
ability to predict the structures parasitic effects, side bars have
been added, which act as a well-defined return path, and a
closed environment EM condition for compact modeling at
millimeter-wave frequencies. Such modeling is scalable by
length and insensitive to close-by metal structures that may
be present dependent on the application and circuit layout,
an important feature that makes it a parametrized cell that
can be used in more complex DAT structures. Eight of these
identical unit cell transformers make up the full DAT structure,
as will be shown in Section II-B. The primary conductor uses
the 4- m-thick aluminum top metal layer (AM), whereas the
secondary conductor is on the 1.25- m-thick second aluminum
layer (LY). The ground shield with its slots orthogonal to wave
propagation and side bars collinear to wave propagation are on
a 0.5- m-thick copper layer (MQ). The transformer template
provides an extremely compact and optimized structure for
millimeter-wave operation. For example, its quality factor
for a 80- m-long transformer at 60 GHz is 32.
B. DAT Circuit Architecture
Fig. 2 shows a 3-D conceptual drawing of the DAT trans-
former structure. The simplified figure only shows the metal
shapes on the first three metal layers and omits the four dif-
ferential push–pull amplifiers in the corners for better clarity.
The DAT uses the thick top-level metal for the primary winding
and the second-level metal for the secondary winding. The dc
supply current for the push–pull amplifiers is supplied via a con-
nection in the center of the structure. A large via field in the
center connects a lower level 4-V power plane to ac grounds
in the center of the primary inductors on the top-level metal.
Note that the primary side is more susceptible to electromigra-
tion than the secondary side of the transformer since their pri-
mary inductor carries the amplifiers’ dc current in addition to its
primary RF current. The top-level metal is three times as thick](data:image/gif;base64,R0lGODlhAQABAIAAAAAAAP///yH5BAEAAAAALAAAAAABAAEAAAIBRAA7)