We present transmission of five users with 5 WDM × 4 TDM × 5 CODE channel on 3D
OCDMA system based on Model B using GF (5) with varying receiver attenuation at 1Gbps, 2 Gbps, 5Gbps and 10Gbps data rates on OPTSIM.
In OFDM-IDMA scheme, intersymbol interference (ISI) is resolved by the OFDM layer and multiple access interference (MAI) is suppressed by the IDMA layer at low cost . However OFDM-IDMA scheme suffers high peakto-average power ratio (PAPR) problem. For removing high PAPR problem a hybrid multiple access scheme SC-FDM-IDMA has been proposed. In this paper, bit error rate (BER) performance comparison of SC-FDM-IDMA scheme, OFDM-IDMA scheme and IDMA scheme have been duly presented. Moreover, the BER performance of various subcarrier mapping methods for SC-FDM-IDMA scheme as well as other results with variation of different parameters have also been demonstrated. Finally simulation result for BER performance improvement has been shown employing BCH code. All the simulation results demonstrate the suitability of SC-FDMIDMA scheme for wireless communication under AWGN channel environment.
Soft Decision Scheme for Multiple Descriptions Coding over Rician Fading Chan...CSCJournals
This paper presents a new MDC scheme for robust wireless data communications. The soft detection making of the MDC scheme utilises the statistical received data error obtained from channel decoding. The coded bit stream in the system is protected using either the Reed Solomon (RS) or Low Density Parity Check Codes (LDPC) channel coding scheme. Simulation results show that this system has some significant performance improvements over the single description or single channel transmission systems in terms of symbol error rate and peak signal-to-noise ratio PSNR. The system with RS codes is 2 to 5 dB better than single description. The system with LDPC channel codes is 6 to10 dB better than the single description.
In OFDM-IDMA scheme, intersymbol interference (ISI) is resolved by the OFDM layer and multiple access interference (MAI) is suppressed by the IDMA layer at low cost . However OFDM-IDMA scheme suffers high peakto-average power ratio (PAPR) problem. For removing high PAPR problem a hybrid multiple access scheme SC-FDM-IDMA has been proposed. In this paper, bit error rate (BER) performance comparison of SC-FDM-IDMA scheme, OFDM-IDMA scheme and IDMA scheme have been duly presented. Moreover, the BER performance of various subcarrier mapping methods for SC-FDM-IDMA scheme as well as other results with variation of different parameters have also been demonstrated. Finally simulation result for BER performance improvement has been shown employing BCH code. All the simulation results demonstrate the suitability of SC-FDMIDMA scheme for wireless communication under AWGN channel environment.
Soft Decision Scheme for Multiple Descriptions Coding over Rician Fading Chan...CSCJournals
This paper presents a new MDC scheme for robust wireless data communications. The soft detection making of the MDC scheme utilises the statistical received data error obtained from channel decoding. The coded bit stream in the system is protected using either the Reed Solomon (RS) or Low Density Parity Check Codes (LDPC) channel coding scheme. Simulation results show that this system has some significant performance improvements over the single description or single channel transmission systems in terms of symbol error rate and peak signal-to-noise ratio PSNR. The system with RS codes is 2 to 5 dB better than single description. The system with LDPC channel codes is 6 to10 dB better than the single description.
Lightweight hamming product code based multiple bit error correction coding s...journalBEEI
In this paper, we present multiple bit error correction coding scheme based on extended Hamming product code combined with type II HARQ using shared resources for on chip interconnect. The shared resources reduce the hardware complexity of the encoder and decoder compared to the existing three stages iterative decoding method for on chip interconnects. The proposed method of decoding achieves 20% and 28% reduction in area and power consumption respectively, with only small increase in decoder delay compared to the existing three stage iterative decoding scheme for multiple bit error correction. The proposed code also achieves excellent improvement in residual flit error rate and up to 58% of total power consumption compared to the other error control schemes. The low complexity and excellent residual flit error rate make the proposed code suitable for on chip interconnection links.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Design simulation and evaluation of siso miso mimo ofdm systemsIJLT EMAS
In this paper an endeavour is made to design and simulate SISO, MISO and MIMO OFDM systems. We have analysed and compared the performance of these systems for image transmission over AWGN and Rayleigh channels. The effect of LS channel estimation on the BER over a range of SNR for MIMO(2X2) systems is examined. We have also compared the performance based on various M-ary PSK modulation techniques for image transmission over Rayleigh channel in MIMO-OFDM system. The system performance is simulated in Matlab. The results of the simulation show that as the antenna diversity increases, the BER decreases and the channel capacity increases. Also, the BER obtained in MIMO-OFDM system is less when LS estimation is used.
Reduced Energy Min-Max Decoding Algorithm for Ldpc Code with Adder Correction...ijceronline
In this paper, high linear architectures for analysing the first two maximum or minimum values are of paramount importance in several uses, including iterative decoders. We proposed the adder and LDPC. The min-sum processing step that it gives only two different output magnitude values irrespective of the number of incoming bit-to check messages. These new micro-architecture layouts would employ the minimum number of comparators by exploiting the concept of survivors in the search. These would result in reduced number of comparisons and consequently reduced energy use. Multipliers are complex units and play an important role in finding the overall area, speed and power consumption of digital designs. By using the multiplier we can minimize the parameters like latency, complexity and power consumption.
In this paper, we propose and investigate the optimal tuning PID controller of unstable fractional order system by desired transient characteristics using the real interpolation method (RIM). The research shows that the main advantages of this method are drawn as the followings: 1) Carrying out an investigation of the stable region of coefficients of a PID controller using D-decomposition method; 2) Applying the method to investigate an unstable fractional order system.
In this paper, low linear architectures for analyzing the first two maximum or minimum values are of paramount importance in several uses, including iterative decoders. The min-sum giving out step is to that it produces only two diverse output magnitude values irrespective of the number of incoming bit-to check communication. These new micro-architecture structures would utilize the minimum number of comparators by exploiting the concept of survivors in the search. These would result in reduced number of comparisons and consequently reduced energy use. Multipliers are complex units and play an important role in finding the overall area, speed and power consumption of digital designs. By using the multiplier we can minimize the parameters like latency, complexity and power consumption. The decoding algorithms we propose generalize and unify the decoding schemes originally presented the product codes and those of low-density parity-check codes.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
A digital calibration algorithm with variable amplitude dithering for domain-...VLSICS Design
The pseudorandom noise dither (PN dither) technique is used to measure domain-extended pipeline
analog-to-digital converter (ADC) gain errors and to calibrate them digitally, while the digital error
correction technique is used to correct the comparator offsets through the use of redundancy bits. However,
both these techniques suffer from three disadvantages: slow convergence speed, deduction of the amplitude
of the transmitting signal, and deduction of the redundancy space. A digital calibration algorithm with
variable-amplitude dithering for domain-extended pipeline ADCs is used in this research to overcome these
disadvantages. The proposed algorithm is implemented in a 12-bit, 100 MS/s sample-rate pipeline ADC.
The simulation results illustrate both static and dynamic performance improvement after calibration.
Moreover, the convergence speed is much faster.
FPGA Implementation of Soft Output Viterbi Algorithm Using Memoryless Hybrid ...VLSICS Design
The importance of convolutional codes is well established. They are widely used to encode digital data before transmission through noisy or error-prone communication channels to reduce occurrence of errors and memory. This paper presents novel decoding technique, memoryless Hybrid Register Exchange with simulation and FPGA implementation results. It requires single register as compared to Register Exchange Method (REM) & Hybrid Register Exchange Method (HREM); therefore the data trans-fer operations and ultimately the switching activity will get reduced.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
FPGA IMPLEMENTATION OF SOFT OUTPUT VITERBI ALGORITHM USING MEMORYLESS HYBRID ...VLSICS Design
The importance of convolutional codes is well established. They are widely used to encode digital data before transmission through noisy or error-prone communication channels to reduce occurrence of errors and memory. This paper presents novel decoding technique, memoryless Hybrid Register Exchange with simulation and FPGA implementation results. It requires single register as compared to Register Exchange Method (REM) & Hybrid Register Exchange Method (HREM); therefore the data trans-fer operations and ultimately the switching activity will get reduced.
Accurate wireless channel modeling for efficient adaptive Forward Error Corre...IJERD Editor
In this paper, we evaluate the impact of accurate 802.11 based wireless channel modeling on the
efficiency of dynamic Forward Error Correction (FEC) schemes in Motion JPEG 2000 video streaming systems.
We derive a compromise on the suitable trace length for practical estimation of Packet Error Rate (PER) at
decoder side. We demonstrate the validity of the derived trade-off using a real JPEG 2000 based video streaming
system.
An efficient technique for out-of-band power reduction for the eliminated CP...IJECEIAES
The most dominant needs for the recent wireless mobile applications are higher bandwidth (BW) efficiency, higher energy efficiency higher quality of services (QOS). The main technique in 4G systems is OFDM but it suffers from some limitations such as large peak to average power ratio (PAPR), higher out-of-band (OOB) power radiation, and wasting bandwidth efficiency due to cyclic prefix (CP) extension. In his paper, these OFDM limitations will be reduced with low computational complexity compared to filter bank multicarriers (FBMC). The proposed scheme is based on symbol time compression (STC) for OFDM system. The proposed STC-Shaped system is achieved via interleaver-spreader and symbol shaper in the transmitter side in addition to equalization and combining processes in the receiver side. Comparative study between the proposed system and the conventional OFDM in case of additive white gaussian noise (AWGN) and COST 207 typical multipath fading channel will be presented. The numerical results show that the proposed STC-Shaped scheme reduces OOB significantly. The proposed scheme improves BER in multipath Rayleigh fading although it is without CP. Thus, the proposed system is more robust against inter symbol interference (ISI) compared to conventional OFDM system. Also, the numerical results show that the PAPR of the proposed system is decreased significantly and also, it is derived theoretically. Also, the proposed scheme overcomes CP extension, and hence increases the bandwidth (BW) efficiency. Finally, the computational complexity for the proposed scheme is derived and it has very low complexity compared to FBMC.
Lightweight hamming product code based multiple bit error correction coding s...journalBEEI
In this paper, we present multiple bit error correction coding scheme based on extended Hamming product code combined with type II HARQ using shared resources for on chip interconnect. The shared resources reduce the hardware complexity of the encoder and decoder compared to the existing three stages iterative decoding method for on chip interconnects. The proposed method of decoding achieves 20% and 28% reduction in area and power consumption respectively, with only small increase in decoder delay compared to the existing three stage iterative decoding scheme for multiple bit error correction. The proposed code also achieves excellent improvement in residual flit error rate and up to 58% of total power consumption compared to the other error control schemes. The low complexity and excellent residual flit error rate make the proposed code suitable for on chip interconnection links.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Design simulation and evaluation of siso miso mimo ofdm systemsIJLT EMAS
In this paper an endeavour is made to design and simulate SISO, MISO and MIMO OFDM systems. We have analysed and compared the performance of these systems for image transmission over AWGN and Rayleigh channels. The effect of LS channel estimation on the BER over a range of SNR for MIMO(2X2) systems is examined. We have also compared the performance based on various M-ary PSK modulation techniques for image transmission over Rayleigh channel in MIMO-OFDM system. The system performance is simulated in Matlab. The results of the simulation show that as the antenna diversity increases, the BER decreases and the channel capacity increases. Also, the BER obtained in MIMO-OFDM system is less when LS estimation is used.
Reduced Energy Min-Max Decoding Algorithm for Ldpc Code with Adder Correction...ijceronline
In this paper, high linear architectures for analysing the first two maximum or minimum values are of paramount importance in several uses, including iterative decoders. We proposed the adder and LDPC. The min-sum processing step that it gives only two different output magnitude values irrespective of the number of incoming bit-to check messages. These new micro-architecture layouts would employ the minimum number of comparators by exploiting the concept of survivors in the search. These would result in reduced number of comparisons and consequently reduced energy use. Multipliers are complex units and play an important role in finding the overall area, speed and power consumption of digital designs. By using the multiplier we can minimize the parameters like latency, complexity and power consumption.
In this paper, we propose and investigate the optimal tuning PID controller of unstable fractional order system by desired transient characteristics using the real interpolation method (RIM). The research shows that the main advantages of this method are drawn as the followings: 1) Carrying out an investigation of the stable region of coefficients of a PID controller using D-decomposition method; 2) Applying the method to investigate an unstable fractional order system.
In this paper, low linear architectures for analyzing the first two maximum or minimum values are of paramount importance in several uses, including iterative decoders. The min-sum giving out step is to that it produces only two diverse output magnitude values irrespective of the number of incoming bit-to check communication. These new micro-architecture structures would utilize the minimum number of comparators by exploiting the concept of survivors in the search. These would result in reduced number of comparisons and consequently reduced energy use. Multipliers are complex units and play an important role in finding the overall area, speed and power consumption of digital designs. By using the multiplier we can minimize the parameters like latency, complexity and power consumption. The decoding algorithms we propose generalize and unify the decoding schemes originally presented the product codes and those of low-density parity-check codes.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
A digital calibration algorithm with variable amplitude dithering for domain-...VLSICS Design
The pseudorandom noise dither (PN dither) technique is used to measure domain-extended pipeline
analog-to-digital converter (ADC) gain errors and to calibrate them digitally, while the digital error
correction technique is used to correct the comparator offsets through the use of redundancy bits. However,
both these techniques suffer from three disadvantages: slow convergence speed, deduction of the amplitude
of the transmitting signal, and deduction of the redundancy space. A digital calibration algorithm with
variable-amplitude dithering for domain-extended pipeline ADCs is used in this research to overcome these
disadvantages. The proposed algorithm is implemented in a 12-bit, 100 MS/s sample-rate pipeline ADC.
The simulation results illustrate both static and dynamic performance improvement after calibration.
Moreover, the convergence speed is much faster.
FPGA Implementation of Soft Output Viterbi Algorithm Using Memoryless Hybrid ...VLSICS Design
The importance of convolutional codes is well established. They are widely used to encode digital data before transmission through noisy or error-prone communication channels to reduce occurrence of errors and memory. This paper presents novel decoding technique, memoryless Hybrid Register Exchange with simulation and FPGA implementation results. It requires single register as compared to Register Exchange Method (REM) & Hybrid Register Exchange Method (HREM); therefore the data trans-fer operations and ultimately the switching activity will get reduced.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
FPGA IMPLEMENTATION OF SOFT OUTPUT VITERBI ALGORITHM USING MEMORYLESS HYBRID ...VLSICS Design
The importance of convolutional codes is well established. They are widely used to encode digital data before transmission through noisy or error-prone communication channels to reduce occurrence of errors and memory. This paper presents novel decoding technique, memoryless Hybrid Register Exchange with simulation and FPGA implementation results. It requires single register as compared to Register Exchange Method (REM) & Hybrid Register Exchange Method (HREM); therefore the data trans-fer operations and ultimately the switching activity will get reduced.
Accurate wireless channel modeling for efficient adaptive Forward Error Corre...IJERD Editor
In this paper, we evaluate the impact of accurate 802.11 based wireless channel modeling on the
efficiency of dynamic Forward Error Correction (FEC) schemes in Motion JPEG 2000 video streaming systems.
We derive a compromise on the suitable trace length for practical estimation of Packet Error Rate (PER) at
decoder side. We demonstrate the validity of the derived trade-off using a real JPEG 2000 based video streaming
system.
An efficient technique for out-of-band power reduction for the eliminated CP...IJECEIAES
The most dominant needs for the recent wireless mobile applications are higher bandwidth (BW) efficiency, higher energy efficiency higher quality of services (QOS). The main technique in 4G systems is OFDM but it suffers from some limitations such as large peak to average power ratio (PAPR), higher out-of-band (OOB) power radiation, and wasting bandwidth efficiency due to cyclic prefix (CP) extension. In his paper, these OFDM limitations will be reduced with low computational complexity compared to filter bank multicarriers (FBMC). The proposed scheme is based on symbol time compression (STC) for OFDM system. The proposed STC-Shaped system is achieved via interleaver-spreader and symbol shaper in the transmitter side in addition to equalization and combining processes in the receiver side. Comparative study between the proposed system and the conventional OFDM in case of additive white gaussian noise (AWGN) and COST 207 typical multipath fading channel will be presented. The numerical results show that the proposed STC-Shaped scheme reduces OOB significantly. The proposed scheme improves BER in multipath Rayleigh fading although it is without CP. Thus, the proposed system is more robust against inter symbol interference (ISI) compared to conventional OFDM system. Also, the numerical results show that the PAPR of the proposed system is decreased significantly and also, it is derived theoretically. Also, the proposed scheme overcomes CP extension, and hence increases the bandwidth (BW) efficiency. Finally, the computational complexity for the proposed scheme is derived and it has very low complexity compared to FBMC.
This paper presents a novel approach for completely test enable feature and low-voltage delta– sigma analog-to-digital (A/D) converters for cutting edge wireless applications. Oversampling feature of ADCs and DACs is enough to meet the requirement related to in-band and adjacent channel leakage ratio (ACLR) execution of 3G/4G portable radio. The quantization noise which is not filtered in ADC is addressed. We have achieved work power-optimization and test enable feature of oversampling ADC is uses in design and simulation so that the problem of quantization error in continues time sigma delta ADC is solved. This paper suggests support to designer for selecting appropriate topologies with various channel arrangements, number of bits and oversampling issues. A test enable feature of CT A/D is presented introducing the test signal generation (TSG) and the COrdinate Rotation Digital Computer (CORDIC) for evaluating the performance of ADC. This helps in addressing the challenge of 4G and upcoming 5G wireless radio. System level plan of a delta–sigma modulator ADC for 4G radios is studied.
A New Bit Split and Interleaved Channel Coding for MIMO DecoderIJARBEST JOURNAL
Authors:-C. Amar Singh Feroz1, S. Karthikeyan2, K. Mala3
Abstract– In wireless communications, the use of multiple antennas at both the
transmitter and receiver is a key technology to enable high data transmission without
additional bandwidth or transmit power. MIMO schemes are widely used in many
wireless standards, allowing higher throughput using spatial multiplexing techniques.
Bit split mapping based on JDD is designed. Here ETI coding is used for encoding and
Viterbi is used for decoding. Experimental results for 16-QAM and 64 QAM with the
code rate of ½ and 1/3 codes are shown to verify the proposed approach and to elucidate
the design tradeoffs in terms the BER performance. This bit split mapping based JDD
algorithm can greatly improve BER performance with different system settings.
Modified Golomb Code For Integer RepresentationIJSRD
In this computer age, all the computer applications handle data in the form of text, numbers, symbols and combination of all of them. The primary objective of data compression is to reduce the size of data while data needs to be stored and transmitted in the digital devices. Hence, the data compression plays a vital role in the areas of data storage and data transmission. Golomb code, which is a variable-length integer code, has been used for text compression, image compression, video compression and audio compression. The drawback of Golomb code is that it requires more bits to represent large integers if the divisor is small. Alternatively, Golomb code needs more bits to represent small integers if the divisor is large. This paper proposes Modified Golomb Code based on Golomb Code, Extended Golomb Code to represent small as well as large integers compactly for the chosen divisor. In this work, as an application of Modified Golomb Code, Modified Golomb Code is used with Burrows-Wheeler transform for text compression. The performances of Golomb Code and Modified Golomb Code are evaluated on Calcary corpus dataset. The experimental results show that the proposed code provides better compression rate than Golomb code on an average. The performance of the proposed code is also compared with Extended Golomb Codes (EGC). The comparison results show that the proposed code achieves significant improvement for the binary files of Calgary corpus comparing to EGC.
Hardware Architecture of Complex K-best MIMO DecoderCSCJournals
This paper presents a hardware architecture of complex K-best Multiple Input Multiple Output (MIMO) decoder reducing the complexity of Maximum Likelihood (ML) detector. We develop a novel low-power VLSI design of complex K-best decoder for MIMO and 64 QAM modulation scheme. Use of Schnorr-Euchner (SE) enumeration and a new parameter, Rlimit in the design reduce the complexity of calculating K-best nodes to a certain level with increased performance. The total word length of only 16 bits has been adopted for the hardware design limiting the bit error rate (BER) degradation to 0.3 dB with list size, K and Rlimit equal to 4. The proposed VLSI architecture is modeled in Verilog HDL using Xilinx and synthesized using Synopsys Design Vision in 45 nm CMOS technology. According to the synthesize result, it achieves 1090.8 Mbps throughput with power consumption of 782 mW and latency of 0.33 us. The maximum frequency the design proposed is 181.8 MHz.
Implementation of a bit error rate tester of a wireless communication system ...eSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology
Comparative study of selected subcarrier index modulation OFDM schemesTELKOMNIKA JOURNAL
Orthogonal frequency division multiplexing with subcarrier index modulation (SIM-OFDM) is recently proposed to enhance the performance of traditional OFDM. By incorporating the index modulation in OFDM, the data can be sent on the indices of subcarriers as well as the subcarriers themselves reducing the system complexity. In addition, the Peak to Average Power Ratio (PAPR) and Inter Carrier Interference (ICI) can be reduced by switching on /off some OFDM subcarriers in OOK fashion. In this paper, a comparative study of OFDM with SIM_OFDM and Enhanced SIM_OFDM methods in terms of complexity, spectral efficiency and bit error rate over AWGN channel using two power policies is presented. The simulation results showed that at bit error rate of 10-3, SIM_OFDM and ESIM_OFDM achieved gains in Eb/No of 1.1 dB and 2 dB over 4-QAM OFDM respectively under power reallocation policy. However, the results also showed that traditional OFDM has better spectral efficiency compared to both SIM_OFDM and ESIM_OFDM especially at high M-ary orders.
Design and Implementation of Encoder for (15, k) Binary BCH Code Using VHDL a...IOSR Journals
Abstract: In this paper we have designed and implemented(15, k) a BCH Encoder on FPGA using VHDL for reliable data transfers in AWGN channel with multiple error correction control. The digital logic implementation of binary encoding of multiple error correcting BCH code (15, k) of length n=15 over GF (24) with irreducible primitive polynomial x4+x+1 is organized into shift register circuits. Using the cyclic codes, the reminder b(x) can be obtained in a linear (15-k) stage shift register with feedback connections corresponding to the coefficients of the generated polynomial. Three encoder are designed using VHDL to encode the single, double and triple error correcting BCH code (15, k) corresponding to the coefficient of generated polynomial. Information bit is transmitted in unchanged form up to k clock cycles and during this period parity bits are calculated in the LFSR then the parity bits are transmitted from k+1 to 15 clock cycles. Total 15-k numbers of parity bits with k information bits are transmitted in 15 code word. Here we have implemented (15, 5, 3), (15, 7, 2) and (15, 11, 1) BCH code encoder on Xilinx Spartan 3 FPGA using VHDL and the simulation & synthesis are done using Xilinx ISE 13.3. BCH encoders are conventionally implemented by linear feedback shift register architecture. Encoders of long BCH codes may suffer from the effect of large fan out, which may reduce the achievable clock speed. The data rate requirement of optical applications require parallel implementations of the BCH encoders. Also a comparative performance based on synthesis & simulation on FPGA is presented. Keywords: BCH, BCH Encoder, FPGA, VHDL, Error Correction, AWGN, LFSR cyclic redundancy checking, fan out .
EE402B Radio Systems and Personal Communication Networks notesHaris Hassan
Programmes in which available:
Masters of Engineering - Electrical and Electronic
Engineering. Masters of Engineering - Electronic
Engineering and Computer Science. Master of Science -
Communication Systems and Wireless Networking.
Master of Science - Smart Telecom and Sensing
Networks. Master of Science - Photonic Integrated
Circuits, Sensors and Networks.
Simulation of 3 bit Flash ADC in 0.18μmTechnology using NG SPICE Tool for Hig...ijsrd.com
This paper provides the basic simulation result for the 3 bit flash type ADC in 0.18μm technology using the NG Spice device simulator tool. It includes two stages, first stage includes 7 comparators and second stage has a thermometer encoder. The simulation is done in NG spice tool developed by university of California at Berkeley (USA).The response time of the comparator and ADC are 3.7ns and 4.9ns respectively with 50.01μw power dissipation which makes the ADC more suitable for high speed application with lower power devices.
Similar to PERFORMANCE ANALYSIS OF TRANSMISSION OF 5 USERS BASED ON MODEL B USING GF (5) WITH VARYING BIT RATES FOR 3D OCDMA SYSTEM (20)
ANALYSIS OF LAND SURFACE DEFORMATION GRADIENT BY DINSAR cscpconf
The progressive development of Synthetic Aperture Radar (SAR) systems diversify the exploitation of the generated images by these systems in different applications of geoscience. Detection and monitoring surface deformations, procreated by various phenomena had benefited from this evolution and had been realized by interferometry (InSAR) and differential interferometry (DInSAR) techniques. Nevertheless, spatial and temporal decorrelations of the interferometric couples used, limit strongly the precision of analysis results by these techniques. In this context, we propose, in this work, a methodological approach of surface deformation detection and analysis by differential interferograms to show the limits of this technique according to noise quality and level. The detectability model is generated from the deformation signatures, by simulating a linear fault merged to the images couples of ERS1 / ERS2 sensors acquired in a region of the Algerian south.
4D AUTOMATIC LIP-READING FOR SPEAKER'S FACE IDENTIFCATIONcscpconf
A novel based a trajectory-guided, concatenating approach for synthesizing high-quality image real sample renders video is proposed . The lips reading automated is seeking for modeled the closest real image sample sequence preserve in the library under the data video to the HMM predicted trajectory. The object trajectory is modeled obtained by projecting the face patterns into an KDA feature space is estimated. The approach for speaker's face identification by using synthesise the identity surface of a subject face from a small sample of patterns which sparsely each the view sphere. An KDA algorithm use to the Lip-reading image is discrimination, after that work consisted of in the low dimensional for the fundamental lip features vector is reduced by using the 2D-DCT.The mouth of the set area dimensionality is ordered by a normally reduction base on the PCA to obtain the Eigen lips approach, their proposed approach by[33]. The subjective performance results of the cost function under the automatic lips reading modeled , which wasn’t illustrate the superior performance of the
method.
MOVING FROM WATERFALL TO AGILE PROCESS IN SOFTWARE ENGINEERING CAPSTONE PROJE...cscpconf
Universities offer software engineering capstone course to simulate a real world-working environment in which students can work in a team for a fixed period to deliver a quality product. The objective of the paper is to report on our experience in moving from Waterfall process to Agile process in conducting the software engineering capstone project. We present the capstone course designs for both Waterfall driven and Agile driven methodologies that highlight the structure, deliverables and assessment plans.To evaluate the improvement, we conducted a survey for two different sections taught by two different instructors to evaluate students’ experience in moving from traditional Waterfall model to Agile like process. Twentyeight students filled the survey. The survey consisted of eight multiple-choice questions and an open-ended question to collect feedback from students. The survey results show that students were able to attain hands one experience, which simulate a real world-working environment. The results also show that the Agile approach helped students to have overall better design and avoid mistakes they have made in the initial design completed in of the first phase of the capstone project. In addition, they were able to decide on their team capabilities, training needs and thus learn the required technologies earlier which is reflected on the final product quality
PROMOTING STUDENT ENGAGEMENT USING SOCIAL MEDIA TECHNOLOGIEScscpconf
Using social media in education provides learners with an informal way for communication. Informal communication tends to remove barriers and hence promotes student engagement. This paper presents our experience in using three different social media technologies in teaching software project management course. We conducted different surveys at the end of every semester to evaluate students’ satisfaction and engagement. Results show that using social media enhances students’ engagement and satisfaction. However, familiarity with the tool is an important factor for student satisfaction.
A SURVEY ON QUESTION ANSWERING SYSTEMS: THE ADVANCES OF FUZZY LOGICcscpconf
In real world computing environment with using a computer to answer questions has been a human dream since the beginning of the digital era, Question-answering systems are referred to as intelligent systems, that can be used to provide responses for the questions being asked by the user based on certain facts or rules stored in the knowledge base it can generate answers of questions asked in natural , and the first main idea of fuzzy logic was to working on the problem of computer understanding of natural language, so this survey paper provides an overview on what Question-Answering is and its system architecture and the possible relationship and
different with fuzzy logic, as well as the previous related research with respect to approaches that were followed. At the end, the survey provides an analytical discussion of the proposed QA models, along or combined with fuzzy logic and their main contributions and limitations.
DYNAMIC PHONE WARPING – A METHOD TO MEASURE THE DISTANCE BETWEEN PRONUNCIATIONS cscpconf
Human beings generate different speech waveforms while speaking the same word at different times. Also, different human beings have different accents and generate significantly varying speech waveforms for the same word. There is a need to measure the distances between various words which facilitate preparation of pronunciation dictionaries. A new algorithm called Dynamic Phone Warping (DPW) is presented in this paper. It uses dynamic programming technique for global alignment and shortest distance measurements. The DPW algorithm can be used to enhance the pronunciation dictionaries of the well-known languages like English or to build pronunciation dictionaries to the less known sparse languages. The precision measurement experiments show 88.9% accuracy.
INTELLIGENT ELECTRONIC ASSESSMENT FOR SUBJECTIVE EXAMS cscpconf
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patient’s dataset. After proper processing the fMRI data we use the processed data to form
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2. 98 Computer Science & Information Technology (CS & IT)
2. MATHEMATICAL MODEL
In Model B, OOC code is used to spread in time domain and is taken from literature C=
1011000100000 is a (13,4,1) code with c={0,2,3,7} where n=13,w=4 and λa = λc =1, coding
scheme of cubic congruent operator based on Table 1 is used for spreading in spectral domain and
coding scheme of linear congruent operator is used for spreading in spatial domain as shown in
Fig 1. The multiplicative inverse for GF (5) and. Cubic and linear Algebraic Congruent operators
values are given in table 1 and are defined by following equations [6]
( )( )( )pbnambansm mod)),,( 3
++= a= b=0 Cubic Congruent Operator Eq 1
[ ][ ])(mod)..(),,( pbanmbansm += a=1 & b=0 Linear Congruent Operator Eq 2
Where n and m are the indexes and elements of the Galois field and their values are expanded in
Table 1.
Fig. 1: Model B [1]
Table 1. Multiplicative Inverses for GF (5) and Sequences over GF (5) using cubic Algebraic Congruent
operator and linear algebraic congruent operator
3. 3D CODESET AND OCDMA SYSTEM
In accordance with Model B shown in Fig 1, the signature sequence is spreaded as follows. For
temporal spreading: Optical orthogonal code is taken from literature C= 1011000100000 is a
(13,4,1) code with c={0,2,3,7} where n=13,w=4 and λa = λc =1.here, n denotes length of the
codeword, w is the weight of the codes and λa &λc denotes auto correlation and cross correlation
constant [10]. For spectral hopping: codes from cubic congruent operator as calculated in Table 1,
from algebra theory are taken based on GF (5) and for spatial encoding codes from linear
congruent operator are taken based on GF (5) using Model B. These codes are expanded in Table
3.
3. Computer Science & Information Technology (CS & IT) 99
Table 2. Encoder and Decoder time delay values for variable bit rate systems
Table 3. Code Sequences
4. 100 Computer Science & Information Technology (CS & IT)
Table 4. System Parameters [6]
Simulation parameters: For 3D OCDMA system design, time delay for encoders and decoders
for variable data rate is calculated as under and is summarized in table 2.
The bit rate is taken as 1 Gbps for each channel and time slot is the length of the temporal codes.
In this simulation (13, 4, 1) OOC is taken for spreading in time domain.
Thus the bit period is calculated as:
Bit Period=1/Bit Rate =1/1e9= 1e-9 and Chip period=Bit Period/Time Slot
=1e-9/13 = .0769e-9.
Now the time delay lines for temporal code (1011000100000) [8] are calculated as
Time Delay lines for Encoder
t0 = 0×.0769e-9=0; t2=2×.0769e-9=.1538e-9
t3= 3×.0769e-9=.2307e-9; t7= 7×.0769e-9=.5384e-9
Inverse delay lines for Decoder
t13= 13×.0769e-9=.9997e-9; t11= 11×.0769e-9=.8459e-9
t10=10×.0769e-9=.7690e-9; t6=6×.0769e-9=.4614e-9
5. Computer Science & Information Technology (CS & IT) 101
Fig 2: Technology Demonstrator of 3D OCDMA system based on Model B
4. SIMULATION AND RESULTS
Table 4 shows the practical parameters that were taken while simulating the proposed 3D codeset
based on Model B using cubic and linear congruent operator with GF (5).Proposed System have 5
Operating wavelengths in C band i.e. λ1= 1550.0e-9m, λ2= 1550.8e-9m, λ3= 1551.6e-9m, λ4=
1552.4e-9m and λ5= 1553.2e-9m with variable repetition rate=1e9, 2e9 ,5e9 and 10e9 and peak
power= 1.0e-3 w of MLL (Laser). And Delta =.8e-9 (i.e. spacing between the wavelength) is
based on Dense Wavelength Division Multiplexing [9]. Fig 2 shows the snapshots of 3D
OCDMA, in OPTSIM Simulation Software.
This schematic evaluates the 3D OCDMA link with encoding/ decoding based on Model B with 5
users each transmitting at variable data rate coding based on Galois field GF (5) with cubic and
linear congruent operator and optical orthogonal codes.
Fig 3 through 6 shows the signal strength in terms of eye diagram, signal spectrum and auto
correlation function at 1Gbps, 2Gbps, 5Gbps and 10 Gbps data rates. These diagrams illustrate
that as the bit rate increases from 1Gbps to 10Gbps the eye diagram approaches towards close and
signal spectrum deteriorates.
The above said signals when passed to 3D OCDMA system results in successful transmission at
variable attenuation with data is given in Table 5 through 8, yellow marks in the table shows
minimum and maximum attenuation values and Figures 8 through 11 shows output signal
6. 102 Computer Science & Information Technology (CS & IT)
strength in terms of eye diagram and signal spectrum with data rates varying from 1 to 10 Gbps
with variable attenuation at each data rate.
Fig. 3. Input signals: eye diagram, signal spectrum and auto correlation function at 1Gbps
Fig.4. Input signals: eye diagram, signal spectrum and auto correlation function At 2 Gbps
Fig. 5. Input signals: eye diagram, signal spectrum and auto correlation function At 5 Gbps
Fig 6: Input signals: eye diagram, signal spectrum and auto correlation function At 10 Gbps
7. Computer Science & Information Technology (CS & IT) 103
Table 5. BER v/s Attenuation values at 1GBPS
Table 6. BER v/s Attenuation values at 2GBPS
Table 7. BER v/s Attenuation values at 5GBPS
Table 8. BER v/s Attenuation values at 10GBPS
Fig. 7. BER v/s Attenuation curve with varying Data Rate
BER v/s Attenuation curve with varying Data Rate is drawn in Fig 7. As clear from this figure, for each
data rate for example at 1Gbps, BER decreases as the attenuation at the front end of the receiver increases
shown in blue color, also if the simulation is run for different data rates, BER increases with the increase in
data rate with same attenuation .Output signals showing Eye diagram and signal spectrum with variable bit
rate and attenuation are shown in Fig 8 through 11.
1.00E-94
1.00E-85
1.00E-76
1.00E-67
1.00E-58
1.00E-49
1.00E-40
1.00E-31
1.00E-22
1.00E-13
1.00E-04
BitErrorRate
Attenuation in dB
BER v/s Atteuation curve with varying Data Rate
1Gbps
2Gbps
5Gbps
10Gbps
8. 104 Computer Science & Information Technology (CS & IT)
Fig. 8. Eye diagram and signal spectrum At 1 Gbps with attenuation -.2 &-2dB
Fig 9. : Eye diagram and signal spectrum At 2 Gbps with attenuation -.2 &-7dB
Fig. 10. Eye diagram and signal spectrum At 5 Gbps with attenuation -.2 &-5dB
Fig. 11 Eye diagram and signal spectrum At 10 Gbps with attenuation -.2 &-2.5dB
5. CONCLUSION
In this paper we have presented transmission of five users with 5 WDM × 4 TDM × 5 CODE channel on
3D OCDMA system based on Model B using GF (5) with varying receiver attenuation at 1Gbps, 2 Gbps,
5Gbps and 10Gbps data rate . At 1Gbps, BER decreases as the attenuation at the front end of the receiver
increases, for attenuation -.2 dB, Bit Error Rate is 1.9983e-092 and for attenuation of-2dB BER is 2.4898e-
005, also if the simulation is run for different data rates, BER increases with the increase in data rate with
same value of attenuation. This novel 3D OCDMA System based on code sequences generated trough
algebraic operators Supports transmission of maximum of five users with attenuation of-2.5dB at 10 Gbps
bit rate with BER 1.8277e-009.
9. Computer Science & Information Technology (CS & IT) 105
ACKNOWLEDGEMENT
We Acknowledge the Optical Communication Lab at Department of Electronics Electrical and
Communication Engineering, PEC University of Technology, Sector 12, Chandigarh was this
work has been carried out.
REFERENCES
[1] S. Jindal, N.Gupta, “A New Family of 3D code design using algebraic congruent operator for
OCDMA systems.”International Journal of Electronics & Telecommunication and In-strumentation
Engineering (IJETIE) ISSN 0974- 4975, Volume 3, pg 51-58.2010. (IF 2.)
[2] Jawad A Salehi ,“Code Division Multiple-Access Techniques in Optical Fiber Networks-Part I:
Fundamental Principles” IEEE Transactions on Communications, Volume 37, Number. 8, August
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[3] S Jindal, N Gupta “Exploration of Three Dimensional Codes Based on Model A and Model B Using
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202X Frequency: 4 issues per year Subject Category: Computer Networks Published by: International
Forum of Researchers Students and Academi-cian (IFRSA)
[4] S. Jindal, N.Gupta “Analysis of Multi Dimensional Codes for OCDMA System” CiiT In-ternational
Journals Print: ISSN 0974 – 9713 & Online: ISSN 0974 – 9616 (IF 0.569 Impact Factor Calculated
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NCE082012014
[5] S. Jindal, N.Gupta “Simulated Transmission of five users with 5 WDM × 4 TDM × 5 CODE at 50
Gbps 3D OCDMA system based on Model B using GF (5)” International Conference on Electrical
Engineering and Computer Science (ICEECS) organized By :
IIMT Bhumneshwar, 28th Oct 2012.
[6] Rsoft’s OptSim Models Reference Volume II Block Mode, 2010.
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ISBN 978-3-540-68445-9 Springer year 2009.
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[9] Govind P Aggarwal ,Lightwave Technology Telecommunication System, Wiley, 2005
[10] Karbassian Phd Thesis “Performance Analysis of Optical Code-Division Multiple-Access (OCDMA)
Networks” University of Birmingham May 2009
[11] S. Jindal, N.Gupta “Performance evaluation of optical CDMA based 3D Code with In-creasing Bit
Rate in Local Area Network” in IEEE Region 8, SIBIRCON-2008, and Inter-national Conference on
“Computational Technologies in Electrical and Electronics Engi-neering” Novosibirsk Scientific
Centre, Novosibirsk, Russia, held on July 21–25, 2008. Sponsored by IEEE Region 8, Russia, Pg 386-
388.
[12] S. Jindal, N.Gupta “Simulated Transmission Analysis of 2D and 3D OOC for Increasing the No. Of
Potential users” in 10th Anniversary International Conference on Transparent Optical Networks ,
ICTON 2008 organized by IEEE Athens, Greece, technical co-sponsorship by IEEE Lasers &
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10. 106 Computer Science & Information Technology (CS & IT)
Author Biography
Shilpa Jindal received B.Tech in Electronics and Communication Engineering in year
2003 (Hons.) by securing second position in Punjab Technical University, Jallandhar and
Silver Medal thereof. Then she completed M.E. in 2008 from PEC University of
Technology (Deemed University), Chandigarh, India. Her current areas of interest are
Communication Engineering, Optical Communication, Optical Networks, and Wireless
Communication. She Is a Regular Contributor to Various Technical Magazines,
Conferences And Journals.
Dr Neena Gupta is working as Associate Professor at PEC University of Technology in Electronics and
Electrical Communication Engineering Department. Her areas of interest are Communication, Optical/
Mobile, Wireless Communication, Digital Electronics. She is a member of IEEE and few other
organizations.