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Consume. Collaborate. Contribute.Consume. Collaborate. Contribute.
Power & Heat
ODSA Project Workshop
March 28, 2019
Ali Husain, ON Semiconductor
Consume. Collaborate. Contribute.
Topics
POC 1.0
• Power Distribution
• Power Conversion
• Thermal Budgeting
• Differential thermal expansion
(reliability)
FUTURE
• Active Interposer
• Integrate Passive Components
• PMIC Chiplets
Consume. Collaborate. Contribute.
Power Architecture
For Intel Cores, high power
input (>100A) at 1.8V
On-chip regulator converts from
1.8V → 0.9V (unregulated)
Digital & Analog Domains?
1.2/3.3V
1.8V
1.8V
0.9V
Consume. Collaborate. Contribute.
Power Architecture – Future?
• 3.3 or 5V input – local PMIC/chiplet
⎻ Use less power pins
⎻ Separate analog & digital domians
⎻ Need pins for passives
⎻ Conversion losses need to be
dissipated
• Active interposer
⎻ Technology
⎻ Heat Dissipation
⎻ Ground planes
⎻ Passives
5V
0.9V
1.8V1.2V
PMIC
0.9V
LDO 0.8V
Consume. Collaborate. Contribute.
Heat
• Thermal Budgeting
• Temperature Sensors
• Chiplet performance vs. temperature
• Local Heating Effects
→ Power/Thermal Management Controller
Consume. Collaborate. Contribute.
Chiplet Necessary Specifications
• Input Voltage
• Max & Typical Supply Current (workload vs. current)
• Rth to interposer, case
• Power limiting functionality, speed
• PMBus or SVID interface?
Consume. Collaborate. Contribute.

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ODSA Power and Heat

  • 1. Consume. Collaborate. Contribute.Consume. Collaborate. Contribute. Power & Heat ODSA Project Workshop March 28, 2019 Ali Husain, ON Semiconductor
  • 2. Consume. Collaborate. Contribute. Topics POC 1.0 • Power Distribution • Power Conversion • Thermal Budgeting • Differential thermal expansion (reliability) FUTURE • Active Interposer • Integrate Passive Components • PMIC Chiplets
  • 3. Consume. Collaborate. Contribute. Power Architecture For Intel Cores, high power input (>100A) at 1.8V On-chip regulator converts from 1.8V → 0.9V (unregulated) Digital & Analog Domains? 1.2/3.3V 1.8V 1.8V 0.9V
  • 4. Consume. Collaborate. Contribute. Power Architecture – Future? • 3.3 or 5V input – local PMIC/chiplet ⎻ Use less power pins ⎻ Separate analog & digital domians ⎻ Need pins for passives ⎻ Conversion losses need to be dissipated • Active interposer ⎻ Technology ⎻ Heat Dissipation ⎻ Ground planes ⎻ Passives 5V 0.9V 1.8V1.2V PMIC 0.9V LDO 0.8V
  • 5. Consume. Collaborate. Contribute. Heat • Thermal Budgeting • Temperature Sensors • Chiplet performance vs. temperature • Local Heating Effects → Power/Thermal Management Controller
  • 6. Consume. Collaborate. Contribute. Chiplet Necessary Specifications • Input Voltage • Max & Typical Supply Current (workload vs. current) • Rth to interposer, case • Power limiting functionality, speed • PMBus or SVID interface?