IDT adopted the NI Semiconductor Test System (STS) to lower the cost of testing its mixed-signal semiconductor devices. The traditional expensive automated test equipment required costly upgrades that provided unused capabilities. IDT had previously built its own test systems but they sacrificed benefits of commercial platforms. The open PXI architecture of the NI STS provided flexibility to reconfigure systems as needs evolved without replacing the entire platform. Using the NI STS, IDT increased test performance while reducing overall costs by retiring older difficult to support systems.
Design for reliability (DFR) is an industry-wide practice and a philosophy of considering reliability in an early stage of product design and development, to achieve a highly-reliable product while with sustainable cost. Physical of Failure (PoF) is recognized as a key approach of implementing DFR in a product design and development process. The author will present a case study to illustrate predicting and identifying product failure early in the design phase with the help of a quantitative PoF model based analysis tool.
Gary O'Gorman has over 14 years of experience with Emerson's DeltaV DCS. He has worked on numerous projects as a control system engineer and FDS author for companies like Zenith Technologies, Pfizer, GSK, Eli Lilly and more. His roles have included designing control strategies, configuring equipment modules, authoring procedures and supporting commissioning teams. He also has experience training others and implementing validation protocols.
The document discusses design for reliability (DFR) topics including the need for DFR, the DFR process, terminology, Weibull plotting, system reliability, DFR testing, and accelerated testing. It provides details on the DFR process, common reliability terminology such as reliability, failure rate, mean time to failure, and the bathtub curve. It also explains the exponential distribution and Weibull plotting, which are important reliability analysis tools.
Softsphere - Development for administratorsBill Buchan
This document provides guidance for administrators on development practices for applications in Lotus Notes/Domino. It discusses setting up separate development, test, and production environments to allow for proper change control and testing. It also covers deploying applications between these environments, including the use of release notes and a signing agent. The document then provides a brief introduction to @Formula and LotusScript for simple agents.
Rajeev Singh is a Principal QA Engineer with over 11 years of experience in QA testing and storage testing. He has extensive experience testing various storage arrays, servers, switches, and networking products. Some of his skills include testing SAN setups, multipathing, RAID configurations, and virtualization technologies like VMware. He is proficient in bug tracking, test planning and case development, and maintaining test environments.
Как выбрать оптимальную серверную архитектуру для создания высокоэффективных ЦОДNick Turunov
This document discusses the benefits of updating server infrastructure for businesses. It recommends refreshing servers every 3-4 years to improve energy efficiency and reduce support costs over time. The Intel Xeon 5500 series processors are presented as offering significant performance gains, lower power usage, and space savings compared to older single-core and dual-core servers when used for server refresh projects.
Design for reliability (DFR) is an industry-wide practice and a philosophy of considering reliability in an early stage of product design and development, to achieve a highly-reliable product while with sustainable cost. Physical of Failure (PoF) is recognized as a key approach of implementing DFR in a product design and development process. The author will present a case study to illustrate predicting and identifying product failure early in the design phase with the help of a quantitative PoF model based analysis tool.
Gary O'Gorman has over 14 years of experience with Emerson's DeltaV DCS. He has worked on numerous projects as a control system engineer and FDS author for companies like Zenith Technologies, Pfizer, GSK, Eli Lilly and more. His roles have included designing control strategies, configuring equipment modules, authoring procedures and supporting commissioning teams. He also has experience training others and implementing validation protocols.
The document discusses design for reliability (DFR) topics including the need for DFR, the DFR process, terminology, Weibull plotting, system reliability, DFR testing, and accelerated testing. It provides details on the DFR process, common reliability terminology such as reliability, failure rate, mean time to failure, and the bathtub curve. It also explains the exponential distribution and Weibull plotting, which are important reliability analysis tools.
Softsphere - Development for administratorsBill Buchan
This document provides guidance for administrators on development practices for applications in Lotus Notes/Domino. It discusses setting up separate development, test, and production environments to allow for proper change control and testing. It also covers deploying applications between these environments, including the use of release notes and a signing agent. The document then provides a brief introduction to @Formula and LotusScript for simple agents.
Rajeev Singh is a Principal QA Engineer with over 11 years of experience in QA testing and storage testing. He has extensive experience testing various storage arrays, servers, switches, and networking products. Some of his skills include testing SAN setups, multipathing, RAID configurations, and virtualization technologies like VMware. He is proficient in bug tracking, test planning and case development, and maintaining test environments.
Как выбрать оптимальную серверную архитектуру для создания высокоэффективных ЦОДNick Turunov
This document discusses the benefits of updating server infrastructure for businesses. It recommends refreshing servers every 3-4 years to improve energy efficiency and reduce support costs over time. The Intel Xeon 5500 series processors are presented as offering significant performance gains, lower power usage, and space savings compared to older single-core and dual-core servers when used for server refresh projects.
This document discusses a cost effective RF MEMS wafer test solution using PXI hardware. Some key points:
1) PXI provides a flexible test platform that can handle both device characterization and high-volume production testing, reusing the same software and reducing costs compared to separate benchtop and ATE solutions.
2) A motherboard and daughterboard hardware solution is proposed, allowing up to 16 RF MEMS switches to be tested in various configurations with low non-recurring engineering costs.
3) Initial test results show the system can accurately measure low resistances. The solution aims to meet production testing needs at a lower capital expenditure compared to traditional automatic test equipment.
STS is Bridging Semiconductor Test from the Lab to ProductionHank Lydick
NI aims to bridge the gap between semiconductor design, lab characterization, and production testing. Currently, different tools, methods, and databases are used at each stage, making it difficult to reproduce failures and correlate results. NI's solution is to use a common PXI and LabVIEW platform from characterization through production. This allows test cases developed in the lab to be reused in production, improves debugging and productivity across stages, and helps accelerate the path to validating chips and production testing.
NI Delivers Next-Generation Test Systems with PXIHank Lydick
The document discusses how NI's PXI platform addresses the needs of next-generation test systems across several markets, including wireless production test, semiconductor characterization, and semiconductor production test. It highlights examples of customers in these markets reducing their test costs and times by 50% or more by leveraging the high-performance and flexible PXI hardware along with NI's powerful algorithm and test management software.
The document discusses National Instruments' (NI) semiconductor test system (STS) for high volume manufacturing at IDT. It provides an overview of IDT's tester evolution from off-the-shelf to a hybrid to NI's STS platform. The STS uses modular PXI instrumentation in a scalable tester family with excellent AC performance for testing IDT's precision timing devices.
Ideal 3D Stacked Die Test - IEEE Semiconductor Wafer Test Workshop SWTW 2013Ira Feldman
My presentation from IEEE SWTW 2013 - For a full description please see my blog:
http://hightechbizdev.com/2013/06/10/ira-feldman-high-technology-business-development-ieee-semiconductor-wafer-test-workshop-2013/
The document discusses the basics of semiconductor memories. It explains that memory controllers establish information flow between memory and the CPU. Memory buses connect memory to the controller. Newer systems have frontside and backside buses connecting different components. During boot-up, the BIOS and operating system are loaded from ROM and hard drive into RAM for fast access by the CPU. Applications and files are also loaded into and removed from RAM as needed. The document compares different types of volatile and non-volatile memory in terms of speed, size, and cost.
Learn NI STS tester at Univiversity of FloridaHank Lydick
This document outlines the course syllabus for EEE 4930/5934 Mixed Signal IC Test I, Spring 2016. The course will cover fundamentals of testing integrated circuits and mixed-signal systems through lectures, labs, homework, and exams. Topics include test specifications, parametric testing, measurement accuracy, test hardware, and more. Labs will focus on testing passive components, voltage regulators, op-amps, and mixed-signal ICs using National Instruments testing equipment and LabVIEW. The course is taught by Professor Byul
The NI Semiconductor Test System (STS) provides a compact and cost-effective solution for semiconductor production testing. The STS houses all the key components of a production tester, including instrumentation, software, and device interfacing, inside an enclosed test head. This eliminates extra floor space and costs compared to traditional semiconductor testers. The modular and scalable STS design accommodates varying testing needs and allows for upgrading of components over time. It utilizes NI's PXI instrumentation and LabVIEW/TestStand software to enable efficient development and deployment of test programs for applications such as RFIC and mixed-signal testing.
Greenlight is manufacturing test software that allows hundreds of storage devices to be tested simultaneously and efficiently on production lines. It provides independent testing threads for each device and controls OakGate's Storage Validation Framework engine. Greenlight has intuitive interfaces optimized for both operators and engineers, allowing ease of use and full test capabilities. It also includes a software development kit and is portable across different hardware vendors and environments.
Advanced Verification Methodology for Complex System on Chip VerificationVLSICS Design
This document describes an advanced verification methodology for complex system on chip verification. Key aspects of the methodology include:
1. Using constructs like sequencers, virtual sequencers, configuration databases, and channels to enable code reuse and reduce time to market.
2. Developing a reusable test bench architecture with components like drivers, monitors, agents, and an environment class.
3. Implementing a coverage-driven verification approach using phases like build, connect, end-of-elaboration, and run, along with self-checking scoreboards.
4. Applying the methodology resulted in 95% code coverage for verifying a communication system on chip design, with the methodology taking less time than alternatives like system
The most popular National Instruments Semiconductor Test System (STS) enclosure for production test is the T2, not the T1 as some may assume. The T2 enclosure, which has two bays for PXI instruments, provides twice the capacity as the T1 enclosure with a only 25% higher acquisition cost. This small increase in upfront cost is offset by the benefits of avoiding delays and limitations that could arise from running out of space in the smaller T1 enclosure for testing new devices. While the T1 may be sufficient for characterization and sample testing, the T2 is favored for production testing as it provides flexibility to adapt to changing test needs over time without constraints on the number of instruments that can be used.
Ceph Day LA: Building your own disaster? The safe way to make Ceph storage re...Ceph Community
The document discusses making Ceph storage enterprise ready with the ETERNUS CD10k integrated storage solution from Fujitsu. Key points include:
- ETERNUS CD10k combines Ceph open source storage software with enterprise-class quality of service through features like unlimited scalability, an immortal system with zero downtime upgrades, and optimized total cost of ownership.
- It integrates tightly with OpenStack through the Fujitsu GUI for unified management of the complete Ceph and hardware stack.
- Fujitsu has also contributed improvements to Ceph performance and erasure coding through techniques like their mSHEC erasure code and optimizations identified through profiling tools like LTTng.
Ceph Day Chicago - Brining Ceph Storage to the Enterprise Ceph Community
The document discusses improving Ceph storage performance. It identifies ThreadPool::WorkThread as a hot spot and proposes coalescing calls to omap_setkeys to reduce latency. Benchmarking shows this reduces latency in WorkThread by 23% and overall CPU usage by 9%. Other areas for optimization like lock analysis are also discussed.
Automated infrastructure as a service testing with VMware NSXJustin Sider
This document discusses testing infrastructure as a service using VMware NSX. It presents a scenario where an organization wants to test migrating their database from Microsoft SQL Server to Oracle without downtime or risk to production. The document proposes using NSX to build a duplicate test environment that is isolated from production, where the migration can be tested safely. It advocates for an approach called test-driven IaaS that fully automates testing any time code or infrastructure changes are made. This helps ensure high quality, avoids outages, and allows comprehensive testing of scenarios and upgrades before deploying to production.
Tinius Olsen has developed scalable technology blocks to automate tensile, compression, flexural, impact, melt flow and hardness tests.
Capable of testing up to 1000+ specimens in a 24 hour period, saving time and making money.
Tinius Olsen automated materials testing systems are designed with ambition for ambition, for those who are clear on making a focused investment to get a step change in productivity in the test lab to match the performance of their manufacturing or processes capability, delivering test results instantaneously posttest to the teams that need them. Results reported in accordance with the relevant test standard be it ISO, ASTM, JIS, GB or GOST standard.
Web: https://www.tiniusolsen.com/tinius-olsen-products/automated-system
Extended QA testing to enhance productivity of a leading networking solution ...Veryx Technologies
This case study showcase show Veryx Technologies enabled a global industrial ethernet solution provider to meet their targets by providing extended QA testing
STS Characterization to Production TestHank Lydick
The document discusses bridging the gap between RF front-end module characterization and production testing. It describes how NI's semiconductor test system (STS) uses a common PXI hardware and software platform to allow characterization and production teams to use the same instrumentation and share test data, reducing time to market. The STS integrates RF and non-RF instruments into an enclosed test head and supports various wireless standards and RF measurements.
Automated Test Equipment’s (ATEs) are integrated systems which automate the process of testing modules, systems, devices or products. Test equipment are generally used to monitor and control the operation of a process or device, verify compliance standards, and detect and mitigate risks.
Automation test bed at offshore to optimize cost, effort and timing for a wor...Mindtree Ltd.
Mindtree helped a world leader in networking technology perform testing more efficiently by using an automation framework to reduce effort and accelerate timelines. By leveraging offshore delivery we further helped to reduce testing costs incurred by the customer.
vegaTest® is a tool-agnostic test automation framework developed by DST Worldwide Services to enable business users and analysts to develop automated test scripts without extensive technical knowledge. It uses a keyword-driven approach with test data and scripts configured in Microsoft Excel. This reduces script development time by 30-60% compared to conventional approaches. It also lowers script maintenance effort and allows test scripts to work across different automation tools with only minimal changes. Customers have saved over $800,000 in development costs using vegaTest®.
Brian Aldridge is an information technology professional with over 14 years of experience in test engineering, systems administration, and project management. He has expertise in areas such as test software development, fibre channel networks, SAN implementation, and iOS deployment. Aldridge holds a Bachelor's degree in Management Information Systems and has worked for several companies, most recently as a Senior Test Engineer at GENCO managing test engineering activities.
The document describes Cogent ATE's Leopard A Series Analog and Mixed-Signal Test System. It aims to provide low-cost, high-performance multi-site testing through its Floating Quad-Site Testing architecture. This allows independent testing of up to 4 devices simultaneously while avoiding interference through electrically isolated test sites. The system supports a wide range of analog and mixed-signal devices and can scale from single-site to multi-site testing through its Automatic Test Replication technology.
This document discusses a cost effective RF MEMS wafer test solution using PXI hardware. Some key points:
1) PXI provides a flexible test platform that can handle both device characterization and high-volume production testing, reusing the same software and reducing costs compared to separate benchtop and ATE solutions.
2) A motherboard and daughterboard hardware solution is proposed, allowing up to 16 RF MEMS switches to be tested in various configurations with low non-recurring engineering costs.
3) Initial test results show the system can accurately measure low resistances. The solution aims to meet production testing needs at a lower capital expenditure compared to traditional automatic test equipment.
STS is Bridging Semiconductor Test from the Lab to ProductionHank Lydick
NI aims to bridge the gap between semiconductor design, lab characterization, and production testing. Currently, different tools, methods, and databases are used at each stage, making it difficult to reproduce failures and correlate results. NI's solution is to use a common PXI and LabVIEW platform from characterization through production. This allows test cases developed in the lab to be reused in production, improves debugging and productivity across stages, and helps accelerate the path to validating chips and production testing.
NI Delivers Next-Generation Test Systems with PXIHank Lydick
The document discusses how NI's PXI platform addresses the needs of next-generation test systems across several markets, including wireless production test, semiconductor characterization, and semiconductor production test. It highlights examples of customers in these markets reducing their test costs and times by 50% or more by leveraging the high-performance and flexible PXI hardware along with NI's powerful algorithm and test management software.
The document discusses National Instruments' (NI) semiconductor test system (STS) for high volume manufacturing at IDT. It provides an overview of IDT's tester evolution from off-the-shelf to a hybrid to NI's STS platform. The STS uses modular PXI instrumentation in a scalable tester family with excellent AC performance for testing IDT's precision timing devices.
Ideal 3D Stacked Die Test - IEEE Semiconductor Wafer Test Workshop SWTW 2013Ira Feldman
My presentation from IEEE SWTW 2013 - For a full description please see my blog:
http://hightechbizdev.com/2013/06/10/ira-feldman-high-technology-business-development-ieee-semiconductor-wafer-test-workshop-2013/
The document discusses the basics of semiconductor memories. It explains that memory controllers establish information flow between memory and the CPU. Memory buses connect memory to the controller. Newer systems have frontside and backside buses connecting different components. During boot-up, the BIOS and operating system are loaded from ROM and hard drive into RAM for fast access by the CPU. Applications and files are also loaded into and removed from RAM as needed. The document compares different types of volatile and non-volatile memory in terms of speed, size, and cost.
Learn NI STS tester at Univiversity of FloridaHank Lydick
This document outlines the course syllabus for EEE 4930/5934 Mixed Signal IC Test I, Spring 2016. The course will cover fundamentals of testing integrated circuits and mixed-signal systems through lectures, labs, homework, and exams. Topics include test specifications, parametric testing, measurement accuracy, test hardware, and more. Labs will focus on testing passive components, voltage regulators, op-amps, and mixed-signal ICs using National Instruments testing equipment and LabVIEW. The course is taught by Professor Byul
The NI Semiconductor Test System (STS) provides a compact and cost-effective solution for semiconductor production testing. The STS houses all the key components of a production tester, including instrumentation, software, and device interfacing, inside an enclosed test head. This eliminates extra floor space and costs compared to traditional semiconductor testers. The modular and scalable STS design accommodates varying testing needs and allows for upgrading of components over time. It utilizes NI's PXI instrumentation and LabVIEW/TestStand software to enable efficient development and deployment of test programs for applications such as RFIC and mixed-signal testing.
Greenlight is manufacturing test software that allows hundreds of storage devices to be tested simultaneously and efficiently on production lines. It provides independent testing threads for each device and controls OakGate's Storage Validation Framework engine. Greenlight has intuitive interfaces optimized for both operators and engineers, allowing ease of use and full test capabilities. It also includes a software development kit and is portable across different hardware vendors and environments.
Advanced Verification Methodology for Complex System on Chip VerificationVLSICS Design
This document describes an advanced verification methodology for complex system on chip verification. Key aspects of the methodology include:
1. Using constructs like sequencers, virtual sequencers, configuration databases, and channels to enable code reuse and reduce time to market.
2. Developing a reusable test bench architecture with components like drivers, monitors, agents, and an environment class.
3. Implementing a coverage-driven verification approach using phases like build, connect, end-of-elaboration, and run, along with self-checking scoreboards.
4. Applying the methodology resulted in 95% code coverage for verifying a communication system on chip design, with the methodology taking less time than alternatives like system
The most popular National Instruments Semiconductor Test System (STS) enclosure for production test is the T2, not the T1 as some may assume. The T2 enclosure, which has two bays for PXI instruments, provides twice the capacity as the T1 enclosure with a only 25% higher acquisition cost. This small increase in upfront cost is offset by the benefits of avoiding delays and limitations that could arise from running out of space in the smaller T1 enclosure for testing new devices. While the T1 may be sufficient for characterization and sample testing, the T2 is favored for production testing as it provides flexibility to adapt to changing test needs over time without constraints on the number of instruments that can be used.
Ceph Day LA: Building your own disaster? The safe way to make Ceph storage re...Ceph Community
The document discusses making Ceph storage enterprise ready with the ETERNUS CD10k integrated storage solution from Fujitsu. Key points include:
- ETERNUS CD10k combines Ceph open source storage software with enterprise-class quality of service through features like unlimited scalability, an immortal system with zero downtime upgrades, and optimized total cost of ownership.
- It integrates tightly with OpenStack through the Fujitsu GUI for unified management of the complete Ceph and hardware stack.
- Fujitsu has also contributed improvements to Ceph performance and erasure coding through techniques like their mSHEC erasure code and optimizations identified through profiling tools like LTTng.
Ceph Day Chicago - Brining Ceph Storage to the Enterprise Ceph Community
The document discusses improving Ceph storage performance. It identifies ThreadPool::WorkThread as a hot spot and proposes coalescing calls to omap_setkeys to reduce latency. Benchmarking shows this reduces latency in WorkThread by 23% and overall CPU usage by 9%. Other areas for optimization like lock analysis are also discussed.
Automated infrastructure as a service testing with VMware NSXJustin Sider
This document discusses testing infrastructure as a service using VMware NSX. It presents a scenario where an organization wants to test migrating their database from Microsoft SQL Server to Oracle without downtime or risk to production. The document proposes using NSX to build a duplicate test environment that is isolated from production, where the migration can be tested safely. It advocates for an approach called test-driven IaaS that fully automates testing any time code or infrastructure changes are made. This helps ensure high quality, avoids outages, and allows comprehensive testing of scenarios and upgrades before deploying to production.
Tinius Olsen has developed scalable technology blocks to automate tensile, compression, flexural, impact, melt flow and hardness tests.
Capable of testing up to 1000+ specimens in a 24 hour period, saving time and making money.
Tinius Olsen automated materials testing systems are designed with ambition for ambition, for those who are clear on making a focused investment to get a step change in productivity in the test lab to match the performance of their manufacturing or processes capability, delivering test results instantaneously posttest to the teams that need them. Results reported in accordance with the relevant test standard be it ISO, ASTM, JIS, GB or GOST standard.
Web: https://www.tiniusolsen.com/tinius-olsen-products/automated-system
Extended QA testing to enhance productivity of a leading networking solution ...Veryx Technologies
This case study showcase show Veryx Technologies enabled a global industrial ethernet solution provider to meet their targets by providing extended QA testing
STS Characterization to Production TestHank Lydick
The document discusses bridging the gap between RF front-end module characterization and production testing. It describes how NI's semiconductor test system (STS) uses a common PXI hardware and software platform to allow characterization and production teams to use the same instrumentation and share test data, reducing time to market. The STS integrates RF and non-RF instruments into an enclosed test head and supports various wireless standards and RF measurements.
Automated Test Equipment’s (ATEs) are integrated systems which automate the process of testing modules, systems, devices or products. Test equipment are generally used to monitor and control the operation of a process or device, verify compliance standards, and detect and mitigate risks.
Automation test bed at offshore to optimize cost, effort and timing for a wor...Mindtree Ltd.
Mindtree helped a world leader in networking technology perform testing more efficiently by using an automation framework to reduce effort and accelerate timelines. By leveraging offshore delivery we further helped to reduce testing costs incurred by the customer.
vegaTest® is a tool-agnostic test automation framework developed by DST Worldwide Services to enable business users and analysts to develop automated test scripts without extensive technical knowledge. It uses a keyword-driven approach with test data and scripts configured in Microsoft Excel. This reduces script development time by 30-60% compared to conventional approaches. It also lowers script maintenance effort and allows test scripts to work across different automation tools with only minimal changes. Customers have saved over $800,000 in development costs using vegaTest®.
Brian Aldridge is an information technology professional with over 14 years of experience in test engineering, systems administration, and project management. He has expertise in areas such as test software development, fibre channel networks, SAN implementation, and iOS deployment. Aldridge holds a Bachelor's degree in Management Information Systems and has worked for several companies, most recently as a Senior Test Engineer at GENCO managing test engineering activities.
The document describes Cogent ATE's Leopard A Series Analog and Mixed-Signal Test System. It aims to provide low-cost, high-performance multi-site testing through its Floating Quad-Site Testing architecture. This allows independent testing of up to 4 devices simultaneously while avoiding interference through electrically isolated test sites. The system supports a wide range of analog and mixed-signal devices and can scale from single-site to multi-site testing through its Automatic Test Replication technology.
This presentation shows the business concept developped by 6TL Engineering called FastATE. With this concept you can develop and build your test system in a more efficient and faster way. It is possible to save up to 75% in time using the FastATE building blocks.
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...Soham Mondal
Identified huge error count and US$1.7M excess expense in product engineering and product development; Spearheaded from scratch product roadmap and end-to-end engineering and deployment of a custom novel software for automatic creation of error-free verification infrastructure for a customizable Network-interconnect, across 6 global teams, saved 70+ man hours per integration and testing cycle and reduced time-to-first-test by 60%, resulting in an estimated annual savings of US$4.5M in purchased product licenses and 100% reduction in error-count in engineering process. Enabled a 4-member cross-cultural global team in Seoul for 6+ months for E2E-auto-testbench product during its’ adoption, prototype testing, and life cycle. Conducted 120+ user interviews, market analysis, customer research to define key product requirements for new features resulting in 100% user adoption, 80% increase in user satisfaction. Received appreciation award from VP of Engineering, Samsung Memory Solutions.
Disclaimer: - The slides presented here are a minimised version of the actual detailed content/implementation/publication presented to the stakeholders.
If the originals are needed, they will be provided based on mutual agreement.
(All Rights Reserved)
A Unique Test Bench for Various System-on-a-Chip IJECEIAES
This paper discusses a standard flow on how an automated test bench environment which is randomized with constraints can verify a SOC efficiently for its functionality and coverage. Today, in the time of multimillion gate ASICs, reusable intellectual property (IP), and system-ona-chip (SoC) designs, verification consumes about 70 % of the design effort. Automation means a machine completes a task autonomously, quicker and with predictable results. Automation requires standard processes with welldefined inputs and outputs. By using this efficient methodology it is possible to provide a general purpose automation solution for verification, given today’s technology. Tools automating various portions of the verification process are being introduced. Here, we have Communication based SOC The content of the paper discusses about the methodology used to verify such a SOC-based environment. Cadence Efficient Verification Methodology libraries are explored for the solution of this problem. We can take this as a state of art approach in verifying SOC environments. The goal of this paper is to emphasize the unique testbench for different SOC using Efficient Verification Constructs implemented in system verilog for SOC verification.
This document provides a summary of Laird Snowden's experience and qualifications. It includes contact information, a performance summary, and lists membership in professional organizations. The bulk of the document describes Snowden's extensive experience in semiconductor testing and new product introduction, including bringing fabrication facilities online, developing automated test equipment, improving yield, and reducing test time. It highlights experience at companies including Bell Labs, AT&T, TriQuint, and Silicon Labs.
National Instruments' cofounder reflects on 40 years in test and measurement and discusses the future of the industry. Key points:
- NI helped transition the industry from hardware-focused to software-centric, with tools like LabVIEW and the philosophy that "the software is the instrument."
- Moore's Law and parallel computing allowed NI to leverage advances in hardware to continually improve software tools and deliver more value.
- Emerging technologies like IoT, wireless, and data analytics will further drive the industry, and NI is well-positioned with its software-centric approach and ecosystem of partners.
The document describes an RFIC test system from NI for characterizing and testing power amplifiers and front-end modules. The system provides solutions for digital pre-distortion, envelope tracking, and power amplifier characterization. It uses PXI modular instruments along with application software and example programs to automate testing of power amplifiers.
Charlie has been greeting a customer at a family-owned pump service business for 41 years, showing the business's commitment to both employees and customers. The encounter reminded the customer of the history of semiconductor testing from research labs to mass production, which began around the same time Charlie started at the pump business in the late 1970s. The customer pondered what semiconductor testing equipment may look like 70 years in the future, guessing it will be an open modular platform controlled by graphical software.
NI is a company that provides platform-based systems for test and measurement and embedded control and monitoring. Their platforms include PXI, CompactRIO, and LabVIEW software. These platforms provide modular and flexible solutions that span the design flow from design to production. Customers in industries like semiconductor testing have been able to significantly improve test speeds, coverage, and reduce development times using NI's solutions compared to traditional instrumentation. NI is focusing on growing markets like industrial internet of things, wireless infrastructure testing, and smart machines.
Study NI STS tester at University of FloridaHank Lydick
This document outlines the syllabus for a course on mixed signal integrated circuit testing, including contact information for the professor and teaching assistant, course goals of understanding analog and digital circuit testing, topics to be covered such as parametric testing, data analysis, and labs using test equipment, and requirements including homework, exams, and use of an online course platform.
This document summarizes the curriculum developed for a graduate course on advanced modular testing methods for integrated circuits. The course was designed to train students on how to properly utilize a state-of-the-art semiconductor test system donated to the university. The curriculum covers key topics like probability and statistics, solid state physics, testing strategies, pin mapping, and using National Instruments TestStand and semiconductor test modules. The goal is for students to gain skills needed for industry test standards and semiconductor product engineering jobs. Assessment of the initial course offerings showed students achieved the expected learning outcomes of understanding modular testing concepts and learning to use the test equipment and software.
This document discusses improving the flexibility and usability of semiconductor test equipment donated to Texas Tech University. The current setup has limitations for student projects, which aim to test a variety of devices. A new interface board was designed to allow testing more pin configurations with simplified setup. It incorporates relays to route signals from measurement modules to device pins. Additional daughter boards provide breakouts for different device packages. The goal is to enable a wider scope of student testing projects with easier access to the donated National Instruments Semiconductor Test System.
The document discusses how PXI-based test systems are providing complete solutions to meet the increased testing demands of advanced devices. It describes how standards like LTE and 802.11ac have made testing of RF power amplifiers more complex by requiring support for techniques like digital pre-distortion and envelope tracking. It then provides examples of PXI test solutions from National Instruments, Keysight, and LitePoint that are designed to automate testing of power amplifiers implementing these techniques through modular instrumentation and software. It also discusses a PXI-based semiconductor test system from National Instruments for production testing of RF integrated circuits.
The document discusses the increasing adoption of PXI (PCI eXtension for Instrumentation) modular test systems as devices become more complex and traditional instrumentation is no longer able to meet evolving test requirements. PXI offers benefits like flexibility, scalability, speed, and a large portfolio of modules that make it well-suited for applications requiring high precision and specification like wireless testing. Its adoption is accelerating, with a projected compound annual growth rate of 17.6% over the next few years. PXI can be customized to meet the needs of emerging applications in communications, semiconductor testing, and the Internet of Things.
STS. Smarter devices. Smarter test systems.Hank Lydick
This document provides an overview of trends in automated test and measurement. It discusses how semiconductor companies are using real-time data analytics to reduce manufacturing test costs by harvesting production test data. It also discusses how test management software is becoming more important for handling new programming languages. Additionally, it discusses how RFIC companies are reusing IP and standardizing hardware to reduce costs and time to market across the product design cycle from characterization to production.
This document provides an agenda for the GAIN Superior Business and Technical Insight Through Strategic Collaboration conference taking place August 3-4, 2015 in Austin, Texas. The agenda includes keynote speeches, panel discussions, and breakout sessions on aerospace, automotive, and semiconductor topics. Attendees can network and learn about novel test strategies, reducing costs, and how new technologies impact various industries.
This document discusses trends in automated test systems and strategies. It covers topics like harvesting production test data through real-time analytics, challenges of life-cycle management for long-term projects due to software obsolescence and compatibility issues, and how off-the-shelf test executives can help address the influx of new programming languages. It also discusses standardizing platforms across product design cycles to reduce costs, and adopting modular solutions to validate high-frequency components economically.
This document provides information about the NIDays 2015 conference in Singapore hosted by National Instruments. It includes an overview of the event, highlights of keynote speakers and sessions, the full agenda, and information about sponsors and exhibitors. The event will feature over 15 hours of technical sessions across various tracks including measurements, automated testing, and embedded systems. There will also be a keynote on using a platform-based approach to create the Internet of Things, as well as a session highlighting customer success stories. Attendees can learn new techniques, network with peers, and see demonstrations of the latest technologies.
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The Semiconductor Test System (STS) provides fully integrated RF test capability for testing RF front-end ICs with production-ready test systems. The STS combines NI's PXI platform, TestStand software, and LabVIEW inside an enclosed test head for RF measurements. Key features include a configurable multiport RF subsystem built around the NI vector signal transceiver for integrated RF testing, flexibility to scale from characterization to production, and world-class support from NI.
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IDT Lowers Cost of Test by Adopting the NI Semiconductor Test System
Author(s):
Glen E. Peer - Integrated Device Technology Inc.
IDT creates a wide range of mixed-signal semiconductor solutions from low-power to high-performance devices. A worldwide leader in timing devices (clock ICs), IDT offers a broad
portfolio for networking and communications, consumer, and computing applications.
As the performance of IDT’s devices increases, it becomes more difficult to maintain the pace in the production test environment. Traditional ATE systems capable of meeting our
high-performance measurement requirements are expensive and often include extra capabilities that are not used but add to the cost. Additionally, within the traditional ATE
environment, upgrading a tester to improve its performance often requires upgrading to the next-generation test platform and phasing out the current platform. This is both expensive
and wasteful because a large portion of the engineering investment made during previous generations can be lost.
To combat this, we typically engineer our own solutions on top of our installed base of test systems. Having used various models from nearly every ATE vendor, we have become
proficient at extending the useful life span of these ATE platforms while controlling costs and enhancing our measurement capabilities.
Evolution of Test
The evolution of test within the timing business unit at IDT is the perfect example of this approach. We began with an off-the-shelf, high-dollar ATE system. Soon we realized that this
approach was too expensive, so we built our own internal test system(s). These homegrown systems met our high-performance requirements but sacrificed some of the benefits of
using a commercial platform such as high parallelism and external support. We therefore migrated to a hybrid of these two approaches and combined a low-cost commercial ATE
system with our own performance enhancement system (see Figure 1).
"Traditional ATE systems require major costly retooling efforts on the
test floor as generations of test systems become obsolete or unable to
meet new test requirements, but the nature of the open PXI architecture
of the STS helps us retain our original investment and build upon it,
rather than throw it away. It provides the flexibility we need to
reconfigure and grow our test platforms in parallel with our growing
performance needs."
- Glen E. Peer, Integrated Device Technology Inc.
The Challenge:
Keeping pace with continuously increasing test performance requirements in a fast moving environment where device
performance is constantly pushing the limits of ATE system capabilities and thereby accelerating tester obsolescence and driving
test costs higher.
The Solution:
Using the open PXI architecture of the NI Semiconductor Test System (STS) to achieve the flexibility we needed and the ability to
reconfigure and grow our test platforms in parallel with our rising performance needs as well as build on our original investment
rather than throw it away like with traditional ATE systems, which generally require major costly retool of the test floor as
generations of test systems advance.
Using the NI STS, we not only increased our test
performance but reduced our overall cost of test
by retiring older, difficult to support and maintain
test systems.
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Figure 1. We combined a low-cost commercial ATE system with our own enhancement system.
This methodology worked well, but we eventually faced hardware obsolescence that required replacing our chosen ATE and, therefore, a system redesign. Secondly, though our
hybrid approach was successful from an engineering and performance perspective, it was not always production friendly. In general, as novel engineering enhancements get “bolted”
onto ATE systems, the systems become more difficult to support in high-volume manufacturing. Adding cables, hardware, and sometimes device under test boards with extravagant
electronics to ATE systems increases the potential for possible failure points in high-volume manufacturing environments.
The most ideal solution is to create or find a test platform with an open architecture that allows users to build on their investments from the tester rather than through bolt-onwithin
enhancements or reinvestments in high-dollar big iron ATE. We needed an architecture that was resistant to hardware obsolescence and could be reinvented as technology
improved. The NI STS provided this architecture.
The NI STS’s PXI platform is perfectly suited to solve these problems. The system offers multiple PXI chassis inside a tester mainframe to offer expansion capabilities so the user
can add enhanced test features the tester itself. The PXI open standard gives users the flexibility to select instruments from a variety of vendors based on their needs insteadwithin
of from the limited choices of a single ATE hardware vendor.
The NI STS works well for IDT as the natural extension of our tester evolution. With it, we can continue to build high-performance, low-cost test platforms using only the modules and
components we need to meet our performance targets. The open architecture of the NI STS makes this even easier.
During the past year of NI STS deployment at IDT, we have already enhanced the systems from their original configuration to meet our evolving test needs. Through careful planning
during the startup phase, we ensured that despite these enhancements, these systems maintained 100 percent backward compatibility with the initial target solution(s). All of our
initial investment was preserved as we expanded the testers to enable a broader usage base throughout IDT.
The Benefits of Using an NI Solution
We took advantage of many benefits to using NI solutions. First, unlike our previous hybrid approach, we could consolidate the test head, which reduced the number of potential
failure points within manufacturing, downtime for maintenance and repair, and floor space requirements. We also increased our ability to test a wide range of devices with the same
configuration because the system has interchangeable interface boards, and we can use the same tester configuration for different device types. The multisite system allows for
higher test throughput because it is a true parallel test system with high-accuracy performance parameters for hardware optimization. Lastly, this solution was lower in cost compared
to alternative integrated solutions because we needed to build only one set of instrumentation and we had fewer individual systems to maintain.
Growing for the Future
The NI STSs installed on IDT’s production test floor run 24/7. We have experienced test time reductions in the 10 percent to 25 percent range, enhanced our measurement capability
and accuracy, and cleaned up our footprint on the test floor, which made our testers much more production friendly. Using the NI STS, we not only increased our test performance
but reduced our overall cost of test by retiring older, difficult to support and maintain test systems. Some of these older systems had expensive power and cooling requirements, but
the NI STSs simply plug into any 110 V outlet with no extra facilities required. Hourly test costs per unit on these older systems were as much as twice that of the NI STS.
Additionally, our NI STSs provide high-performance measurement features across multiple test sites with true parallel test capabilities to further reduce the cost of test.
The NI STS is a scalable tester family with models available using one (STS T1), two (STS T2) and four (STS T4) internal PXI chassis. We designed our NI STS beginning with the
T2 model with upgrades and enhancements in mind. The ability to grow our test platforms in response to our own needs is one of the strongest selling points of these systems.
Previously, it was difficult or impossible to share test systems across internal business units, but we now have other teams evaluating our NI STS. These groups’ test needs are
different from those that our systems are currently configured to handle, but with the open architecture of the PXI platform, these users can add capabilities to the original IDT system
definition, which we’ve already proven in production.
Though no single ATE platform is ideal for all situations, for the first time we see the possibility of maintaining an ATE platform that can be reconfigured and reused across multiple
business units through the simple swapping of interface boards or internal instrumentation modules. With the NI STS, we believe we can define one or two system configurations and
use these systems on our production test floor to satisfy the different needs of all the businesses within IDT. We designed our NI STSs so that we can simply swap interface boards
to enable various hardware configurations as required. This ability will greatly simplify our overall test operations and help further drive down the total cost of test.
Finally, we can break away from the big iron ATE vendors and their hardware obsolescence cycles and determine the best test strategy based on our own overall needs. Our current
and future investments in test hardware and software are preserved and reusable for the foreseeable future.
Figure 2. NI STS Scalable Tester Family
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Figure 3. NI STSs Running Production Test Within IDT’s Manufacturing Facility
Figure 4. Propagation Delay Repeatability Testing
Figure 5. Output Skew Repeatability Testing
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Author Information:
GlenE. Peer
Integrated Device Technology Inc.
Using the NI STS, we not only increased our test performance but reduced our overall cost of test by retiring older, difficult to support and maintain test systems.
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Using the NI STS, IDT not only increased our test performance but reduced our overall cost of test by retiring older, difficult to support and maintain test systems.
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Chips feed through a gravity fed chip handler that is attached to the STS.
STS system hard docking to handler.
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The STS includes powerful software that provides tools to develop, debug and deploy test programs. With the STS operator interface, you can easily select, run, and view key test program data all
on one powerful interface.
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