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Misbah Ramadan, Graduate Student,Technion
- 1. May 9, 2016 1 Programmingand Controlling Uniformity in Multi-Level-Cell ReRAM May 9, 2016 Misbah Ramadan Shahar Kvatinsky Ran Ginosar Andrew & Erna Viterbi Faculty of Electrical Engineering, Technion
- 2. May 9, 2016 2 ResistiveRAM Memristor - Memory Element 𝑽 𝒓𝒔𝒕𝑽 𝒔𝒆𝒕 𝑹 𝒐𝒏 ′𝟏′ -+ 𝑽 𝒓𝒔𝒕/𝑽 𝒔𝒆𝒕 -+ SA 𝑽 𝒓𝒆𝒂𝒅 𝑅 𝑟𝑒𝑓 𝑹 𝒐𝒇𝒇 ′𝟎′ Program Read
- 3. May 9, 2016 3 Multi-LevelCapability 0 50 100 150 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Voltage Resistance Time Pulse Programming Voltage Resistance ROFF -> ’00’ RON -> ’11’ ’10’ ’01’ Small voltage pulses 𝒑𝒖𝒍𝒔𝒆 𝟏 𝒑𝒖𝒍𝒔𝒆 𝟐 𝒑𝒖𝒍𝒔𝒆 𝟑 𝑹𝒆𝒔𝒊𝒔𝒕𝒂𝒏𝒄𝒆 𝑹 𝒐𝒏 𝑹 𝒐𝒇𝒇 ′𝟎𝟎′ ′𝟏𝟎′ ′𝟎𝟏′ ′𝟏𝟏′ Multi Level Capability
- 4. May 9, 2016 4 Memristorsare Non-Linear • The resistance transition under Constant Voltage Stress (CVS) is non-linear! S. Kvatinsky et al. , “TEAM: ThrEshold Adaptive Memristor Model”, IEEE TCAS I, Jan 2013 Level 0 Level 1 Level 2 Level 3 Non-uniform level distribution Identical Pulse ProgrammingTiN-HfO2-Pt vs. TEAM model
- 5. May 9, 2016 5 ProcessVariation Imperfections in the fabrication process ReRAM cells deviate from each other Each level is a resistance range instead of a deterministic value Identical voltage pulses = Non-uniform level distribution Overlapping region Motivation Uniform level distribution
- 6. May 9, 2016 6 OvercomingNon-Linearity in Memristors Higher resistance levels suffer from slower transition rate Compensating for the slow transition rate by modifying programming pulses Incremental Length Pulse Programming Incremental Magnitude Pulse Programming Uniform level distribution achieved ! Level 0 Level 1 Level 2 Level 3 Level 0 Level 1 Level 2 Level 3
- 7. May 9, 2016 7 ILPPvs. IMPP Both programming methods control uniformity of levels by modifying program voltage pulses ILPP IMPP Increases program latency Increases program energy Demand of supporting multiple voltage levels Latency vs. Energy Tradeoff
- 8. May 9, 2016 8 ILPPvs. IMPP Impact on resistance distribution Uniformity of resistance levels is achieved BUT Fast cells will transit even faster ! R Dens. R Dens. R Dens. R Dens. R Dens. R Dens. Tighter resistance distribution control is desired Wide resistance distribution Limited capacity
- 9. May 9, 2016 9 Programand Verify Apply narrow voltage pulse Done 𝑹 𝒄𝒆𝒍𝒍 𝑹 𝒄𝒆𝒍𝒍 = 𝑹𝒍𝒆𝒗𝒆𝒍 𝒊 ? Increase amplitude Yes No • Program cells selectively • Slow cells require more programming pulses • Controls tighter resistance distribution Cong Xu et. al. “Understanding the Trade-Offs in Multi-Level Cell ReRAM Memory Design”, IEEE DAC, 2013
- 10. May 9, 2016 10 Programand Verify Insights • The verify operation requires the activation of the sense-amplifiers • Increases programming energy and complexity • Latency might be increased, depending on the latency of the verify operations High percision control Latency & EnergyTradeoff
- 11. May 9, 2016 11 - + readV SASASA - + programV 1BLEn 2BL En 3BL En Controller WrEn -+ rEn VerifyV SASASA Increasing Performance in ReRAM • Reading and Programming operations can be performed in parallel to WL Parallel Read 𝑾𝑳 𝟏 𝑾𝑳 𝟐 𝑾𝑳 𝟑 𝑩𝑳 𝟏 𝑩𝑳 𝟐 𝑩𝑳 𝟑 - + programV 1BL En 2BL En 3BL En Parallel Program (ILPP,IMPP) Parallel Program (Program and Verify) Program Verify
- 12. May 9, 2016 12 CurrentResearch Modify voltage pulses according to the memristor’s state Modify pulses online 𝑹 𝒄𝒆𝒍𝒍 Identical pulses reduce complexity Modified pulses control uniformity
- 13. May 9, 2016 13 PreliminaryResults Modify Level 0 Level 1 Level 2 Level 3
- 14. May 9, 2016 14 Summary •Different programming methods to control uniformity ILPP IMPP Program and Verify Controls Uniformity Controls tighter resistance distribution • Memristor allow the design of MLC memories • Memristors are non-linear
- 15. May 9, 2016 15 ThankYou Any Questions?