Microprocessor Based Systems Design
           (EEE 432)

     F Mashuque Alamgir (FMA)
   email: mashukalamgir@gmail.com
Computer Hardware Organization
   CPU
  Registers            RAM | ROM

               program           data

                 storage        storage




                  Control, data, address bus

    ALU




   Control
    unit
              output                input
               unit                  unit
Registers

• Register is a storage location in the CPU
• Used to hold data/address during execution of
  an instruction
• Registers have faster access time than memory
• Number of registers available for programming
  varies from µP to µP
Arithmetic Logic Unit (ALU)

• ALU does all arithmetic and logical operations
• ALU receives data from registers/memory and
  performs the task
• ALU writes the result back to register/memory
Control unit
• Contains hardware instruction logic
• Decodes and monitors execution of
  instructions
       CPU
      Registers              RAM | ROM
                      program              data
                       storage           storage




                         Control, data, address bus
        ALU



       Control
        unit                                 input
                    output
                     unit                      unit
Bus
 • Wires through which data and information
   are interchanged between units
 • Three types of bus (more later):
   - Address bus - Data bus - Control bus
         CPU
        Registers                 RAM | ROM
                           program              data
                            storage           storage




                              Control, data, address bus
          ALU



         Control
          unit                                    input
                         output
                          unit                      unit
Program counter(PC)
• Register within CPU
• Holds the address of the next instruction to
  be fetched from memory
• Goes through step by step counting
  sequence - causes the computer to read
  successive instruction stored in memory
• PC is modified with new address when there
  is a jump or transfer or subroutine call
  instruction
• example
Program counter (PC)
  CPU                             Program memory
                                      Data memory
      A                                 Stack
       B

Status register
      IX
     SP
     PC




                  Control, data, address bus
    ALU




 Control unit
Status register
• After an ALU operation following can occur
      -carry/borrow for addition/subtraction
      -overflow
      -result zero, negative or positive
• Register which contains flags to indicate these
  status of any processor operation
• Programmer can use these status condition for
  program control
• example
Flags
• Carry flag
  00110101
  01000011
001111000
               Carry 0

 10000010
 10100011
100100101
               Carry 1
Index register

• Almost all µPs have an index register
• Holds a base address to be added to an
  offset
• Base address and the offset forms the
  effective address
• example
Index register
                      Effective
                      address          Program
  CPU                                  memory

                                           Data
                       Offset             memory
      A
                      address
       B

Status register          +
                       Base                   Stack
      IX              address

     SP
     PC




                                  Control, data, address bus
   ALU




 Control unit
Stack pointer (SP)
• An area of RAM used for temporary storage of
  data/return address is called stack
• SP is a register within CPU that points to the
  next free location on the stack
• Each time a byte is put onto stack, SP is
  decremented
• Each time a byte is retrieved from stack, SP is
  incremented
• example
Stack pointer
  CPU                                        Program memory
                                                  Data memory
      A                                              Stack
       B

Status register
      IX
     SP
     PC




                            Control, data, address bus
    ALU




  Control unit
Stack pointer

       A
       B
 Status register
      IX           0044                                 0044




                                                                                stack pointer
      SP           0045                                 0045
      PC           0046                                 0046




                                        stack pointer
                   0047                                 0047
                   0048                                 0048                     0048
                   0049                                 0049      value #2
      ALU          004A                                 004A      value #1



   Control unit           RAM before PUSH                      RAM after PUSH
Stack pointer

0044                                    0044
0045                    stack pointer   0045
0046                        0046        0046                   stack pointer
0047      value #4                      0047                       0047
0048      value #3                      0048     value #3
0049      value #2                      0049     value #2
004A      value #1                      004A     value #1




       RAM before POP                          RAM after POP
Instruction set
• To program a µP, a variety of data manipulation,
  arithmetic and logical instructions are featured for a
  processor
• Instructions can be organised into functional groups
       -Data movement -Arithmetic
       -Logical            -Bit manipulation
       -Shift/rotate       -Branch/Jump
       -Subroutine call -Interrupt handling
       -Miscellaneous
• More detail later (for a specific processor)
Addressing modes
• To perform an operation, operands are to be
  supplied
• Operands can come from registers, memory
  locations or directly as part of an instruction
• Addressing mode says from where the
  operands come from
• Very common addressing modes are
  -Immediate, direct, inherent, relative,
  indexed (more detail later)
Memory
Random Access Memory (RAM)
• SRAM: static RAM – uses bipolar transistors
  (4-6) and very fast but expensive
• DRAM: dynamic RAM – uses one transistor
  and one capacitor – information stored in
  capacitor – periodic refresh operation required
Memory

Read Only Memory (ROM)
• Mask-programmed read-only memory (MROM):
  programmed when being manufactured
• Programmable read-only memory (PROM): the
  memory chip can be programmed by the end user
   – EPROM: programmable memory that can be
     erased
   – EEPROM: programmable memory that can be
     erased by electrical signals and reprogrammed
Program
• A program is sequence of instructions
• A program can be written in
  – Low level language e.g. assembly language
  – High level language e.g. C, PASCAL
• Assembly language program is converted to
  machine code by an assembler
• High level language is translated into
  machine code by a compiler
Application of Microprocessor
HC11 Data transfer instruction
• Data transfer from memory to register
  LDAA <opr>           A ← [M]
  LDAB <opr>           B ← [M]
  LDD      <opr>       D ← [M: M+1]
  LDX      <opr>       IXH ← [M] , IXL ← [M+1]
  LDY      <opr>
  LDS      <opr>        SPH ← [M] , SPL ← [M+1]
  <opr> can be immediate, direct, extended, or index mode
  Examples
  LDAA $10
  LDX      #$1000
Data transfers from register to
              memory
• STAA <M> ;Transfer contents of A to M; M ← [A]
• STAB <M> ;Transfer contents of B to M; M ← [B]
• STD <M> ;Transfer contents of D to M; M:M+1 ← [D]
Data transfers from register to
               register
•   TBA   ; Transfer contents of B to A; A ← [B]
•   TAB   ; Transfer contents of A to B; B ← [A]
•   TAP   ; Transfer contents of A to CCR; CCR ← [A]
•   TPA   ; Transfer contents of CCR to A; A ← [CCR]
Example Program
Exercise 1: Load data into register and store it onto memory location
 .area text
_main::
 LDAA #$06       ; Loads accumulator A with hex value 6;
                 ; This is written as A← 06
 STAA $2025 ;Stores the content of accumulator A on to memory
                 ;location $2025, $2025 ← [A]
 LDAB $2025 ; Loads accumulator B with the contents of memory
                 ;location $2025, B←[$2025]
 STAB $1064 ; Stores the content of accumulator B on to memory
                 ; location $1064, $1064 ← [B]
 SWI             ; Returns to monitor
Example Program
Exercise 2: Data exchange between registers

.area text
_main::
LDAB #$03        ; B ← $03
TBA              ; Transfer contents of B to A; A ← [B]
STAA $1064       ; Store contents of A onto location $1064, $1064 ← [A]
SWI
Example Program
Exercise 3: Addition of two numbers

.area text
_main::
LDAB #$02       ; B ←$02
STAB $2025      ; $2025 ← [B]
LDAA #$01       ; A← $01
ADDA $2025      ; A←[A] + [$2025]
STAA $1064       ; $1064 ← [A]
SWI

MICROPROCESSOR

  • 1.
    Microprocessor Based SystemsDesign (EEE 432) F Mashuque Alamgir (FMA) email: mashukalamgir@gmail.com
  • 2.
    Computer Hardware Organization CPU Registers RAM | ROM program data storage storage Control, data, address bus ALU Control unit output input unit unit
  • 3.
    Registers • Register isa storage location in the CPU • Used to hold data/address during execution of an instruction • Registers have faster access time than memory • Number of registers available for programming varies from µP to µP
  • 4.
    Arithmetic Logic Unit(ALU) • ALU does all arithmetic and logical operations • ALU receives data from registers/memory and performs the task • ALU writes the result back to register/memory
  • 5.
    Control unit • Containshardware instruction logic • Decodes and monitors execution of instructions CPU Registers RAM | ROM program data storage storage Control, data, address bus ALU Control unit input output unit unit
  • 6.
    Bus • Wiresthrough which data and information are interchanged between units • Three types of bus (more later): - Address bus - Data bus - Control bus CPU Registers RAM | ROM program data storage storage Control, data, address bus ALU Control unit input output unit unit
  • 7.
    Program counter(PC) • Registerwithin CPU • Holds the address of the next instruction to be fetched from memory • Goes through step by step counting sequence - causes the computer to read successive instruction stored in memory • PC is modified with new address when there is a jump or transfer or subroutine call instruction • example
  • 8.
    Program counter (PC) CPU Program memory Data memory A Stack B Status register IX SP PC Control, data, address bus ALU Control unit
  • 9.
    Status register • Afteran ALU operation following can occur -carry/borrow for addition/subtraction -overflow -result zero, negative or positive • Register which contains flags to indicate these status of any processor operation • Programmer can use these status condition for program control • example
  • 10.
    Flags • Carry flag 00110101 01000011 001111000 Carry 0 10000010 10100011 100100101 Carry 1
  • 11.
    Index register • Almostall µPs have an index register • Holds a base address to be added to an offset • Base address and the offset forms the effective address • example
  • 12.
    Index register Effective address Program CPU memory Data Offset memory A address B Status register + Base Stack IX address SP PC Control, data, address bus ALU Control unit
  • 13.
    Stack pointer (SP) •An area of RAM used for temporary storage of data/return address is called stack • SP is a register within CPU that points to the next free location on the stack • Each time a byte is put onto stack, SP is decremented • Each time a byte is retrieved from stack, SP is incremented • example
  • 14.
    Stack pointer CPU Program memory Data memory A Stack B Status register IX SP PC Control, data, address bus ALU Control unit
  • 15.
    Stack pointer A B Status register IX 0044 0044 stack pointer SP 0045 0045 PC 0046 0046 stack pointer 0047 0047 0048 0048 0048 0049 0049 value #2 ALU 004A 004A value #1 Control unit RAM before PUSH RAM after PUSH
  • 16.
    Stack pointer 0044 0044 0045 stack pointer 0045 0046 0046 0046 stack pointer 0047 value #4 0047 0047 0048 value #3 0048 value #3 0049 value #2 0049 value #2 004A value #1 004A value #1 RAM before POP RAM after POP
  • 17.
    Instruction set • Toprogram a µP, a variety of data manipulation, arithmetic and logical instructions are featured for a processor • Instructions can be organised into functional groups -Data movement -Arithmetic -Logical -Bit manipulation -Shift/rotate -Branch/Jump -Subroutine call -Interrupt handling -Miscellaneous • More detail later (for a specific processor)
  • 18.
    Addressing modes • Toperform an operation, operands are to be supplied • Operands can come from registers, memory locations or directly as part of an instruction • Addressing mode says from where the operands come from • Very common addressing modes are -Immediate, direct, inherent, relative, indexed (more detail later)
  • 19.
    Memory Random Access Memory(RAM) • SRAM: static RAM – uses bipolar transistors (4-6) and very fast but expensive • DRAM: dynamic RAM – uses one transistor and one capacitor – information stored in capacitor – periodic refresh operation required
  • 20.
    Memory Read Only Memory(ROM) • Mask-programmed read-only memory (MROM): programmed when being manufactured • Programmable read-only memory (PROM): the memory chip can be programmed by the end user – EPROM: programmable memory that can be erased – EEPROM: programmable memory that can be erased by electrical signals and reprogrammed
  • 21.
    Program • A programis sequence of instructions • A program can be written in – Low level language e.g. assembly language – High level language e.g. C, PASCAL • Assembly language program is converted to machine code by an assembler • High level language is translated into machine code by a compiler
  • 22.
  • 23.
    HC11 Data transferinstruction • Data transfer from memory to register LDAA <opr> A ← [M] LDAB <opr> B ← [M] LDD <opr> D ← [M: M+1] LDX <opr> IXH ← [M] , IXL ← [M+1] LDY <opr> LDS <opr> SPH ← [M] , SPL ← [M+1] <opr> can be immediate, direct, extended, or index mode Examples LDAA $10 LDX #$1000
  • 24.
    Data transfers fromregister to memory • STAA <M> ;Transfer contents of A to M; M ← [A] • STAB <M> ;Transfer contents of B to M; M ← [B] • STD <M> ;Transfer contents of D to M; M:M+1 ← [D]
  • 25.
    Data transfers fromregister to register • TBA ; Transfer contents of B to A; A ← [B] • TAB ; Transfer contents of A to B; B ← [A] • TAP ; Transfer contents of A to CCR; CCR ← [A] • TPA ; Transfer contents of CCR to A; A ← [CCR]
  • 26.
    Example Program Exercise 1:Load data into register and store it onto memory location .area text _main:: LDAA #$06 ; Loads accumulator A with hex value 6; ; This is written as A← 06 STAA $2025 ;Stores the content of accumulator A on to memory ;location $2025, $2025 ← [A] LDAB $2025 ; Loads accumulator B with the contents of memory ;location $2025, B←[$2025] STAB $1064 ; Stores the content of accumulator B on to memory ; location $1064, $1064 ← [B] SWI ; Returns to monitor
  • 27.
    Example Program Exercise 2:Data exchange between registers .area text _main:: LDAB #$03 ; B ← $03 TBA ; Transfer contents of B to A; A ← [B] STAA $1064 ; Store contents of A onto location $1064, $1064 ← [A] SWI
  • 28.
    Example Program Exercise 3:Addition of two numbers .area text _main:: LDAB #$02 ; B ←$02 STAB $2025 ; $2025 ← [B] LDAA #$01 ; A← $01 ADDA $2025 ; A←[A] + [$2025] STAA $1064 ; $1064 ← [A] SWI