SlideShare a Scribd company logo
Central Processing Unit (CPU) ,[object Object],[object Object],KAPIL P.C.T.E. Control Register Arithmetic  Logic Unit  (ALU)
Components of the CPU ,[object Object],[object Object],[object Object],KAPIL P.C.T.E.
Stack Organization ,[object Object],[object Object],[object Object],[object Object],[object Object],KAPIL P.C.T.E.
Stack Organization (contd) ,[object Object],[object Object],KAPIL P.C.T.E.
Operations on Stack ,[object Object],KAPIL P.C.T.E.
Operations on Stack ,[object Object],KAPIL P.C.T.E.
Stack implemented in the Computer Memory ,[object Object],[object Object],[object Object],[object Object],KAPIL P.C.T.E.
KAPIL P.C.T.E.
Utility of using Stack(Evaluating Arithmetic Expressions) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],KAPIL P.C.T.E.
Continued ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],KAPIL P.C.T.E.
Continued ,[object Object],[object Object],[object Object],[object Object],[object Object],KAPIL P.C.T.E.
[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],KAPIL P.C.T.E.
Conversion of Expressions from Infix to RPN ,[object Object],[object Object],[object Object],[object Object],KAPIL P.C.T.E.
[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Continued ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],KAPIL P.C.T.E.
Example ,[object Object],KAPIL P.C.T.E.

More Related Content

What's hot

ADDRESSING MODES
ADDRESSING MODESADDRESSING MODES
ADDRESSING MODES
Sadaf Rasheed
 
Operating System Lab Project
Operating System Lab Project Operating System Lab Project
Operating System Lab Project
Abdullah Shion
 
Instruction Set Architecture
Instruction Set ArchitectureInstruction Set Architecture
Instruction Set Architecture
Dilum Bandara
 
Io techniques & its types
Io techniques & its typesIo techniques & its types
Io techniques & its typesNehal Naik
 
Data transfer and manipulation
Data transfer and manipulationData transfer and manipulation
Data transfer and manipulation
janani thirupathi
 
bus and memory tranfer (computer organaization)
bus and memory tranfer (computer organaization)bus and memory tranfer (computer organaization)
bus and memory tranfer (computer organaization)
Siddhi Viradiya
 
I/O System
I/O SystemI/O System
I/O System
Nagarajan
 
online bus ticket booking system
online bus ticket booking systemonline bus ticket booking system
online bus ticket booking system
Umme habiba
 
INTERCONNECTION STRUCTURE
INTERCONNECTION STRUCTUREINTERCONNECTION STRUCTURE
INTERCONNECTION STRUCTURE
VENNILAV6
 
Program execution, straight line sequence and branching
Program execution, straight line sequence and branchingProgram execution, straight line sequence and branching
Program execution, straight line sequence and branching
JyotiprakashMishra18
 
Arm instruction set
Arm instruction setArm instruction set
Arm instruction set
Ravi Babu
 
Register Reference Instructions | Computer Science
Register Reference Instructions | Computer ScienceRegister Reference Instructions | Computer Science
Register Reference Instructions | Computer Science
Transweb Global Inc
 
Graphics practical lab manual
Graphics practical lab manualGraphics practical lab manual
Graphics practical lab manual
Vivek Kumar Sinha
 
Unit 3-pipelining & vector processing
Unit 3-pipelining & vector processingUnit 3-pipelining & vector processing
Unit 3-pipelining & vector processing
vishal choudhary
 
IP Address - IPv4 & IPv6
IP Address - IPv4 & IPv6IP Address - IPv4 & IPv6
IP Address - IPv4 & IPv6
Adeel Rasheed
 
Addressing sequencing
Addressing sequencingAddressing sequencing
Addressing sequencing
rajshreemuthiah
 
Microprocessors - 80386DX
Microprocessors - 80386DXMicroprocessors - 80386DX
Microprocessors - 80386DX
PriyaDYP
 
BCD arithmetic and 16-bit data operations
BCD arithmetic and 16-bit data operationsBCD arithmetic and 16-bit data operations
BCD arithmetic and 16-bit data operations
Dhananjaysinh Jhala
 
Software requirements specification
Software  requirements specificationSoftware  requirements specification
Software requirements specificationKrishnasai Gudavalli
 

What's hot (20)

ADDRESSING MODES
ADDRESSING MODESADDRESSING MODES
ADDRESSING MODES
 
Operating System Lab Project
Operating System Lab Project Operating System Lab Project
Operating System Lab Project
 
Instruction Set Architecture
Instruction Set ArchitectureInstruction Set Architecture
Instruction Set Architecture
 
Io techniques & its types
Io techniques & its typesIo techniques & its types
Io techniques & its types
 
Data transfer and manipulation
Data transfer and manipulationData transfer and manipulation
Data transfer and manipulation
 
bus and memory tranfer (computer organaization)
bus and memory tranfer (computer organaization)bus and memory tranfer (computer organaization)
bus and memory tranfer (computer organaization)
 
I/O System
I/O SystemI/O System
I/O System
 
IP addressing
IP addressingIP addressing
IP addressing
 
online bus ticket booking system
online bus ticket booking systemonline bus ticket booking system
online bus ticket booking system
 
INTERCONNECTION STRUCTURE
INTERCONNECTION STRUCTUREINTERCONNECTION STRUCTURE
INTERCONNECTION STRUCTURE
 
Program execution, straight line sequence and branching
Program execution, straight line sequence and branchingProgram execution, straight line sequence and branching
Program execution, straight line sequence and branching
 
Arm instruction set
Arm instruction setArm instruction set
Arm instruction set
 
Register Reference Instructions | Computer Science
Register Reference Instructions | Computer ScienceRegister Reference Instructions | Computer Science
Register Reference Instructions | Computer Science
 
Graphics practical lab manual
Graphics practical lab manualGraphics practical lab manual
Graphics practical lab manual
 
Unit 3-pipelining & vector processing
Unit 3-pipelining & vector processingUnit 3-pipelining & vector processing
Unit 3-pipelining & vector processing
 
IP Address - IPv4 & IPv6
IP Address - IPv4 & IPv6IP Address - IPv4 & IPv6
IP Address - IPv4 & IPv6
 
Addressing sequencing
Addressing sequencingAddressing sequencing
Addressing sequencing
 
Microprocessors - 80386DX
Microprocessors - 80386DXMicroprocessors - 80386DX
Microprocessors - 80386DX
 
BCD arithmetic and 16-bit data operations
BCD arithmetic and 16-bit data operationsBCD arithmetic and 16-bit data operations
BCD arithmetic and 16-bit data operations
 
Software requirements specification
Software  requirements specificationSoftware  requirements specification
Software requirements specification
 

Viewers also liked

Register organization, stack
Register organization, stackRegister organization, stack
Register organization, stack
Asif Iqbal
 
Basic Processing Unit
Basic Processing UnitBasic Processing Unit
Basic Processing UnitSlideshare
 
Instruction format
Instruction formatInstruction format
Instruction format
Sanjeev Patel
 
Computer instructions
Computer instructionsComputer instructions
Computer instructionsAnuj Modi
 
Interrupts
InterruptsInterrupts
Interrupts
guest2e9811e
 
CO by Rakesh Roshan
CO by Rakesh RoshanCO by Rakesh Roshan
CO by Rakesh Roshan
Rakesh Roshan
 
Central Processing Unit User View
Central Processing Unit User ViewCentral Processing Unit User View
Central Processing Unit User ViewAnuj Modi
 
STACK
STACKSTACK
STACK
PCTE
 
Unit 3 basic processing unit
Unit 3   basic processing unitUnit 3   basic processing unit
Unit 3 basic processing unitchidabdu
 
Register Organization and Instruction cycle
Register Organization and Instruction cycleRegister Organization and Instruction cycle
Register Organization and Instruction cycleMuhammad Ameer Mohavia
 
Computer Organization and Assembly Language
Computer Organization and Assembly LanguageComputer Organization and Assembly Language
Computer Organization and Assembly Language
fasihuddin90
 
Lecture 2
Lecture 2Lecture 2
Lecture 2GIKI
 
Addressing modes (detailed data path)
Addressing modes (detailed data path)Addressing modes (detailed data path)
Addressing modes (detailed data path)Mahesh Kumar Attri
 
Buses in a computer
Buses in a computerBuses in a computer
Buses in a computer
chrispaul8676
 
Logic microoperations
Logic microoperationsLogic microoperations
Logic microoperationsNitesh Singh
 
Class 7 science project
Class 7 science projectClass 7 science project
Class 7 science project
fdgfdgh
 
Logical and shift micro operations
Logical and shift micro operationsLogical and shift micro operations
Logical and shift micro operations
Sanjeev Patel
 

Viewers also liked (20)

Lecture 23
Lecture 23Lecture 23
Lecture 23
 
Register organization, stack
Register organization, stackRegister organization, stack
Register organization, stack
 
Basic Processing Unit
Basic Processing UnitBasic Processing Unit
Basic Processing Unit
 
Instruction format
Instruction formatInstruction format
Instruction format
 
Computer instructions
Computer instructionsComputer instructions
Computer instructions
 
Addressing modes
Addressing modesAddressing modes
Addressing modes
 
Interrupts
InterruptsInterrupts
Interrupts
 
Cloud computing
Cloud computingCloud computing
Cloud computing
 
CO by Rakesh Roshan
CO by Rakesh RoshanCO by Rakesh Roshan
CO by Rakesh Roshan
 
Central Processing Unit User View
Central Processing Unit User ViewCentral Processing Unit User View
Central Processing Unit User View
 
STACK
STACKSTACK
STACK
 
Unit 3 basic processing unit
Unit 3   basic processing unitUnit 3   basic processing unit
Unit 3 basic processing unit
 
Register Organization and Instruction cycle
Register Organization and Instruction cycleRegister Organization and Instruction cycle
Register Organization and Instruction cycle
 
Computer Organization and Assembly Language
Computer Organization and Assembly LanguageComputer Organization and Assembly Language
Computer Organization and Assembly Language
 
Lecture 2
Lecture 2Lecture 2
Lecture 2
 
Addressing modes (detailed data path)
Addressing modes (detailed data path)Addressing modes (detailed data path)
Addressing modes (detailed data path)
 
Buses in a computer
Buses in a computerBuses in a computer
Buses in a computer
 
Logic microoperations
Logic microoperationsLogic microoperations
Logic microoperations
 
Class 7 science project
Class 7 science projectClass 7 science project
Class 7 science project
 
Logical and shift micro operations
Logical and shift micro operationsLogical and shift micro operations
Logical and shift micro operations
 

Similar to Csa stack

Computer Organization and 8085 microprocessor notes
Computer Organization and 8085 microprocessor notesComputer Organization and 8085 microprocessor notes
Computer Organization and 8085 microprocessor notes
Lakshmi Sarvani Videla
 
Chapter 4 the processor
Chapter 4 the processorChapter 4 the processor
Chapter 4 the processor
s9007912
 
Csa ic
Csa icCsa ic
Csa ic
PCTE
 
Central processing unit
Central processing unitCentral processing unit
Central processing unit
jyoti_lakhani
 
Stacks in c++
Stacks in c++Stacks in c++
Stacks in c++
Vineeta Garg
 
CAO-Unit-I.pptx
CAO-Unit-I.pptxCAO-Unit-I.pptx
CAO-Unit-I.pptx
ClassicFUKRA
 
Chapter8.ppt
Chapter8.pptChapter8.ppt
Chapter8.ppt
Allwin19
 
Switch Control and Time Delay - Keypad
Switch Control and Time Delay - KeypadSwitch Control and Time Delay - Keypad
Switch Control and Time Delay - Keypad
Ariel Tonatiuh Espindola
 
COA (Unit_2.pptx)
COA (Unit_2.pptx)COA (Unit_2.pptx)
COA (Unit_2.pptx)
Thapar Institute
 
Computer arithmetics coa project pdf version
Computer arithmetics coa project pdf versionComputer arithmetics coa project pdf version
Computer arithmetics coa project pdf version
SuryaKumarSahani
 
pdfslide.net_morris-mano-ppt.ppt
pdfslide.net_morris-mano-ppt.pptpdfslide.net_morris-mano-ppt.ppt
pdfslide.net_morris-mano-ppt.ppt
SaurabhPorwal14
 
POLITEKNIK MALAYSIA
POLITEKNIK MALAYSIAPOLITEKNIK MALAYSIA
POLITEKNIK MALAYSIA
Aiman Hud
 
Lecture 04 Logical Group of Instructions
Lecture 04 Logical Group of InstructionsLecture 04 Logical Group of Instructions
Lecture 04 Logical Group of Instructions
Zeeshan Ahmed
 
Chapter8.ppt
Chapter8.pptChapter8.ppt
Chapter8.ppt
AshokRachapalli1
 
Stacks IN DATA STRUCTURES
Stacks IN DATA STRUCTURESStacks IN DATA STRUCTURES
Stacks IN DATA STRUCTURES
Sowmya Jyothi
 
10 Linked Lists Sacks and Queues
10 Linked Lists Sacks and Queues10 Linked Lists Sacks and Queues
10 Linked Lists Sacks and Queues
Praveen M Jigajinni
 
Computer organisation and architecture jntuh 2rd year 2nd unit # central proc...
Computer organisation and architecture jntuh 2rd year 2nd unit # central proc...Computer organisation and architecture jntuh 2rd year 2nd unit # central proc...
Computer organisation and architecture jntuh 2rd year 2nd unit # central proc...
preethi3173
 
COA_mod2.ppt
COA_mod2.pptCOA_mod2.ppt
COA_mod2.ppt
singleps47
 
UNIT-3.pptx
UNIT-3.pptxUNIT-3.pptx
UNIT-3.pptx
TirthPatel479872
 
Datapath Design of Computer Architecture
Datapath Design of Computer ArchitectureDatapath Design of Computer Architecture
Datapath Design of Computer Architecture
Abu Zaman
 

Similar to Csa stack (20)

Computer Organization and 8085 microprocessor notes
Computer Organization and 8085 microprocessor notesComputer Organization and 8085 microprocessor notes
Computer Organization and 8085 microprocessor notes
 
Chapter 4 the processor
Chapter 4 the processorChapter 4 the processor
Chapter 4 the processor
 
Csa ic
Csa icCsa ic
Csa ic
 
Central processing unit
Central processing unitCentral processing unit
Central processing unit
 
Stacks in c++
Stacks in c++Stacks in c++
Stacks in c++
 
CAO-Unit-I.pptx
CAO-Unit-I.pptxCAO-Unit-I.pptx
CAO-Unit-I.pptx
 
Chapter8.ppt
Chapter8.pptChapter8.ppt
Chapter8.ppt
 
Switch Control and Time Delay - Keypad
Switch Control and Time Delay - KeypadSwitch Control and Time Delay - Keypad
Switch Control and Time Delay - Keypad
 
COA (Unit_2.pptx)
COA (Unit_2.pptx)COA (Unit_2.pptx)
COA (Unit_2.pptx)
 
Computer arithmetics coa project pdf version
Computer arithmetics coa project pdf versionComputer arithmetics coa project pdf version
Computer arithmetics coa project pdf version
 
pdfslide.net_morris-mano-ppt.ppt
pdfslide.net_morris-mano-ppt.pptpdfslide.net_morris-mano-ppt.ppt
pdfslide.net_morris-mano-ppt.ppt
 
POLITEKNIK MALAYSIA
POLITEKNIK MALAYSIAPOLITEKNIK MALAYSIA
POLITEKNIK MALAYSIA
 
Lecture 04 Logical Group of Instructions
Lecture 04 Logical Group of InstructionsLecture 04 Logical Group of Instructions
Lecture 04 Logical Group of Instructions
 
Chapter8.ppt
Chapter8.pptChapter8.ppt
Chapter8.ppt
 
Stacks IN DATA STRUCTURES
Stacks IN DATA STRUCTURESStacks IN DATA STRUCTURES
Stacks IN DATA STRUCTURES
 
10 Linked Lists Sacks and Queues
10 Linked Lists Sacks and Queues10 Linked Lists Sacks and Queues
10 Linked Lists Sacks and Queues
 
Computer organisation and architecture jntuh 2rd year 2nd unit # central proc...
Computer organisation and architecture jntuh 2rd year 2nd unit # central proc...Computer organisation and architecture jntuh 2rd year 2nd unit # central proc...
Computer organisation and architecture jntuh 2rd year 2nd unit # central proc...
 
COA_mod2.ppt
COA_mod2.pptCOA_mod2.ppt
COA_mod2.ppt
 
UNIT-3.pptx
UNIT-3.pptxUNIT-3.pptx
UNIT-3.pptx
 
Datapath Design of Computer Architecture
Datapath Design of Computer ArchitectureDatapath Design of Computer Architecture
Datapath Design of Computer Architecture
 

Csa stack