UNIT II ARITHMETIC
FIXED POIN NUMBER
REPRESENTATION
• Digital Computers use Binary number system to
represent all types of information inside the
computers. Alphanumeric characters are
represented using binary bits (i.e., 0 and 1). Digital
representations are easier to design, storage is easy,
accuracy and precision are greater.
• There are various types of number representation
techniques for digital number representation, for
example: Binary number system, octal number
system, decimal number system, and hexadecimal
number system etc. But Binary number system is
most relevant and popular for representing numbers
in digital computer system.
Storing Real Number
These are structures as following below −
• There are two major approaches to store real
numbers (i.e., numbers with fractional
component) in modern computing.
• These are (i) Fixed Point Notation and (ii)
Floating Point Notation.
• In fixed point notation, there are a fixed
number of digits after the decimal point,
whereas floating point number allows for a
varying number of digits after the decimal
point
Fixed-Point Representation −
• This representation has fixed number of bits
for integer part and for fractional part.
• For example, if given fixed-point
representation is IIII.FFFF, then you can store
minimum value is 0000.0001 and maximum
value is 9999.9999. There are three parts of a
fixed-point number representation: the sign
field, integer field, and fractional field.
We can represent these numbers using:
Signed representation: range from -(2(k-1)-1) to (2(k-1)-
1), for k bits.
1’s complement representation: range from -(2(k-1)-1)
to (2(k-1)-1), for k bits.
2’s complementation representation: range from -(2(k-
1)) to (2(k-1)-1), for k bits.
2’s complementation representation is preferred in computer
system because of unambiguous property and easier for
arithmetic operations.
Example −Assume number is using 32-bit format which reserve
1 bit for the sign, 15 bits for the integer part and 16 bits for the
fractional part.
Then, -43.625 is represented as following:
Where, 0 is used to represent + and 1 is used to represent.
000000000101011 is 15 bit binary value for decimal 43 and
1010000000000000 is 16 bit binary value for fractional 0.625.
• The advantage of using a fixed-point representation is performance and
disadvantage is relatively limited range of values that they can represent.
So, it is usually inadequate for numerical analysis as it does not allow
enough numbers and accuracy. A number whose representation exceeds
32 bits would have to be stored inexactly.
These are above smallest positive number and largest positive
number which can be store in 32-bit representation as given above
format. Therefore, the smallest positive number is 2-16 ≈ 0.000015
approximate and the largest positive number is (215-1)+(1-2-16)=215(1-
2-16) =32768, and gap between these numbers is 2-16.
Floating-Point Representation −
– This representation does not reserve a specific number of bits for the
integer part or the fractional part. Instead it reserves a certain number
of bits for the number (called the mantissa or significand) and a certain
number of bits to say where within that number the decimal place sits
(called the exponent).
– The floating number representation of a number has two part: the first
part represents a signed fixed point number called mantissa. The
second part of designates the position of the decimal (or binary) point
and is called the exponent. The fixed point mantissa may be fraction or
an integer. Floating -point is always interpreted to represent a number
in the following form: Mxre.
• Only the mantissa m and the exponent e are
physically represented in the register
(including their sign).
• A floating-point binary number is represented
in a similar manner except that is uses base 2
for the exponent. A floating-point number is
said to be normalized if the most significant
digit of the mantissa is 1.
• signed integers and exponent are represented
by either sign representation, or one’s
complement representation, or two’s
complement representation.
Simple Adders
Figures 10.1/10.2 Binary half-adder (HA) and full-adder (FA).
x y c s
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0
Inputs Outputs
HA
x y
c
s
x y c c s
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Inputs Outputs
cout cin
out
in x y
s
FA
Digit-set interpretation:
{0, 1} + {0, 1}
= {0, 2} + {0, 1}
Digit-set interpretation:
{0, 1} + {0, 1} + {0, 1}
= {0, 2} + {0, 1}
Full-Adder Implementations
Figure10.3 Full adder implemented with two half-adders, by means of
two 4-input multiplexers, and as two-level gate network.
(a) FA built of two HAs
(c) Two-level AND-OR FA
(b) CMOS mux-based FA
1
0
3
2
HA
HA
1
0
3
2
0
1
x
y
x
y
x
y
s
s
s
cout
cout
cout
cin
cin
cin
Ripple-Carry Adder: Slow But Simple
Figure 10.4 Ripple-carry binary adder with 32-bit inputs and output.
x
s
y
c
c
x
s
y
c
x
s
y
c
cout cin
0 0
0
c0
1 1
1
1
2
31
31
31
31
FA FA FA
32
. . .
Critical path
CSE431 Chapter 3.54 Irwin, PSU, 2008
Unsigned Multiplications
 Multiplications is a complex operation than addition and
subtraction.
 It can be performed in hardware and software
 Multiplication process involves generation of partial
products, one for each digit in multiplier.
 These partial product are summed in to final product.
 Before summing operation each successive partial
product is shifted one position to the left relative to the
preceding partial product
 The product of two n digit numbers can be
accommodated in 2n digits, so the product of the two 4
bit numbers fits in to 8bits
CSE431 Chapter 3.55 Irwin, PSU, 2008
Multiply
 Binary multiplication is just a bunch of right shifts and
adds
multiplicand
multiplier
partial
product
array
double precision product
n
2n
n
can be formed in parallel
and added in parallel for
faster multiplication
CSE431 Chapter 3.56 Irwin, PSU, 2008
CSE431 Chapter 3.57 Irwin, PSU, 2008
CSE431 Chapter 3.58 Irwin, PSU, 2008
CSE431 Chapter 3.59 Irwin, PSU, 2008
CSE431 Chapter 3.60 Irwin, PSU, 2008
CSE431 Chapter 3.61 Irwin, PSU, 2008
CSE431 Chapter 3.62 Irwin, PSU, 2008
CSE431 Chapter 3.63 Irwin, PSU, 2008
CSE431 Chapter 3.64 Irwin, PSU, 2008
CSE431 Chapter 3.65 Irwin, PSU, 2008
CSE431 Chapter 3.66 Irwin, PSU, 2008
CSE431 Chapter 3.67 Irwin, PSU, 2008
CSE431 Chapter 3.68 Irwin, PSU, 2008
CSE431 Chapter 3.69 Irwin, PSU, 2008
CSE431 Chapter 3.70 Irwin, PSU, 2008
CSE431 Chapter 3.71 Irwin, PSU, 2008
CSE431 Chapter 3.72 Irwin, PSU, 2008
CSE431 Chapter 3.73 Irwin, PSU, 2008
CSE431 Chapter 3.74 Irwin, PSU, 2008
CSE431 Chapter 3.75 Irwin, PSU, 2008
CSE431 Chapter 3.76 Irwin, PSU, 2008
CSE431 Chapter 3.77 Irwin, PSU, 2008
CSE431 Chapter 3.78 Irwin, PSU, 2008
CSE431 Chapter 3.79 Irwin, PSU, 2008
CSE431 Chapter 3.80 Irwin, PSU, 2008
CSE431 Chapter 3.81 Irwin, PSU, 2008
CSE431 Chapter 3.82 Irwin, PSU, 2008
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic
Unit 2 Arithmetic

Unit 2 Arithmetic

  • 1.
  • 2.
    FIXED POIN NUMBER REPRESENTATION •Digital Computers use Binary number system to represent all types of information inside the computers. Alphanumeric characters are represented using binary bits (i.e., 0 and 1). Digital representations are easier to design, storage is easy, accuracy and precision are greater. • There are various types of number representation techniques for digital number representation, for example: Binary number system, octal number system, decimal number system, and hexadecimal number system etc. But Binary number system is most relevant and popular for representing numbers in digital computer system.
  • 3.
    Storing Real Number Theseare structures as following below −
  • 4.
    • There aretwo major approaches to store real numbers (i.e., numbers with fractional component) in modern computing. • These are (i) Fixed Point Notation and (ii) Floating Point Notation. • In fixed point notation, there are a fixed number of digits after the decimal point, whereas floating point number allows for a varying number of digits after the decimal point
  • 5.
    Fixed-Point Representation − •This representation has fixed number of bits for integer part and for fractional part. • For example, if given fixed-point representation is IIII.FFFF, then you can store minimum value is 0000.0001 and maximum value is 9999.9999. There are three parts of a fixed-point number representation: the sign field, integer field, and fractional field.
  • 6.
    We can representthese numbers using: Signed representation: range from -(2(k-1)-1) to (2(k-1)- 1), for k bits. 1’s complement representation: range from -(2(k-1)-1) to (2(k-1)-1), for k bits. 2’s complementation representation: range from -(2(k- 1)) to (2(k-1)-1), for k bits.
  • 7.
    2’s complementation representationis preferred in computer system because of unambiguous property and easier for arithmetic operations. Example −Assume number is using 32-bit format which reserve 1 bit for the sign, 15 bits for the integer part and 16 bits for the fractional part. Then, -43.625 is represented as following: Where, 0 is used to represent + and 1 is used to represent. 000000000101011 is 15 bit binary value for decimal 43 and 1010000000000000 is 16 bit binary value for fractional 0.625.
  • 8.
    • The advantageof using a fixed-point representation is performance and disadvantage is relatively limited range of values that they can represent. So, it is usually inadequate for numerical analysis as it does not allow enough numbers and accuracy. A number whose representation exceeds 32 bits would have to be stored inexactly. These are above smallest positive number and largest positive number which can be store in 32-bit representation as given above format. Therefore, the smallest positive number is 2-16 ≈ 0.000015 approximate and the largest positive number is (215-1)+(1-2-16)=215(1- 2-16) =32768, and gap between these numbers is 2-16.
  • 9.
    Floating-Point Representation − –This representation does not reserve a specific number of bits for the integer part or the fractional part. Instead it reserves a certain number of bits for the number (called the mantissa or significand) and a certain number of bits to say where within that number the decimal place sits (called the exponent). – The floating number representation of a number has two part: the first part represents a signed fixed point number called mantissa. The second part of designates the position of the decimal (or binary) point and is called the exponent. The fixed point mantissa may be fraction or an integer. Floating -point is always interpreted to represent a number in the following form: Mxre.
  • 10.
    • Only themantissa m and the exponent e are physically represented in the register (including their sign). • A floating-point binary number is represented in a similar manner except that is uses base 2 for the exponent. A floating-point number is said to be normalized if the most significant digit of the mantissa is 1. • signed integers and exponent are represented by either sign representation, or one’s complement representation, or two’s complement representation.
  • 16.
    Simple Adders Figures 10.1/10.2Binary half-adder (HA) and full-adder (FA). x y c s 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 Inputs Outputs HA x y c s x y c c s 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 Inputs Outputs cout cin out in x y s FA Digit-set interpretation: {0, 1} + {0, 1} = {0, 2} + {0, 1} Digit-set interpretation: {0, 1} + {0, 1} + {0, 1} = {0, 2} + {0, 1}
  • 17.
    Full-Adder Implementations Figure10.3 Fulladder implemented with two half-adders, by means of two 4-input multiplexers, and as two-level gate network. (a) FA built of two HAs (c) Two-level AND-OR FA (b) CMOS mux-based FA 1 0 3 2 HA HA 1 0 3 2 0 1 x y x y x y s s s cout cout cout cin cin cin
  • 18.
    Ripple-Carry Adder: SlowBut Simple Figure 10.4 Ripple-carry binary adder with 32-bit inputs and output. x s y c c x s y c x s y c cout cin 0 0 0 c0 1 1 1 1 2 31 31 31 31 FA FA FA 32 . . . Critical path
  • 54.
    CSE431 Chapter 3.54Irwin, PSU, 2008 Unsigned Multiplications  Multiplications is a complex operation than addition and subtraction.  It can be performed in hardware and software  Multiplication process involves generation of partial products, one for each digit in multiplier.  These partial product are summed in to final product.  Before summing operation each successive partial product is shifted one position to the left relative to the preceding partial product  The product of two n digit numbers can be accommodated in 2n digits, so the product of the two 4 bit numbers fits in to 8bits
  • 55.
    CSE431 Chapter 3.55Irwin, PSU, 2008 Multiply  Binary multiplication is just a bunch of right shifts and adds multiplicand multiplier partial product array double precision product n 2n n can be formed in parallel and added in parallel for faster multiplication
  • 56.
    CSE431 Chapter 3.56Irwin, PSU, 2008
  • 57.
    CSE431 Chapter 3.57Irwin, PSU, 2008
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    CSE431 Chapter 3.58Irwin, PSU, 2008
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    CSE431 Chapter 3.59Irwin, PSU, 2008
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    CSE431 Chapter 3.60Irwin, PSU, 2008
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    CSE431 Chapter 3.61Irwin, PSU, 2008
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    CSE431 Chapter 3.63Irwin, PSU, 2008
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    CSE431 Chapter 3.64Irwin, PSU, 2008
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    CSE431 Chapter 3.74Irwin, PSU, 2008
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    CSE431 Chapter 3.80Irwin, PSU, 2008
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    CSE431 Chapter 3.81Irwin, PSU, 2008
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    CSE431 Chapter 3.82Irwin, PSU, 2008