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![ADDRESSING MODES
ADDRESSING MODES
Indirect addressing mode
Without port increment
Without port increment
– LD AX,[SI]
With post increment
– LD AX,[SI]+
[ ]
Index Long
– LD AX [SI ff t]
LD AX,[SI+offset]
Index short
– LD AX,DISP[SI] microcontrollers and applications](https://image.slidesharecdn.com/mcapptunitvii-111124071714-phpapp01/85/Mcapptunitvii-24-320.jpg)
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- 1. 16-bit Microcontrollers: 80196Microcontroller
- 2. 80196 architecture 80196 architecture Microcontrollers and Applications
- 3.
- 4. Features of 8096/80196 Microcontroller • 16 BIT microcontroller. It performs 16 bit processing. • Princeton Architecture. • Continuous address space for SFRs, Registers, Internal RAM & ROM and external memory. • R i Register based arithmetic and logic operations. b d ih i dl i i • 16 BIT stack pointer. • BIU & MUX unit. • 4 byte instruction queue. • 5 ports P0,P1,P2,P3 & P4. • Timers, serial ports, ADC & PWM. • Interrupt control circuit and watch dog timer. • 16 KB ROM/EPROM starting from address 2000H. microcontrollers and applications
- 5. Features of 8096/80196 Microcontroller • Timers are 16 bit with the facility of input capture and out compare. • Th The ports are multiplexed. t lti l d • P0 is multiplexed with analog inputs. • P1 i P1 is multiplexed with PWM & PTS signals. l i l d i h PWM & PTS i l • P2 is multiplexed with serial port and timer signals. • P3 & P4 have alternate functions in expanded mode of h l f d d d f operation. • P3 h AD00 AD07 P3 has AD00‐AD07. • P4 has AD00‐AD15. • 1ST 24 b t 1ST 24 bytes of memory is for SFRs. There are 4 horizontal f i f SFR Th 4h i t l windows. Microcontrollers and Applications
- 6. Features of 8096/80196 Microcontroller • Each window is of 24 bytes each and address of 24 bytes will be the same for all 4 windows. • So we can say window 0,window1, window2, window3. • Page 0 addresses is from 00 to FFH. • First 512 bytes between 0000 to 01FFH are divided First 512 bytes between 0000 to 01FFH are divided into vertical windows. • These windows are 16 of 32 bytes each 8 of 64 bytes These windows are 16 of 32 bytes each, 8 of 64 bytes each or 4 of 128 bytes each. microcontrollers and applications
- 7. Operational Features • It does 16 bits operations on 1 instruction y cycle. • It does not have separate data and code memory. memory • Data memory contains variable. • Code memory contains code. • B th Both operands can be registers. d b it • PWM can be used as DAC. microcontrollers and applications
- 8. Operational Features Operational Features • Facility which will continuously check whether p p y g ( CPU is properly working or not (Watch dog g timer). • PTS (Peripheral Transaction Server) PTS (Peripheral Transaction Server) microcontrollers and applications
- 9. Memory map of 80196 Memory map of80196 microcontrollers and applications
- 10. SFRS of 80196 SFRS of 80196 • Special function Registers are available from address 0000H‐0017H i.e. 24 addresses. Out of these 24. • addresses 9 addresses are common to addresses,9 addresses are common to horizontal window 0 (read), horizontal window 0 (write), horizontal. ( ) h l • window 1(Read ) and horizontal window 15. window 1(Read ) and horizontal window 15. microcontrollers and applications
- 11. SFRs of 80196: Registers common to all windows Direct address i dd SFRs S 0000‐0001H R0 0008H Int_mask 0009H INT_pending 0012H INT_pend1 0013H INT_mask1 INT k1 0014H WSR microcontrollers and applications
- 12. SFRs of 80196 SFRs of 80196 Registers of Horizontal window 0 (read) and window 0 (write) Direct address SFRs 0002 AD_command(write) AD ommand( rite) 0002 AD_Result_L0 (read) 0003 HSI_mode (write) 0003 AD_result_high(read) AD result high(read) 0004‐0005 HS0_Time (Write) 0004‐0005 HS0_Time (read) 0006 HS0_Command (write) HS0 Command (write) 0006 HS0_status (read) 0007 SBUF 000A Watchdog (Write) Watchdog (Write) 000B I0C2(Write) microcontrollers and applications
- 13. SFRs of 80196 SFRs of 80196 Direct address i dd SFRs S 000A‐000B Timer 1 (Read) 000C‐000D Timer 2 (read) 000E Baud rate (write) 000E P0 (read) 000F P1 (read/write) 0010 P2 (read/write) 0011 SP_Control (write) 0011 SP_stat (read) 0015 10C0(write) 10C0( i ) 0015 10S0(read) 0016 10C1 (write) 0016 10S1 (read) 10S1 (read) 0017 10S2 (Read/write) microcontrollers and applications
- 14. SFRs of 80196 SFRs of 80196 • Horizontal window 1 (read/write) Direct address SFRs 0003 AD_Time 0004 PTSSEL_L0 0005 PTSSEL_H0 0006 PTSSRV_L0 0007 PTSSRV_H0 000C 10C3 0016 PWM2 control 0017 PWM1 control microcontrollers and applications
- 15. SFRs of 80196 SFRs of 80196 SFRs at horizontal window 15 Direct address SFRs 000C T2 Capture_L0 0016 T2 Capture_L0 Window Selection Register Window Selection Register D7 D6 D5 D4 D3 D2 D1 D0 SELECTION OF WINDOW WINDOW NUMBER microcontrollers and applications
- 16. TIMERS, HSIs & HSOs TIMERS HSIs & HSOs • T1 is a 16 bit free running timer. • Input to the timer comes from internal clock. Input to the timer comes from internal clock. • It always runs and cannot be reset. • It is used to generate accurate time delays and y to arrive at time of the day. • It is used mainly for HSIs. • 4HSI 4HSIs microcontrollers and applications
- 17. TIMERS, HSIs & HSOs TIMERS HSIs & HSOs • FIFO is used to store time of capture. • 8 entries of FIFO. • Each entry is 20 bits. • 16 bits are for time and 4 bits are for the type of HIS. • It is rarely used for HSO operation. • Th i The input capture is a high speed signal. t t i hi h d i l • Its input signal is connected to micro p g controller. • It can capture very fast events also It can capture very fast events also. microcontrollers and applications
- 18. TIMERS, HSIs & HSOs TIMERS HSIs & HSOs • 4 different events can be captured simultaneously. y • T2 is a 16 bit internal or external counter • Used mainly for HSOs Used mainly for HSOs • 6 HSOs • Compares entries in CAM C t i i CAM • Each entry is 23 bits • 16 bits for comparison data 16 bit f i d t • 7 bits for command • The CAM memory means content addressable microcontrollers and applications memory.
- 19. TIMERS, HSIs & HSOs TIMERS HSIs & HSOs • Memory location is not addressed by CPU address. • Width of the memory location is user defined. • Memory location is read when a part of memory location data is equal to input data. • S Status and control registers are used to control and read d l i d l d d information of timer 1 and timer 2. • There are 4 software timers There are 4 software timers. • The overflows of software timers are indicated by ISO1.0 – ISO1.3. ISO1 0 – ISO1 3 • Hardware counters are not used and instead memory locations are used. locations are used. microcontrollers and applications
- 20. INTERRUPTS • 18 groups of interrupts. • 3 NMI groups. 3 NMI groups. • 15 general interrupt groups. • Priority scheme is implemented. • Masking facility is provided. 2 levels of Masking facility is provided 2 levels of masking is available. The higher level is by bit 9 of PSW and secondary level is by individual 9 f PSW d d l l i b i di id l bits of INT mask and INT mask1 registers. microcontrollers and applications
- 21. INTERRUPTS • Each interrupt has a specific vector. The vector area is from 2000H – 2014H & 2030H‐203FH. • Priority of interrupt is fixed as INT0 being higher priority and INT17 being lowest higher priority and INT17 being lowest priority. • Each interrupt is indicated by a flag. For example FIFO full flag. example – FIFO full flag. microcontrollers and applications
- 22. Interrupt groups Interrupt groups Priority wise groups Sources Group 0 Interrupt at NMI pin Group 1 Interrupt at HIS unit Group 2 Group 2 External INT1 P0.7 pin interrupt External INT1 P0 7 pin interrupt Group 3 Timer 2 overflow Group 4 Timer 2, T2 capture Group 5 Group 5 HSI,FIFO HALF FULL HSI,FIFO HALF FULL Group 6 Serial Port, RI flag Group 7 Serial Port, TI flag Group 8 p Illegal code g Group 9 Instruction trap Group 10 External HW, EXINT Group 11 Serial Port, TI or RI Group 12 HSO Group 13 HSI Group 14 HSO.0‐HSO.5 Group 15 HSI capture data ready and FIFO full Group 16 ADC Group 17 T1 or T2 overflow
- 23. ADDRESSING MODES ADDRESSING MODES Implicit address mode Implicit address mode – PUSHF – SETC Immediate addressing mode LD AX,#55AH ADD AX,NUM,#1234H ADD AX NUM #1234H Direct addressing mode g LD AL,P0 ADD BX,NUM1,NUM2 ADD BX NUM1 NUM2 microcontrollers and applications
- 24. ADDRESSING MODES ADDRESSING MODES Indirect addressing mode Without port increment Without port increment – LD AX,[SI] With post increment – LD AX,[SI]+ [ ] Index Long – LD AX [SI ff t] LD AX,[SI+offset] Index short – LD AX,DISP[SI] microcontrollers and applications
- 25. INSTRUCTIONS OF 80196 INSTRUCTIONS OF 80196 • Maximum number of operands can be up to 3. • The memory locations are treated as registers. The memory locations are treated as registers. • Each memory location used should be given a name. • Data transfer instructions – LD – ST – PUSH – POP microcontrollers and applications
- 26. INSTRUCTIONS OF 80196 INSTRUCTIONS OF 80196 • Arithmetic Instructions – ADD – ADC – SUB – SUBB – MULTIPLY – MULTIPLY SIGN NUMBERS – DIVIDE – DIVIDE SIGN NUMBERS DIVIDE SIGN NUMBERS microcontrollers and applications
- 27. INSTRUCTIONS OF 80196 INSTRUCTIONS OF 80196 • DATA Manipulation instructions – CLR – EXT – NOT • BIT Manipulation instructions – SETC – CLRC – EIDI microcontrollers and applications
- 28. INSTRUCTIONS OF 80196 INSTRUCTIONS OF 80196 • Logical instructions – AND – OR – XOR • Program control flow instructions – CALL • SCALL • LCALL – JMP • SJMP • LJMP • Conditional jump based on flags microcontrollers and applications
- 29. INSTRUCTIONS OF 80196 INSTRUCTIONS OF 80196 • Miscellaneous instructions – RST – TRAP microcontrollers and applications