This document discusses magnitude comparators and decoders. A magnitude comparator is a circuit that compares two input numbers in binary form and determines if one is greater than, less than, or equal to the other. Magnitude comparators are used in CPUs. Decoders are circuits that convert binary input into unique output lines. Common types include 2-to-4 decoders, 3-to-8 decoders used for 7-segment displays, and 4-to-10 decoders. Decoders have applications in memory systems, I/O selection, and displaying decimal numbers.

1. DIGITAL LOGIC DESIGN
MAGNITUDE COMPARATOR & DECODER

2. COMPARATOR
The comparison of two numbers is an operation
that determines if one number is greater then, less
then or equal to other numbers.
E.g.
1 < 2, 4 > 3 or 4 = 4.
MAGNITUDE COMPARATOR
A magnitude comparator is a combinational circuit that
compares two numbers, A and B, and determines their
relative magnitudes.

3. A digital comparator or magnitude comparator is a hardware electronic
device that takes two numbers as input in binary form and determines
whether one number is greater than, less than or equal to the other
number.
Comparators are used in central processing unit’s
(CPUs).
The magnitude comparator comes in the form of an
Integrated Circuit (IC) form.

4. LOGIC DIAGRAM
Truth Table

5. APPLICATIONS OF MAGNITUDE COMPARATOR
•These are used in the address decoding circuitry in computers and
microprocessor based devices to select a specific input/output device
for the storage of data.
•Process controllers
•Servo-motor control

6. DECODERS
• A decoder is combinational circuit that
converts binary information from an input
lines to a maximum of 2n unique output
lines. If the n bit coded information has
unused combinations, the decoder output
will have less then 2 outputs.
• The decoder presented here are called n-to-
m line decoder where m < 2 .
n
n

7. SOME APPLICATIONS
• Microprocessor memory system: selecting different
banks of
memory.
• Microprocessor I/O: Selecting different devices.
• Memory: Decoding memory addresses (e.g. in ROM).
• In our lab… decoding the binary input to activate the
LED
segments so that the decimal number can be displayed.

8. TYPES OF DECODERS
• 2 to 4 Decoder
• 3 to 8 Decoder
• 4 to 10 Decoder

9. 2-to-4-line DECODER with Enable
The decoder is enabled when E = 0. The output whose value = 0
represents the minterm is selected by inputs A and B.
The decoder is inactive when E=1 D0………D3 =1
A Decoder with enable input is called a decoder/ Demultiplexer.
Demultiplexer receives information from a single line and directs it
to the output lines.

10. 2-to-4-line DECODER with Enable
Logic diagram

11. 2-to-4-line DECODER with Enable
Logic truth table

12. 3-to-8-line DECODER
3 to 8 line Decoder is also called 7 segment
decoder.
The three inputs are decoded into eight outputs,
each output representing one of the minterm of the
three input variables.
The three inverters provide the complements of
inputs and each one of the eight AND gates
generates one of the minterms.
A three to eight line decoder can be used for
decoding any 3 bit cod to provide 8 outputs one for
each element of the code.

13. 3-to-8-line DECODER

14. If the input corresponds to minterm mi then the decoder
output i will be the single asserted output.
3-to-8-line DECODER

15. 4-to-10-line DECODER
Another reasonable design decision would be to
make all outputs equal to 0 when an invalid input
combination occurs. This would require ten 4-
inputs AND gates other possibilities may be
considered in any case one should not treat don’t
care condition indiscriminately but should try to
investigate their effect once the circuit is in
operation.

16. 4-to-10-line DECODER

17. 4-to-10-line DECODER