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Assembly Language
Multiplication Instruction
There are two types of multiplication instructions for multiplying the
binary data:
1) MUL Instruction 2)IMUL Instruction
MUL Instruction:
The MUL (Multiply) instruction handles unsigned data. The
instruction affect the Carry and Overflow flag.
MUL Instruction
MUL instruction multiply 8-,16-,32- bits operands by either AL,AX
register
Syntax:
MUL AL R/M8
MUL AX R/M8
Note that the product is stored in a register or a group of register twice
the size of operand.
MUL Instruction
Multiplicand Multiplier Product
AL r/m8 AX
AX r/m16 AX:DX
MUL Example
Mov al, 5h
Mov bl, 10h
Mov bl
Result:
Ax= 0050h, CF=0.
No over-flow. CF is zero because the upper half of Ax is zero.
IMUL Instruction
MUL Instruction:
The IMUL (Integer Multiply) instruction handles signed
data. The instruction affect the Carry and Overflow flag.
 Same syntax
 Uses the same operands as MUL instruction
 Preserve the sign of the product.
 Opcode= IMUL
IMUL Instruction
 IMUL sets the carry and overflow flags if the high- order product is
not signed to the extension of the low order product
Mov al, 48
Mov bl, 4
Imul bl ;Ax=00C0h , CF=1
AH is not a sign of extension of Al, so the over-flow flag is set
Division Instruction
Division Instruction:
The division operation generates two elements - a quotient and
a remainder. In case of multiplication, overflow does not occur
because double-length registers are used to keep the product. However,
in case of division, overflow may occur. The processor generates an
interrupt if overflow occurs.
There is two types of Division instruction
1) DIV instruction 2) IDIV Instruction
DIV/IDIV Instruction
The DIV (Divide) instruction is used for unsigned data and the IDIV
(Integer Divide) is used for signed data.
The dividend is in an accumulator. Both the instructions can work with
8-bit, 16-bit or 32-bit operands. The operation affects all six status
flags.
Following section explains three cases of division with different
operand size.
DIV/IDIV Instruction
When the divisor is 1 byte -
The dividend is assumed to be in the AX register (16 bits). After
division, the quotient goes to the AL register and the remainder goes to
the AH register.
DIVIDIV Instruction
When the divisor is 1 word -
The dividend is assumed to be 32 bits long and in the DX:AX registers.
The high-order 16 bits are in DX and the low-order 16 bits are in AX.
After division, the 16-bit quotient goes to the AX register and the 16-bit
remainder goes to the DX register.
DIVIDIV Instruction
When the divisor is double-word
The dividend is assumed to be 64 bits long and in the EDX:EAX
registers. The high-order 32 bits are in EDX and the low-order 32 bits
are in EAX. After division, the 32-bit quotient goes to the EAX register
and the 32-bit remainder goes to the EDX register.
Assembly language

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Assembly language

  • 2. Multiplication Instruction There are two types of multiplication instructions for multiplying the binary data: 1) MUL Instruction 2)IMUL Instruction MUL Instruction: The MUL (Multiply) instruction handles unsigned data. The instruction affect the Carry and Overflow flag.
  • 3. MUL Instruction MUL instruction multiply 8-,16-,32- bits operands by either AL,AX register Syntax: MUL AL R/M8 MUL AX R/M8 Note that the product is stored in a register or a group of register twice the size of operand.
  • 4. MUL Instruction Multiplicand Multiplier Product AL r/m8 AX AX r/m16 AX:DX
  • 5. MUL Example Mov al, 5h Mov bl, 10h Mov bl Result: Ax= 0050h, CF=0. No over-flow. CF is zero because the upper half of Ax is zero.
  • 6. IMUL Instruction MUL Instruction: The IMUL (Integer Multiply) instruction handles signed data. The instruction affect the Carry and Overflow flag.  Same syntax  Uses the same operands as MUL instruction  Preserve the sign of the product.  Opcode= IMUL
  • 7. IMUL Instruction  IMUL sets the carry and overflow flags if the high- order product is not signed to the extension of the low order product Mov al, 48 Mov bl, 4 Imul bl ;Ax=00C0h , CF=1 AH is not a sign of extension of Al, so the over-flow flag is set
  • 8. Division Instruction Division Instruction: The division operation generates two elements - a quotient and a remainder. In case of multiplication, overflow does not occur because double-length registers are used to keep the product. However, in case of division, overflow may occur. The processor generates an interrupt if overflow occurs. There is two types of Division instruction 1) DIV instruction 2) IDIV Instruction
  • 9. DIV/IDIV Instruction The DIV (Divide) instruction is used for unsigned data and the IDIV (Integer Divide) is used for signed data. The dividend is in an accumulator. Both the instructions can work with 8-bit, 16-bit or 32-bit operands. The operation affects all six status flags. Following section explains three cases of division with different operand size.
  • 10. DIV/IDIV Instruction When the divisor is 1 byte - The dividend is assumed to be in the AX register (16 bits). After division, the quotient goes to the AL register and the remainder goes to the AH register.
  • 11. DIVIDIV Instruction When the divisor is 1 word - The dividend is assumed to be 32 bits long and in the DX:AX registers. The high-order 16 bits are in DX and the low-order 16 bits are in AX. After division, the 16-bit quotient goes to the AX register and the 16-bit remainder goes to the DX register.
  • 12. DIVIDIV Instruction When the divisor is double-word The dividend is assumed to be 64 bits long and in the EDX:EAX registers. The high-order 32 bits are in EDX and the low-order 32 bits are in EAX. After division, the 32-bit quotient goes to the EAX register and the 32-bit remainder goes to the EDX register.