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Al_Nahrain University
College Of Information
Engineering
System departent
Prepared by ali jawad
Contents• Introduction
• When Interrupts occur
• Interrupt cycle
• Types of interrupts
• Hardware Interrupts
• Maskable & Non-Maskable Interrupts
• Software Interrupts
• 256 Interrupts
• Interrupt Service Routines
• Important definition in RTOS
• Conclusion
Introduction
• The meaning of ‘interrupts’ is to break the sequence of operation.
• While the Microprocessor is executing a program, an ‘interrupt’ breaks the
normal sequence of execution of instructions, diverts its execution to some
other program called Interrupt Service Routine (ISR).
• After executing . control returns the back again to the main
program(resume the context).
• A way to improve processor utilization (by execute the task according to its
priority).
Interrupts
The processor can be interrupted in the following ways..
• i) by an external signal generated by a peripheral.
• ii) by an internal signal generated by a special instruction in the program.
• iii) by an internal signal generated due to an exceptional condition which
occurs while executing an instruction.
Interrupt cycle
Processor checks for interrupt
If no interrupt:
fetch next instruction
If interrupt pending:
• Suspend execution of current program
• Save context
• Set PC to start address of interrupt handler routine
• Process interrupt
• Restore context and continue interrupted program
INSTRUCTION CYCLE (WITH INTERRUPTS)
STATE DIAGRAM
Type of interrupt
interrupt
Hardware
interrupt
Maskable
interrupt
Non
maskable
interrupt
Software
interrupt
256 types of
software
interrupt
Hardware Interrupts
• The interrupts initiated by external hardware by sending an appropriate
signal to the interrupt pin of the processor is called hardware interrupt.The
8086 processor has two interrupt pins INTR and NMI.The interrupts
initiated by applying appropriate signal to these pins are called hardware
interrupts of 8086.
• Used to handle external hardware peripherals ,
such as key boards , mouse , hard disks , floppy disks ,
DVD drivers, and printers.
Hardware interrupt
Maskable interrupt Hardware
interrupt
Maskable
interrupt
Non-
maskable
• A maskable interrupt is one that you can ignore by setting (or
clearing) a bit in an interrupt control register.Typically your
processor might allow multiple interrupt sources, but your design
only requires some of them.You would mask off the unused
interrupts so that noise on those lines doesn't cause problems.You
might also want to mask off interrupt sources that are real, but of
lower priority at particular points of your process.
• can be masked or make it pending
• can be selectively disabled
• high respond time
• use to interface with periphearl device
Hardware interrupt
Non-maskable
• Non-maskable interrupts do not get gated by the interrupt control
register -- they ALWAYS interrupt, no matter what state your processor is
in.Typically these are used for CRITICIAL or FATAL conditions, or for
system reset functions. If your system gets stuck in an infinite loop with
interrupts disabled, the NMI is your last hope to reset the system.
• Used during power failure
• cannot be masked or pending
• used for emergency purposed
• slow response time
• always be acknowledged
• never disabled
Hardware
interrupt
Maskable
interrupt
Non-
maskable
Software Interrupts
• The software interrupts are program instructions.These instructions are
inserted at desired locations in a program.While running a program, if
software interrupt instruction is encountered then the processor initiates
an interrupt.The 8086 processor has 256 types of software interrupts.The
software interrupt instruction is INT n, where n is the type number in the
range 0 to 255.
• Used by operating systems to provide various function
• Used as a communication mechanism between different parts of the
program
Software Interrupts
Types of software interrupt
• 1. type ‘0’ to type ‘4’ interrupt these are used for fixed operations
and hence are called dedicated Interrupts
• 2. type ‘5’ to type ’31’ interrupt not used by 8086,reserved for
higher Processors like 80286 80386 etc..
• 3. type ‘32’ to type ‘255’ interrupt available for user, called user
defined Interrupts these can be H/W Interrupts and activated
through Intr line or can be S/W Interrupts.
Interrupt Service Routines
Performs The Following :
1- Copy peripheral data into a buffer
2- Indicate to other code that data has
arrived
3-Acknowledge the interrupt (tell
hardware)
Important definition in RTOS
Interrupt Latency :
is the time between the generation of an interrupt by a device and the
servicing of the device which generated the interrupt.
Interrupt response :
is defined as the time between the reception of the interrupt and the start
of the user code which will handle the interrupt.
Interrupt recovery :
is defined as the time required for the processor to return to the
interrupted code.
Conclusion
• The CPU executes program, as soon as a key is pressed, the Keyboard
generates an interrupt.The CPU will response to the interrupt – read the
data. After that returns to the original program. So by proper use of
interrupt, the CPU can serve many devices at the “same time”
References
1- Silberschatz, Abraham, Greg Gagne, and Peter B. Galvin. Operating system
concepts. Wiley, 2018.
2-Tanenbaum, Andrew S. Modern operating system. Pearson Education, Inc,
2009.
3-Hoare,Charles Antony Richard. "Monitors: An operating system structuring
concept." The origin of concurrent programming. Springer, NewYork, NY, 1974.
272-294.
Interrupt in real time system

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Interrupt in real time system

  • 1. Al_Nahrain University College Of Information Engineering System departent Prepared by ali jawad
  • 2. Contents• Introduction • When Interrupts occur • Interrupt cycle • Types of interrupts • Hardware Interrupts • Maskable & Non-Maskable Interrupts • Software Interrupts • 256 Interrupts • Interrupt Service Routines • Important definition in RTOS • Conclusion
  • 3. Introduction • The meaning of ‘interrupts’ is to break the sequence of operation. • While the Microprocessor is executing a program, an ‘interrupt’ breaks the normal sequence of execution of instructions, diverts its execution to some other program called Interrupt Service Routine (ISR). • After executing . control returns the back again to the main program(resume the context). • A way to improve processor utilization (by execute the task according to its priority).
  • 4. Interrupts The processor can be interrupted in the following ways.. • i) by an external signal generated by a peripheral. • ii) by an internal signal generated by a special instruction in the program. • iii) by an internal signal generated due to an exceptional condition which occurs while executing an instruction.
  • 5. Interrupt cycle Processor checks for interrupt If no interrupt: fetch next instruction If interrupt pending: • Suspend execution of current program • Save context • Set PC to start address of interrupt handler routine • Process interrupt • Restore context and continue interrupted program
  • 6. INSTRUCTION CYCLE (WITH INTERRUPTS) STATE DIAGRAM
  • 8. Hardware Interrupts • The interrupts initiated by external hardware by sending an appropriate signal to the interrupt pin of the processor is called hardware interrupt.The 8086 processor has two interrupt pins INTR and NMI.The interrupts initiated by applying appropriate signal to these pins are called hardware interrupts of 8086. • Used to handle external hardware peripherals , such as key boards , mouse , hard disks , floppy disks , DVD drivers, and printers.
  • 9. Hardware interrupt Maskable interrupt Hardware interrupt Maskable interrupt Non- maskable • A maskable interrupt is one that you can ignore by setting (or clearing) a bit in an interrupt control register.Typically your processor might allow multiple interrupt sources, but your design only requires some of them.You would mask off the unused interrupts so that noise on those lines doesn't cause problems.You might also want to mask off interrupt sources that are real, but of lower priority at particular points of your process. • can be masked or make it pending • can be selectively disabled • high respond time • use to interface with periphearl device
  • 10. Hardware interrupt Non-maskable • Non-maskable interrupts do not get gated by the interrupt control register -- they ALWAYS interrupt, no matter what state your processor is in.Typically these are used for CRITICIAL or FATAL conditions, or for system reset functions. If your system gets stuck in an infinite loop with interrupts disabled, the NMI is your last hope to reset the system. • Used during power failure • cannot be masked or pending • used for emergency purposed • slow response time • always be acknowledged • never disabled Hardware interrupt Maskable interrupt Non- maskable
  • 11. Software Interrupts • The software interrupts are program instructions.These instructions are inserted at desired locations in a program.While running a program, if software interrupt instruction is encountered then the processor initiates an interrupt.The 8086 processor has 256 types of software interrupts.The software interrupt instruction is INT n, where n is the type number in the range 0 to 255. • Used by operating systems to provide various function • Used as a communication mechanism between different parts of the program
  • 12. Software Interrupts Types of software interrupt • 1. type ‘0’ to type ‘4’ interrupt these are used for fixed operations and hence are called dedicated Interrupts • 2. type ‘5’ to type ’31’ interrupt not used by 8086,reserved for higher Processors like 80286 80386 etc.. • 3. type ‘32’ to type ‘255’ interrupt available for user, called user defined Interrupts these can be H/W Interrupts and activated through Intr line or can be S/W Interrupts.
  • 13. Interrupt Service Routines Performs The Following : 1- Copy peripheral data into a buffer 2- Indicate to other code that data has arrived 3-Acknowledge the interrupt (tell hardware)
  • 14. Important definition in RTOS Interrupt Latency : is the time between the generation of an interrupt by a device and the servicing of the device which generated the interrupt. Interrupt response : is defined as the time between the reception of the interrupt and the start of the user code which will handle the interrupt. Interrupt recovery : is defined as the time required for the processor to return to the interrupted code.
  • 15. Conclusion • The CPU executes program, as soon as a key is pressed, the Keyboard generates an interrupt.The CPU will response to the interrupt – read the data. After that returns to the original program. So by proper use of interrupt, the CPU can serve many devices at the “same time”
  • 16. References 1- Silberschatz, Abraham, Greg Gagne, and Peter B. Galvin. Operating system concepts. Wiley, 2018. 2-Tanenbaum, Andrew S. Modern operating system. Pearson Education, Inc, 2009. 3-Hoare,Charles Antony Richard. "Monitors: An operating system structuring concept." The origin of concurrent programming. Springer, NewYork, NY, 1974. 272-294.