I/O PORTS AND TIMERS
IN 8051 MICRO CONTROLLER

                             Dr. C. Saritha
                    Lecturer in Electronics
              SSBN Degree & PG College
             Anantapur - 515001
Input/Output Ports (I/O Ports)
 All8051 microcontrollers have 4 I/O ports
  each comprising 8 bits which can be
  configured as inputs or outputs.

 Allthe ports upon reset are configured as
  output, ready to use it as output port.

 To  use any of these ports as an input port,
  it must be programmed.
Port 0
Port0   occupies a total of 8 pins (pins
 32-39).
It can be used for input or output.
To use the pins of port o as both input
 and output ports, each pin must be
 connected externally to 10k-ohm pull up
 resistor.
This is due to fact that p0 is an open
 drain with external pull up resistors
 connected upon the reset.
Port0 with pull up resistor
Continue…

 Port0   is configured as o/p port:-
           BACK MOV A,#55H
                   MOV PO,A
                   ACALL DELAY
                   CPL A
                   SJMP BACK
Continue…
 To make the port o as i/p port, the port
 must be programmed by writing 1 to all the
 bits.
              MOV A,#FFH
               MOV PO,A
       BACK MOV A,PO
              SJMP BACK
Dual role of port 0
 Port0  is also designated as ADO-
 AD7,allowing it to be used for both address
 and data .

 When connecting 8051 to      an external
 memory, port0 provides both   address and
 data

 The 8051 multiplexes address and data
 through port0 to save pins.
Continue…
     When ALE=0, it provides data D0-D7 but
     when ALE=1 it has address A0-A7.

.
     ALE is used for multiplexing address and
     data with help of 74LS73.
Port1
 Port
     1 occupies a total of 8 pins, it can be
 used as input or output.

 This  port does not need any pull-up
 resistors since it already has pull-up
 resistor internally.

 Upon   reset ,port1 is configured as an o/p
 port.
Continue…
   Port1 is configured as o/p port:-
      BACK MOV A,#55H
               MOV P1,A
               ACALL DELAY
               CPL A
               SJMP BACK
Continue…
 To make port1 an i/p port, it must be
 programmed as such writing 1 to all its bits
            MOV A,#FFH
            MOV P1,A
      BACK MOV A,P1
            SJMP BACK
PORT 2
 Port2occupies a total of 8 pins, it can be
 used as i/p or o/p.

 Justlike p1,port2 does not need any pull-
 up resistor since it has pull-up resistor
 internally.

 Upon    reset, port2 configured as an o/p.
Continue…
   Port2 is configured as o/p port:-
      BACK MOV A,#55H
               MOV P2,A
               ACALL DELAY
               CPL A
               SJMP BACK
Continue…
 To make port2 an i/p port, it must be
 programmed as such writing 1 to all its bits
            MOV A,#FFH
            MOV P2,A
      BACK MOV A,P2
            SJMP BACK
Dual role of port2

 Port2  must be used along with p0 to
 provide the 16 bit address for the external
 memory.

 Port2  is designated as A8-A15,indicating
 its dual function
PORT 3
  port3 occupies a total of 8 pins. It can be
  used as i/p or o/p .
 P3 does not need any pull up resistor same
  as p1 and p2 did not.
 Port3 is configured as o/p port upon reset .
 Port3 has the additional function of providing
  some extremely important signals such as
  interrupts
Alternate Pin-functions
Timers/counters

          Timers/Counters




Timer0/Counter0     Timer1/Counter1
Continue…
They can be used as:
1 Timer:
 Timers are used as time delay generator.
    The clock source is the internal crystal
  frequency of the 8051.
2 counter:
   Which counts number of events.
      External input from input pin to count the
  number of events on register
Registers used in Timer/counter
   Register pairs (TH0,TH1),(TL0,TL1) form
    16-bit Timer/Counter registers.

 These   are instructions for reading and
  writing and they are bit wise
 One 8 bit mode register-TMOD.


 One   8 bit control register-TCON.
TMOD Register
      Both timer 0 and timer 1 use the same
    register called TMOD.

    It is an 8-bit register in which the lower 4
    bits are set aside for timer 0 and the upper 4
    bits are set aside for timer 1

    The lower 2 bits are used to set the timer
    and the upper 2 bits to specify the
Timer Mode (TMOD)



GATE C/T   M1    M0   GATE C/T   M1   M0


       Timer 1              Timer 0
 GATE       :-
               Gating control when set, the
 timer/counter is enabled only while the INTX
 Pin is high and the TRX control pin is set.

 C/T   :-
        This bit in the TMOD register is used
 to decide whether the timer is used as a
 delay generation or an event counter.
              If C/T=0,it is used as a delay
 generator.
Continue…
 M1:Mode bit 1
 M0: Mode bit 0
  M0 and M1 select the timer mode, there
 are three modes i.e., mode 0,mode 1,
 mode 2.
Modes of timers/counters
 Mode 0 : 5 bit prescaler(13 bit )
 Mode 1 : 16 bit timer
 Mode 2 : 8 bit Auto reload
 Mode 3 : TL 0 and TH0 are independent

           but TH0 controlled by TR1
           and TF1.
TCON Register
   This is an 8 bit register.

    The upper 4 bits of the register is used to
    store the TF and TR bits of both timer 0
    and timer 1.

     The lower 4 bits are set aside for
    controlling the interrupt bit.
Timer Control Register (TCON)



TF1   TR1 TF0   TR0 IE1   IT1   IE0   IT0
     TF1 [Timer1 over flow flag] :- Set by
    hardware when timer 1 counters over
    flows, cleared    by hardware as the
    processor vectors to the service routine.

 TR1    [Timer1 run control bit] :- Set/cleared
    by software to turn timer1 counter1 on/off.

 TF0     [Timer0 over flow flag] :- Set by
    hardware when timer /counters over flows,
    cleared by hardware as the processor
    vectors to the service routine.
 TR0    [Timer0 run control bit] :- Set/cleared by
    software to turn timer/counter on/off.

 IE1    [External interrupt1 edge flag] :- Set by
    CPU when the external interrupt edge is
    detected, cleared by the CPU when the
    interrupt is processed.

     IT1 [Interrupt 1 type control bit] :-
    Set/cleared by software to specify falling
    edge/low level triggered external interrupt.
 IE0 [External interrupt0 edge flag] :- Set by
 CPU when the external interrupt edge is
 detected, cleared by the CPU when the
 interrupt is processed.

 IT0  [Interrupt 0 type control bit] :-
 Set/cleared by software to specify falling
 edge/low level triggered external interrupt.
THANK YOU

I o ports and timers of 8051

  • 1.
    I/O PORTS ANDTIMERS IN 8051 MICRO CONTROLLER Dr. C. Saritha Lecturer in Electronics SSBN Degree & PG College Anantapur - 515001
  • 2.
    Input/Output Ports (I/OPorts)  All8051 microcontrollers have 4 I/O ports each comprising 8 bits which can be configured as inputs or outputs.  Allthe ports upon reset are configured as output, ready to use it as output port.  To use any of these ports as an input port, it must be programmed.
  • 3.
    Port 0 Port0 occupies a total of 8 pins (pins 32-39). It can be used for input or output. To use the pins of port o as both input and output ports, each pin must be connected externally to 10k-ohm pull up resistor. This is due to fact that p0 is an open drain with external pull up resistors connected upon the reset.
  • 4.
    Port0 with pullup resistor
  • 5.
    Continue…  Port0 is configured as o/p port:- BACK MOV A,#55H MOV PO,A ACALL DELAY CPL A SJMP BACK
  • 6.
    Continue…  To makethe port o as i/p port, the port must be programmed by writing 1 to all the bits. MOV A,#FFH MOV PO,A BACK MOV A,PO SJMP BACK
  • 7.
    Dual role ofport 0  Port0 is also designated as ADO- AD7,allowing it to be used for both address and data .  When connecting 8051 to an external memory, port0 provides both address and data  The 8051 multiplexes address and data through port0 to save pins.
  • 8.
    Continue…  When ALE=0, it provides data D0-D7 but when ALE=1 it has address A0-A7. .  ALE is used for multiplexing address and data with help of 74LS73.
  • 9.
    Port1  Port 1 occupies a total of 8 pins, it can be used as input or output.  This port does not need any pull-up resistors since it already has pull-up resistor internally.  Upon reset ,port1 is configured as an o/p port.
  • 10.
    Continue…  Port1 is configured as o/p port:- BACK MOV A,#55H MOV P1,A ACALL DELAY CPL A SJMP BACK
  • 11.
    Continue…  To makeport1 an i/p port, it must be programmed as such writing 1 to all its bits MOV A,#FFH MOV P1,A BACK MOV A,P1 SJMP BACK
  • 12.
    PORT 2  Port2occupiesa total of 8 pins, it can be used as i/p or o/p.  Justlike p1,port2 does not need any pull- up resistor since it has pull-up resistor internally.  Upon reset, port2 configured as an o/p.
  • 13.
    Continue…  Port2 is configured as o/p port:- BACK MOV A,#55H MOV P2,A ACALL DELAY CPL A SJMP BACK
  • 14.
    Continue…  To makeport2 an i/p port, it must be programmed as such writing 1 to all its bits MOV A,#FFH MOV P2,A BACK MOV A,P2 SJMP BACK
  • 15.
    Dual role ofport2  Port2 must be used along with p0 to provide the 16 bit address for the external memory.  Port2 is designated as A8-A15,indicating its dual function
  • 16.
    PORT 3  port3 occupies a total of 8 pins. It can be used as i/p or o/p .  P3 does not need any pull up resistor same as p1 and p2 did not.  Port3 is configured as o/p port upon reset .  Port3 has the additional function of providing some extremely important signals such as interrupts
  • 17.
  • 18.
    Timers/counters Timers/Counters Timer0/Counter0 Timer1/Counter1
  • 19.
    Continue… They can beused as: 1 Timer:  Timers are used as time delay generator.  The clock source is the internal crystal frequency of the 8051. 2 counter:  Which counts number of events.  External input from input pin to count the number of events on register
  • 20.
    Registers used inTimer/counter  Register pairs (TH0,TH1),(TL0,TL1) form 16-bit Timer/Counter registers.  These are instructions for reading and writing and they are bit wise  One 8 bit mode register-TMOD.  One 8 bit control register-TCON.
  • 21.
    TMOD Register  Both timer 0 and timer 1 use the same register called TMOD.  It is an 8-bit register in which the lower 4 bits are set aside for timer 0 and the upper 4 bits are set aside for timer 1  The lower 2 bits are used to set the timer and the upper 2 bits to specify the
  • 22.
    Timer Mode (TMOD) GATEC/T M1 M0 GATE C/T M1 M0 Timer 1 Timer 0
  • 23.
     GATE :- Gating control when set, the timer/counter is enabled only while the INTX Pin is high and the TRX control pin is set.  C/T :- This bit in the TMOD register is used to decide whether the timer is used as a delay generation or an event counter. If C/T=0,it is used as a delay generator.
  • 24.
    Continue…  M1:Mode bit1 M0: Mode bit 0 M0 and M1 select the timer mode, there are three modes i.e., mode 0,mode 1, mode 2.
  • 25.
    Modes of timers/counters Mode 0 : 5 bit prescaler(13 bit )  Mode 1 : 16 bit timer  Mode 2 : 8 bit Auto reload  Mode 3 : TL 0 and TH0 are independent but TH0 controlled by TR1 and TF1.
  • 26.
    TCON Register  This is an 8 bit register.  The upper 4 bits of the register is used to store the TF and TR bits of both timer 0 and timer 1.  The lower 4 bits are set aside for controlling the interrupt bit.
  • 27.
    Timer Control Register(TCON) TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
  • 28.
    TF1 [Timer1 over flow flag] :- Set by hardware when timer 1 counters over flows, cleared by hardware as the processor vectors to the service routine.  TR1 [Timer1 run control bit] :- Set/cleared by software to turn timer1 counter1 on/off.  TF0 [Timer0 over flow flag] :- Set by hardware when timer /counters over flows, cleared by hardware as the processor vectors to the service routine.
  • 29.
     TR0 [Timer0 run control bit] :- Set/cleared by software to turn timer/counter on/off.  IE1 [External interrupt1 edge flag] :- Set by CPU when the external interrupt edge is detected, cleared by the CPU when the interrupt is processed.  IT1 [Interrupt 1 type control bit] :- Set/cleared by software to specify falling edge/low level triggered external interrupt.
  • 30.
     IE0 [Externalinterrupt0 edge flag] :- Set by CPU when the external interrupt edge is detected, cleared by the CPU when the interrupt is processed.  IT0 [Interrupt 0 type control bit] :- Set/cleared by software to specify falling edge/low level triggered external interrupt.
  • 31.