While the semiconductor roadmap is about to locate in 16nm-FinFET (or Tri-Gate) era, power budget is being entitled major concern to contemporary electronics and future nanometer devices. In this work, a new Power Distribution Network (PDN), referred to as HiPDN, is disclosed for further fine-grain power saving and higher power integrity for supplies in multi-voltage domains. The proposed PDN employs two types of Integrated Voltage Regulators (IVR) with large difference in voltage regulation range. By combining the proposed PDN with the Adaptive Voltage Scaling (AVS) technique, voltage guard-bands can be mitigated to lower the safety margin for voltage variation, i.e., reducing DC set points, thereby effectively decreasing the overhead of power dissipation. In comparison to existing PDNs, theoretical results with a simple equivalent circuit model demonstrate an increase of power saving achieved by HiPDN, thus, allowing longer battery life. Finally, this work provides an on-chip power delivery methodology to improve power efficiency and a simple model to evaluate a PDN and its IVRs.
Low frequency ac transmission for power systems by Aamir SaleemAamir Saleem
Voltage instability is one of the major issue in
HVAC power network operating at 50 Hz frequency due to
limited power transfer capability and distance limit. The stable
operation of power system must be kept within limits to
increase the efficiency of power transmission system. In this
research Low Frequency AC (LFAC) transmission system has
been proposed as a new power transmission technology to
reduce the losses of transmission network and controlling the
reactive power using Flexible AC transmission device. A
LFAC Transmission lines operates at 16.7Hz frequency for
transmission of power from source to load and use two
Frequency converters at source and load side. The normal
operation of power system depends on the reactive power
flowing through the power transmission lines, which can be
adjusted by a flexible AC transmission device; Static
synchronous compensator. LFAC transmission lines with
STATCOM controller improve the Power system voltage
stability under various disturbances and enhance the power
transmission capability as compare to HVAC transmission.
The simulations are done in Matlab Simulink 2017a .The
Output of Matlab Simulink model shows that voltage will
become Stable and reactive power is compensated for best
performance for power system.
This document summarizes a paper that proposes a Green Power Zone (GPZ) concept to provide high quality electrical power. A GPZ would use custom power devices like a DVR, DSTATCOM, and UPQC to regulate voltage and power quality. It would receive power from two independent substations through solid state transfer switches to improve reliability. The GPZ center would monitor power quality and control devices to maintain a stable voltage supply closer to ideal levels, despite faults or interruptions from utilities. Simulation results demonstrated the GPZ's ability to compensate for issues like sags, swells, harmonics and imbalance.
This slide presents about the basic and importance about load shedding in smart microgrid distribution systems. Later of the class i will discuss about in detail on the process of executing the load shedding.
These slides present about islanding detection techniques in microgrid systems. Later on the classes other aspects of microgrid protection will be discussed in more detail
This document discusses distributed generation (DG), defined as small power generation units connected to distribution networks. It covers DG definitions, drivers for DG integration including environmental, economic, technological and regulatory factors. Key benefits of DG integration are improved reliability, power quality, reduced losses and costs. Various DG technologies are classified and compared. Optimal DG planning techniques aim to minimize losses and costs while satisfying constraints like voltage limits.
1) The document describes a technique called FAMPLC (Frequency and Amplitude Modulated Power Line Communication) that enables full-duplex communication over power lines. It modulates data onto the frequency and current of the power signal.
2) FAMPLC uses a DC to AC inverter to transmit data via frequency modulation of the power signal from a "server". A receiver extracts the data by measuring the pulse width and frequency. It transmits back to the server by imposing amplitude modulation onto the current using an active resistor dummy load.
3) The server extracts data from the current using a Thevenin Equivalent Converter circuit. This allows establishment of a bi-directional UART communication channel over
Voltage Sag and Harmonics Mitigation using Distributed Power Flow ControllerIRJET Journal
The document describes a Distributed Power Flow Controller (DPFC) that is presented as a new power flow controlling device to mitigate voltage sags and harmonics. The DPFC improves upon the Unified Power Flow Controller (UPFC) by eliminating the common DC link and distributing the series converter into multiple low-rating single-phase converters. This greatly reduces costs and improves reliability compared to the UPFC. The DPFC allows independent operation of the shunt and series converters, with active power exchanged through the transmission line at the third harmonic frequency instead of through a common DC link. The DPFC is simulated in MATLAB/Simulink to validate its ability to improve power quality during different types of faults.
Low frequency ac transmission for power systems by Aamir SaleemAamir Saleem
Voltage instability is one of the major issue in
HVAC power network operating at 50 Hz frequency due to
limited power transfer capability and distance limit. The stable
operation of power system must be kept within limits to
increase the efficiency of power transmission system. In this
research Low Frequency AC (LFAC) transmission system has
been proposed as a new power transmission technology to
reduce the losses of transmission network and controlling the
reactive power using Flexible AC transmission device. A
LFAC Transmission lines operates at 16.7Hz frequency for
transmission of power from source to load and use two
Frequency converters at source and load side. The normal
operation of power system depends on the reactive power
flowing through the power transmission lines, which can be
adjusted by a flexible AC transmission device; Static
synchronous compensator. LFAC transmission lines with
STATCOM controller improve the Power system voltage
stability under various disturbances and enhance the power
transmission capability as compare to HVAC transmission.
The simulations are done in Matlab Simulink 2017a .The
Output of Matlab Simulink model shows that voltage will
become Stable and reactive power is compensated for best
performance for power system.
This document summarizes a paper that proposes a Green Power Zone (GPZ) concept to provide high quality electrical power. A GPZ would use custom power devices like a DVR, DSTATCOM, and UPQC to regulate voltage and power quality. It would receive power from two independent substations through solid state transfer switches to improve reliability. The GPZ center would monitor power quality and control devices to maintain a stable voltage supply closer to ideal levels, despite faults or interruptions from utilities. Simulation results demonstrated the GPZ's ability to compensate for issues like sags, swells, harmonics and imbalance.
This slide presents about the basic and importance about load shedding in smart microgrid distribution systems. Later of the class i will discuss about in detail on the process of executing the load shedding.
These slides present about islanding detection techniques in microgrid systems. Later on the classes other aspects of microgrid protection will be discussed in more detail
This document discusses distributed generation (DG), defined as small power generation units connected to distribution networks. It covers DG definitions, drivers for DG integration including environmental, economic, technological and regulatory factors. Key benefits of DG integration are improved reliability, power quality, reduced losses and costs. Various DG technologies are classified and compared. Optimal DG planning techniques aim to minimize losses and costs while satisfying constraints like voltage limits.
1) The document describes a technique called FAMPLC (Frequency and Amplitude Modulated Power Line Communication) that enables full-duplex communication over power lines. It modulates data onto the frequency and current of the power signal.
2) FAMPLC uses a DC to AC inverter to transmit data via frequency modulation of the power signal from a "server". A receiver extracts the data by measuring the pulse width and frequency. It transmits back to the server by imposing amplitude modulation onto the current using an active resistor dummy load.
3) The server extracts data from the current using a Thevenin Equivalent Converter circuit. This allows establishment of a bi-directional UART communication channel over
Voltage Sag and Harmonics Mitigation using Distributed Power Flow ControllerIRJET Journal
The document describes a Distributed Power Flow Controller (DPFC) that is presented as a new power flow controlling device to mitigate voltage sags and harmonics. The DPFC improves upon the Unified Power Flow Controller (UPFC) by eliminating the common DC link and distributing the series converter into multiple low-rating single-phase converters. This greatly reduces costs and improves reliability compared to the UPFC. The DPFC allows independent operation of the shunt and series converters, with active power exchanged through the transmission line at the third harmonic frequency instead of through a common DC link. The DPFC is simulated in MATLAB/Simulink to validate its ability to improve power quality during different types of faults.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Sag/Swell Compensation by using BES DVR in Industrial Drives ApplicationsIRJET Journal
This document discusses using a Battery Energy Storage System (BESS) supported Dynamic Voltage Restorer (DVR) to compensate for voltage sags, swells, and harmonics in industrial drive applications. A DVR injects voltage in series with the distribution line to regulate the load voltage. It describes the components of a DVR including the voltage source inverter, injection transformers, filters, energy storage, and bypass switch. It then explains the operation and control of a DVR using synchronous reference frame theory to estimate reference voltages and generate PWM signals to inject compensating voltages. The control techniques allow a DVR with BESS to maintain constant load voltage magnitude during sags or swells while minimizing the rating of the voltage source
The document summarizes previous research on RF energy harvesting rectifiers and their limitations. It then introduces a proposed high voltage conversion, high sensitivity RF energy harvesting system comprising a bulk-to-source (BTMOS) differential-drive based rectifier to produce high efficiency. Low-pass upward impedance matching is applied at the rectifier input to increase sensitivity and output voltage. Dual-oxide-thickness transistors are used to maintain power efficiency at each rectifier stage. The system is targeted to achieve 3.3V output at -16dBm sensitivity without complex control circuits, addressing limitations of prior work.
A REVIEW PAPER ON A D-FACTS CONTROLLER: ENHANCED POWER FLOW CONTROLLERDHEERAJ DHAKAR
This document provides a review of distributed FACTS (D-FACTS) controllers, specifically the Enhanced Power Flow Controller (EPFC). The EPFC is a D-FACTS controller that functions similarly to a thyristor controlled series compensator (TCSC) but is distributed along transmission lines in small modules every 5-10 km. D-FACTS controllers offer advantages over conventional FACTS devices by being more cost effective, reliable, and not requiring breaks in transmission lines for installation. The EPFC works by injecting series impedance into lines using single turn transformers to control power flow without significantly increasing costs or complexity compared to traditional FACTS controllers.
Detection and analysis of power quality disturbances under faulty conditions ...IAEME Publication
This document discusses power quality disturbances in electrical power systems. It begins with an introduction that defines power quality and common power quality disturbances. It then discusses how power quality disturbances can be detected and analyzed under faulty conditions in a simulated four bus power system model in MATLAB/Simulink. Various types of faults are created at the load bus, and power quality disturbances are detected at the generator bus. The document provides classification of different types of power quality disturbances based on standards and considers causes and impacts of disturbances on power systems.
POWER QUALITY IMPROVEMENT IN TRANSMISSION LINE USING DPFCvivatechijri
This project presents the MATLAB Simulation model of the Distributed Power Flow Controller in Transmission line. This work will be a new component with the flexible ac transmission system, called as distributed power flow controller (DPFC). The DPFC will be derived from the unified power flow controller system (UPFC). The DPFC can be considered as a UPFC with a common dc link which is eliminated. The active power exchange between the series and shunt converters, through the common dc link in the UPFC, is now through the transmission lines at the third-harmonic frequency. DPFC has the same control ability as the UPFC, which adjusts line impedance, bus voltages, and the transmission lines.
This document reviews research on using Flexible AC Transmission System (FACTS) devices to enhance power system transient stability. It discusses different FACTS devices such as SVC, TCSC, UPFC, and their control capabilities. The document also reviews developments in semiconductor technologies that have improved FACTS devices, such as GTO, IGBT, and IGCT. It analyzes locations and feedback signals important for FACTS controllers to maximize stability enhancement. In conclusion, UPFC is identified as the most effective FACTS device for improving transient stability by providing independent control of voltage, impedance, and power flows.
Variable renewable energy sources like solar and wind power are growing rapidly worldwide, with investments in renewable power exceeding those in non-renewable sources in recent years. As the share of variable renewable energy increases in many power systems, grid codes are playing an important role in facilitating their integration while maintaining reliability, security, and quality of supply. Grid codes set technical requirements for generators connecting to the grid. They aim to address challenges from the variability and uncertainty of renewable energy sources while allowing for sustainable growth. Requirements in grid codes need to be tailored to each country's power system characteristics and adapted over time as the system evolves.
A DAPTIVE S UPPLY V OLTAGE M ANAGEMENT F OR L OW P OWER L OGIC C IRCU...VLSICS Design
With the rise in demand of portable hand held devic
es and with the rise in application of wireless sen
sor
networks and RFID reduction of total power consumpt
ion has become a necessity. To save power we
operate the logic circuitry of our devices at sub-t
hreshold. In sub-threshold the drain current is
exponentially dependent on the threshold voltage he
nce the threshold variation causes profound variati
on
of I
ON
and I
OFF
the ratio of which affect the speed of a circuit d
rastically. So to mitigate this problem we
present a adaptive power management circuit which w
ill determine the minimum required supply voltage
to meet the timing requirement. Also to reduce the
power overhead and avoid bulky coil and EMI noise
we used the switch capacitor power regulator to reg
ulate and manage power instead of linear dropout
(LDO) and Inductor base switch mode power converter
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
A novel low power high dynamic threshold swing limited repeater insertion for...VLSICS Design
In Very Large Scale Integration (VLSI), interconnect design has become a supreme issue in high speed ICs.
With the decreased feature size of CMOS circuits, on-chip interconnect now dominates both circuit delay
and power consumption. An eminent technique known as repeater/buffer insertion is used in long
interconnections to reduce delay in VLSI circuits. This paper deals with some distinct low power
alternative circuits in buffer insertion technique and it proposes two new techniques: Dynamic Threshold
Swing Limited (DTSL) and High Dynamic Threshold Swing Limited (HDTSL). The DTSL uses Dynamic
Threshold MOSFET configuration. In this gate is tied to the body and it limits the output swing. High
Dynamic Threshold Swing Limited (HDTSL) also uses the same configuration along with a high threshold
voltage(high-Vth). The simulation results are performed in Cadence virtuoso environment tool using 45nm
technology. By simulating and comparing these various repeater circuits along with the proposed circuits it
is analyzed that there is trade off among power, delay and Power Delay Product and the 34.66% of power
is reduced by using the high- Vth in HDTSL when compared to DTSL.
Regulatory Guidelines to set up Voltage Quality MonitoringLeonardo ENERGY
This session is part of the Clean Energy Regulators Initiative Webinar Programme.
Theme 2 - Pressure Points
Module 2: Voltage Quality Regulation
Voltage quality, sometimes called power quality or technical quality, covers a variety of disturbances in an electrical power system. It is mainly determined by the quality of the voltage waveform and it is an important aspect of the electricity service.
Customers are becoming increasingly sensitive to disturbances in voltage quality. This issue is particularly important taking into account the new regulatory frameworks which put strong emphasis on cost reduction, thereby potentially jeopardizing quality. When setting up a quality regulation framework, there are a number of basic issues that need to be considered first. This understanding is crucial in order to make the right choices in order to arrive at an effective voltage quality regulatory system. It is important to clearly define voltage quality and develop suitable indicators.
This presentation assesses the issue of what regulators need to consider whenever establishing a voltage quality regulatory framework for distribution networks (i.e. up to 35 kV). It presents a general set of guidelines that regulators could consider in introducing and developing voltage quality regulation. Regulation of five important voltage quality dimensions is considered: short-interruptions, voltage dips, flicker, supply voltage variation and harmonic distortion.
Simulation of D-STATCOM to study Voltage Stability in Distribution systemijsrd.com
This document presents a simulation study of a D-STATCOM (Distribution Static Compensator) to improve voltage stability in a distribution system. It first provides background on voltage dips and describes the structure of a STATCOM, which includes a voltage source inverter, transformer, and controller. The simulation model of the D-STATCOM and distribution network is developed using SimPowerSystems blocks. Simulation results show that without the D-STATCOM, voltage dips to 0.93 p.u. during a load change, but with the D-STATCOM the voltage is stabilized at 1.0 p.u., demonstrating its effectiveness in mitigating power quality issues like voltage instability.
This document provides guidelines for planning Switch Mode Power Supply (SMPS) based power plants. It discusses SMPS design technologies, features, and system configuration. SMPS power plants are more efficient and compact than conventional designs due to using high frequency switching. They have advantages like modular expandability, high efficiency, light weight, precise regulation, and compatibility with remote monitoring and control. The document provides guidance on calculating load requirements and selecting an appropriately sized SMPS power plant and battery.
Comparison of Dynamic Stability Response of A SMIB with PI and Fuzzy Controll...ijeei-iaes
Consumer utilities are non –linear in nature. This injects increased flow of current and reduced voltage with distortions which cause adverse effect on the stability of consumer utilities. To overcome this problem we are using a modern Flexible Alternating Current Transmission System controller i.e. distributed power flow controller (DPFC). This controller is similar to UPFC, which can be installed in a transmission line between the two electrical areas. In DPFC, instead of the common Dc link capacitor three single phase converters are used. In this paper we are concentrating on system stability (oscillation damping). For analyzing the stability of a single machine infinite bus system (SMIB) we have used PI controlled Distributed Power Flow Controller (DPFC) and Fuzzy controlled DPFC. All these models are simulated using MATLAB/SIMULINK. Simulation results shows Fuzzy controlled DPFC are better than PI controlled DPFC. The significance of the results are better stability and constant power supply.
Iaetsd minimization of voltage sags and swells using dvrIaetsd Iaetsd
The document discusses the use of a Dynamic Voltage Restorer (DVR) to minimize voltage sags and swells in a distributed power system. A DVR is a custom power device that uses a voltage source inverter, injection transformer, and energy storage to inject voltage into the distribution system and regulate the load voltage during faults and disturbances. It functions by injecting a compensating series voltage to keep the load voltage at its pre-fault value. This maintains the quality of power supplied to sensitive loads and prevents equipment issues caused by voltage variations.
Pe 2010 25-10-a facts device distributed power flow controllerSudeepthg Sudeepth
The document describes a new type of Flexible AC Transmission System (FACTS) device called the Distributed Power Flow Controller (DPFC). The DPFC is derived from the Unified Power Flow Controller (UPFC) by eliminating the common DC link between converters and distributing multiple single-phase series converters along the transmission line. This allows active power exchange between converters through the line using third harmonic frequencies instead of a DC link. The DPFC has the same control capabilities as the UPFC but offers improved reliability due to redundancy of series converters and lower cost due to smaller, isolated converters without high voltage insulation requirements. Experimental results from a scaled DPFC prototype are also presented.
International Journal of Engineering Research and Applications (IJERA) is a team of researchers not publication services or private publications running the journals for monetary benefits, we are association of scientists and academia who focus only on supporting authors who want to publish their work. The articles published in our journal can be accessed online, all the articles will be archived for real time access.
Our journal system primarily aims to bring out the research talent and the works done by sciaentists, academia, engineers, practitioners, scholars, post graduate students of engineering and science. This journal aims to cover the scientific research in a broader sense and not publishing a niche area of research facilitating researchers from various verticals to publish their papers. It is also aimed to provide a platform for the researchers to publish in a shorter of time, enabling them to continue further All articles published are freely available to scientific researchers in the Government agencies,educators and the general public. We are taking serious efforts to promote our journal across the globe in various ways, we are sure that our journal will act as a scientific platform for all researchers to publish their works online.
IRJET- Modified SIMPLE Protocol for Wireless Body Area NetworksIRJET Journal
This document proposes modifications to the SIMPLE routing protocol to improve its performance in wireless body area networks (WBANs). It first describes the SIMPLE protocol and its operation. It then proposes a modified forwarding function that selects the next hop node based on residual energy and distance to the sink node. Simulation results show that the proposed modifications improve throughput and energy efficiency compared to the original SIMPLE protocol, with fewer packet drops and dead nodes, higher packet delivery to the sink, and better residual energy levels over time.
Unified power quality conditioner for compensating power quality problem adIAEME Publication
This document describes a proposed Adaptive Neuro-Fuzzy Inference System (ANFIS) based Unified Power Quality Conditioner (UPQC) to improve power quality compensation performance. A UPQC uses two voltage source inverters to compensate for both voltage and current disturbances but has high DC link capacitor discharge times. The proposed system adds an ANFIS device to generate a bias voltage that maintains the DC link voltage at a lower level. ANFIS combines neural networks and fuzzy logic to approximate nonlinear functions from numerical and linguistic data. The generated fuzzy rules are trained using a neural network to produce the desired output. Analysis shows the proposed ANFIS-based UPQC provides better power quality compensation than controllers using neural networks,
Comparison of upqc and dvr in wind turbine fed fsig under asymmetric faultselelijjournal
This paper presents the mitigation of faults in wind turbine connected fixed speed induction generator using unified power quality conditioner and static compensator. The UPQC consists of shunt and series converters connected back-to-back through a dc-to-dc step up converter. The presence of the dc-to-dc step converter permits the UPQC to compensate faults for long duration. The series converter is connected to the supply side whereas the shunt converter is connected to the load side. The control system of the proposed UPQC is based on Id-Iq theory. The DVR consists of shunt and series converters connected back-to-back through a dc-to-dc step up converter. The presence of the dc-to-dc step converter permits the DVR to compensate faults for long duration. The series converter is connected to the supply side whereas the shunt converter is connected to the load side. The control system of the proposed DVR is based on
hysteresis voltage controlThe proposed wind turbine fed fixed speed induction generator is evaluated and simulated using MATLAB/SIMULINK environment with UPQC and DVR under asymmetric faults
This document summarizes a study on using energy storage to dampen inter-area oscillations in large power grids. The study proposes installing damping controllers using ultracapacitor energy storage systems at two locations in the Western Electric Coordinating Council grid. Dynamic simulations show the controllers significantly reduce oscillation duration when the communication delay is zero seconds, but performance degrades with a 1 second delay. An analytical method is presented to ensure stability margins in the damping control system.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Sag/Swell Compensation by using BES DVR in Industrial Drives ApplicationsIRJET Journal
This document discusses using a Battery Energy Storage System (BESS) supported Dynamic Voltage Restorer (DVR) to compensate for voltage sags, swells, and harmonics in industrial drive applications. A DVR injects voltage in series with the distribution line to regulate the load voltage. It describes the components of a DVR including the voltage source inverter, injection transformers, filters, energy storage, and bypass switch. It then explains the operation and control of a DVR using synchronous reference frame theory to estimate reference voltages and generate PWM signals to inject compensating voltages. The control techniques allow a DVR with BESS to maintain constant load voltage magnitude during sags or swells while minimizing the rating of the voltage source
The document summarizes previous research on RF energy harvesting rectifiers and their limitations. It then introduces a proposed high voltage conversion, high sensitivity RF energy harvesting system comprising a bulk-to-source (BTMOS) differential-drive based rectifier to produce high efficiency. Low-pass upward impedance matching is applied at the rectifier input to increase sensitivity and output voltage. Dual-oxide-thickness transistors are used to maintain power efficiency at each rectifier stage. The system is targeted to achieve 3.3V output at -16dBm sensitivity without complex control circuits, addressing limitations of prior work.
A REVIEW PAPER ON A D-FACTS CONTROLLER: ENHANCED POWER FLOW CONTROLLERDHEERAJ DHAKAR
This document provides a review of distributed FACTS (D-FACTS) controllers, specifically the Enhanced Power Flow Controller (EPFC). The EPFC is a D-FACTS controller that functions similarly to a thyristor controlled series compensator (TCSC) but is distributed along transmission lines in small modules every 5-10 km. D-FACTS controllers offer advantages over conventional FACTS devices by being more cost effective, reliable, and not requiring breaks in transmission lines for installation. The EPFC works by injecting series impedance into lines using single turn transformers to control power flow without significantly increasing costs or complexity compared to traditional FACTS controllers.
Detection and analysis of power quality disturbances under faulty conditions ...IAEME Publication
This document discusses power quality disturbances in electrical power systems. It begins with an introduction that defines power quality and common power quality disturbances. It then discusses how power quality disturbances can be detected and analyzed under faulty conditions in a simulated four bus power system model in MATLAB/Simulink. Various types of faults are created at the load bus, and power quality disturbances are detected at the generator bus. The document provides classification of different types of power quality disturbances based on standards and considers causes and impacts of disturbances on power systems.
POWER QUALITY IMPROVEMENT IN TRANSMISSION LINE USING DPFCvivatechijri
This project presents the MATLAB Simulation model of the Distributed Power Flow Controller in Transmission line. This work will be a new component with the flexible ac transmission system, called as distributed power flow controller (DPFC). The DPFC will be derived from the unified power flow controller system (UPFC). The DPFC can be considered as a UPFC with a common dc link which is eliminated. The active power exchange between the series and shunt converters, through the common dc link in the UPFC, is now through the transmission lines at the third-harmonic frequency. DPFC has the same control ability as the UPFC, which adjusts line impedance, bus voltages, and the transmission lines.
This document reviews research on using Flexible AC Transmission System (FACTS) devices to enhance power system transient stability. It discusses different FACTS devices such as SVC, TCSC, UPFC, and their control capabilities. The document also reviews developments in semiconductor technologies that have improved FACTS devices, such as GTO, IGBT, and IGCT. It analyzes locations and feedback signals important for FACTS controllers to maximize stability enhancement. In conclusion, UPFC is identified as the most effective FACTS device for improving transient stability by providing independent control of voltage, impedance, and power flows.
Variable renewable energy sources like solar and wind power are growing rapidly worldwide, with investments in renewable power exceeding those in non-renewable sources in recent years. As the share of variable renewable energy increases in many power systems, grid codes are playing an important role in facilitating their integration while maintaining reliability, security, and quality of supply. Grid codes set technical requirements for generators connecting to the grid. They aim to address challenges from the variability and uncertainty of renewable energy sources while allowing for sustainable growth. Requirements in grid codes need to be tailored to each country's power system characteristics and adapted over time as the system evolves.
A DAPTIVE S UPPLY V OLTAGE M ANAGEMENT F OR L OW P OWER L OGIC C IRCU...VLSICS Design
With the rise in demand of portable hand held devic
es and with the rise in application of wireless sen
sor
networks and RFID reduction of total power consumpt
ion has become a necessity. To save power we
operate the logic circuitry of our devices at sub-t
hreshold. In sub-threshold the drain current is
exponentially dependent on the threshold voltage he
nce the threshold variation causes profound variati
on
of I
ON
and I
OFF
the ratio of which affect the speed of a circuit d
rastically. So to mitigate this problem we
present a adaptive power management circuit which w
ill determine the minimum required supply voltage
to meet the timing requirement. Also to reduce the
power overhead and avoid bulky coil and EMI noise
we used the switch capacitor power regulator to reg
ulate and manage power instead of linear dropout
(LDO) and Inductor base switch mode power converter
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
A novel low power high dynamic threshold swing limited repeater insertion for...VLSICS Design
In Very Large Scale Integration (VLSI), interconnect design has become a supreme issue in high speed ICs.
With the decreased feature size of CMOS circuits, on-chip interconnect now dominates both circuit delay
and power consumption. An eminent technique known as repeater/buffer insertion is used in long
interconnections to reduce delay in VLSI circuits. This paper deals with some distinct low power
alternative circuits in buffer insertion technique and it proposes two new techniques: Dynamic Threshold
Swing Limited (DTSL) and High Dynamic Threshold Swing Limited (HDTSL). The DTSL uses Dynamic
Threshold MOSFET configuration. In this gate is tied to the body and it limits the output swing. High
Dynamic Threshold Swing Limited (HDTSL) also uses the same configuration along with a high threshold
voltage(high-Vth). The simulation results are performed in Cadence virtuoso environment tool using 45nm
technology. By simulating and comparing these various repeater circuits along with the proposed circuits it
is analyzed that there is trade off among power, delay and Power Delay Product and the 34.66% of power
is reduced by using the high- Vth in HDTSL when compared to DTSL.
Regulatory Guidelines to set up Voltage Quality MonitoringLeonardo ENERGY
This session is part of the Clean Energy Regulators Initiative Webinar Programme.
Theme 2 - Pressure Points
Module 2: Voltage Quality Regulation
Voltage quality, sometimes called power quality or technical quality, covers a variety of disturbances in an electrical power system. It is mainly determined by the quality of the voltage waveform and it is an important aspect of the electricity service.
Customers are becoming increasingly sensitive to disturbances in voltage quality. This issue is particularly important taking into account the new regulatory frameworks which put strong emphasis on cost reduction, thereby potentially jeopardizing quality. When setting up a quality regulation framework, there are a number of basic issues that need to be considered first. This understanding is crucial in order to make the right choices in order to arrive at an effective voltage quality regulatory system. It is important to clearly define voltage quality and develop suitable indicators.
This presentation assesses the issue of what regulators need to consider whenever establishing a voltage quality regulatory framework for distribution networks (i.e. up to 35 kV). It presents a general set of guidelines that regulators could consider in introducing and developing voltage quality regulation. Regulation of five important voltage quality dimensions is considered: short-interruptions, voltage dips, flicker, supply voltage variation and harmonic distortion.
Simulation of D-STATCOM to study Voltage Stability in Distribution systemijsrd.com
This document presents a simulation study of a D-STATCOM (Distribution Static Compensator) to improve voltage stability in a distribution system. It first provides background on voltage dips and describes the structure of a STATCOM, which includes a voltage source inverter, transformer, and controller. The simulation model of the D-STATCOM and distribution network is developed using SimPowerSystems blocks. Simulation results show that without the D-STATCOM, voltage dips to 0.93 p.u. during a load change, but with the D-STATCOM the voltage is stabilized at 1.0 p.u., demonstrating its effectiveness in mitigating power quality issues like voltage instability.
This document provides guidelines for planning Switch Mode Power Supply (SMPS) based power plants. It discusses SMPS design technologies, features, and system configuration. SMPS power plants are more efficient and compact than conventional designs due to using high frequency switching. They have advantages like modular expandability, high efficiency, light weight, precise regulation, and compatibility with remote monitoring and control. The document provides guidance on calculating load requirements and selecting an appropriately sized SMPS power plant and battery.
Comparison of Dynamic Stability Response of A SMIB with PI and Fuzzy Controll...ijeei-iaes
Consumer utilities are non –linear in nature. This injects increased flow of current and reduced voltage with distortions which cause adverse effect on the stability of consumer utilities. To overcome this problem we are using a modern Flexible Alternating Current Transmission System controller i.e. distributed power flow controller (DPFC). This controller is similar to UPFC, which can be installed in a transmission line between the two electrical areas. In DPFC, instead of the common Dc link capacitor three single phase converters are used. In this paper we are concentrating on system stability (oscillation damping). For analyzing the stability of a single machine infinite bus system (SMIB) we have used PI controlled Distributed Power Flow Controller (DPFC) and Fuzzy controlled DPFC. All these models are simulated using MATLAB/SIMULINK. Simulation results shows Fuzzy controlled DPFC are better than PI controlled DPFC. The significance of the results are better stability and constant power supply.
Iaetsd minimization of voltage sags and swells using dvrIaetsd Iaetsd
The document discusses the use of a Dynamic Voltage Restorer (DVR) to minimize voltage sags and swells in a distributed power system. A DVR is a custom power device that uses a voltage source inverter, injection transformer, and energy storage to inject voltage into the distribution system and regulate the load voltage during faults and disturbances. It functions by injecting a compensating series voltage to keep the load voltage at its pre-fault value. This maintains the quality of power supplied to sensitive loads and prevents equipment issues caused by voltage variations.
Pe 2010 25-10-a facts device distributed power flow controllerSudeepthg Sudeepth
The document describes a new type of Flexible AC Transmission System (FACTS) device called the Distributed Power Flow Controller (DPFC). The DPFC is derived from the Unified Power Flow Controller (UPFC) by eliminating the common DC link between converters and distributing multiple single-phase series converters along the transmission line. This allows active power exchange between converters through the line using third harmonic frequencies instead of a DC link. The DPFC has the same control capabilities as the UPFC but offers improved reliability due to redundancy of series converters and lower cost due to smaller, isolated converters without high voltage insulation requirements. Experimental results from a scaled DPFC prototype are also presented.
International Journal of Engineering Research and Applications (IJERA) is a team of researchers not publication services or private publications running the journals for monetary benefits, we are association of scientists and academia who focus only on supporting authors who want to publish their work. The articles published in our journal can be accessed online, all the articles will be archived for real time access.
Our journal system primarily aims to bring out the research talent and the works done by sciaentists, academia, engineers, practitioners, scholars, post graduate students of engineering and science. This journal aims to cover the scientific research in a broader sense and not publishing a niche area of research facilitating researchers from various verticals to publish their papers. It is also aimed to provide a platform for the researchers to publish in a shorter of time, enabling them to continue further All articles published are freely available to scientific researchers in the Government agencies,educators and the general public. We are taking serious efforts to promote our journal across the globe in various ways, we are sure that our journal will act as a scientific platform for all researchers to publish their works online.
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Comparison of upqc and dvr in wind turbine fed fsig under asymmetric faultselelijjournal
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hysteresis voltage controlThe proposed wind turbine fed fixed speed induction generator is evaluated and simulated using MATLAB/SIMULINK environment with UPQC and DVR under asymmetric faults
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INTER-AREA oscillations may result when large generation
and load complexes are separated by long transmission
lines. In a large power system, such as the Western
Interconnection, these oscillations are typically between 0.2
and 1.0 Hz and may persist for extended periods due to low
damping. There is a large economic motivation for mitigating
these oscillations. First, low frequency oscillations can lead to
a system breakup if the damping becomes too low. Second,
the power flow down some transmission lines is limited to
preserve small signal stability. Improving the small signal
stability allows higher power flows, which has a measurable
economic benefit.
Multiple approaches have been proposed for damping interarea
oscillations. In [1], [2], researchers investigated modulation
of static VAR compensators (SVC) for damping control
using active power flow as the control input. A proposed SVC
system for the Nordic power grid is described in [3]; operational
testing of the Nordic system is currently under way.
Modulation of the PDCI was proposed in [4]. Other potential
methods include thyristor braking and series impedance modulation.
The destabilizing effect of communications latency is
discussed in
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2) An IDVR uses two or more Dynamic Voltage Restorers (DVRs) connected to different transmission feeders with a common DC link, allowing active power exchange, while an IPFC uses voltage source converters to control active and reactive power flow in multiple transmission lines connected to a common DC link.
3) Simulation results show that both IDVR and IPFC can effectively mitigate faults by stabilizing voltages and currents, but the IDVR provides better harmonic performance in the compensated voltages and currents.
Power Quality Enhancement using DSTATCOM by Immune Feedback Control Algorithmijtsrd
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IRJET- Improved Electrical Power Supply to Trans-Amadi Industrial Layout, Por...IRJET Journal
This document presents an analysis of improving the electrical power supply to the Trans-Amadi Industrial Layout in Port Harcourt, Nigeria. The analysis models and simulates the existing 33kV network using ETAP software. It finds that some transformers are overloaded while others are underloaded. It is concluded that the system needs improvements. Recommendations include adding transformers to overloaded feeders, upgrading some transformers to higher capacities, replacing some transformers with lower capacities, and installing capacitor banks to improve the power factor.
This work includes the establishment of a Photovoltaic system connected to the grid by means of an inverter. The fundamental goal of the work is to incorporate an advanced active power flow management scheme in order to adopt load at any weather condition along with the advantage of maximum active power flow and zero harmonics from PV inverter to the grid. The outcome of analysis and control design of grid connected PV inverter using a Proportional-Integral (PI) control technique is based on synchronous dq rotating reference frame so as to achieve maximum output voltage and record the active power. It has been observed that the model provides a better rate of stability as compared to the existing topology.
IRJET-Power Quality Improvement by using CHB Inverter based DVRIRJET Journal
This document discusses the design and analysis of a Dynamic Voltage Restorer (DVR) using a 7-level cascade H-bridge inverter to improve power quality. A DVR is a custom power device that injects voltage into the distribution system to regulate load voltage during sags or swells. This DVR employs a multilevel cascade H-bridge inverter which generates voltage waveforms with low harmonic distortion and connects directly to the network without a transformer. The performance of the DVR is analyzed in MATLAB and simulation results show it effectively compensates voltage sags and improves power quality for sensitive loads.
Distribution Network Power Quality Improvement by D-STATCOM & DVR Under Vario...IRJET Journal
This document discusses simulation of a Distribution Static Compensator (DSTATCOM) and Dynamic Voltage Restorer (DVR) to improve power quality under fault conditions. It first provides background on power quality issues and defines DSTATCOM and DVR. It then outlines the methodology, including components of each system like the voltage source converter, isolation transformer, and energy storage. The results of simulations showing the DSTATCOM injecting current and DVR injecting voltage during faults to maintain power quality are presented. The document evaluates these custom power devices for mitigating the effects of faults on distribution systems.
Active power and frequency analysis of a smart grid – using matlabsimulink ap...eSAT Publishing House
This document presents a simulation of a smart grid model using MATLAB/SIMULINK to analyze active power and grid frequency. The smart grid model integrates 4 units of thermal power plants with a total capacity of 3600 MW and 6 units of wind power plants with a total capacity of 72 MW. The simulation analyzes the impact of load variations at different buses on frequency and active power. Under initial load conditions, the maximum and minimum frequencies were 50.29 Hz and 49.9 Hz, indicating stable operation. As loads increased, frequencies remained stable but active power values varied more. The analysis identifies load ranges that allow stable operation of the smart grid in terms of frequency deviation.
Optimization Technique for Power Quality Improvement using DSTATCOM Neural Ne...ijtsrd
This document reviews optimization techniques for power quality improvement using DSTATCOM with a neural network approach. It discusses how DSTATCOM and other custom power devices like DVR, UPQC can be used to improve power quality by mitigating issues like voltage sags, swells, harmonics, and reactive power. It also presents the configuration of a DSTATCOM system and a control algorithm using a backpropagation neural network to extract fundamental active and reactive power components and estimate harmonic currents for compensation under nonlinear loads. The proposed neural network control approach for DSTATCOM is aimed to improve power quality by compensating for harmonics, reactive power, and providing zero voltage regulation.
Various Custom Power Devices for Power Quality Improvement A Reviewijtsrd
Power electronic devices form a major part in today’s industrial and household applications. However, the power quality of these devices is highly degraded due to lot of reasons including voltage fluctuation and flicker, harmonics, transients, voltage imbalance, and many more. These voltage disturbances lead to maximum failures in electrical distribution systems. In this review paper, various techniques including both network reconfiguring and compensating type devices are discussed to ameliorate the power quality in the distribution systems. Various power quality issues and their characteristics have been depicted. Some of the techniques discussed to improve the power quality in distribution systems which include filters, unified power quality conditioner UPQC , dynamic voltage restorer DVR , and distribution static synchronous compensator D STATCOM . The design parameters and implementation of these techniques in electrical machines are also discussed. Mukesh Chandra Rav | Pramod Kumar Rathore "Various Custom Power Devices for Power Quality Improvement: A Review" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-6 | Issue-3 , April 2022, URL: https://www.ijtsrd.com/papers/ijtsrd49829.pdf Paper URL: https://www.ijtsrd.com/engineering/electrical-engineering/49829/various-custom-power-devices-for-power-quality-improvement-a-review/mukesh-chandra-rav
Voltage Regulation with Hybrid RES based Distributed Generation in the for Ac...IJMTST Journal
In this paper adaptive zone-based Volt/VAR management is proposed, which coordinates active
participation of DGs with conventional voltage regulation equipment. To achieve a flexible and scalable
solution while minimizing complexity and requirements for data-handling capability, DG management
systems are integrated with decentralized parts of the Volt/VAR management system in smaller
geographical zones. Coordination of DGs with conventional voltage regulation equipment is based on
predefined control hierarchies. However, to reduce requirements for data handling capability, the distribution
grid is divided into zones with individual voltage regulation and reactive support schemes. To add flexibility
and scalability, these zones can be combined into larger zones with a common Volt/VAR management
scheme. This is referred to as adaptive zoning. The results indicate that the control schemes successfully
restore voltage to within limits after disturbance of grid conditions. Adaptive zoning effectively reduces
system complexity and requirements for data handling capability, while still ensuring a grid-wide solution.
The proposed concept is implemented to hybrid RES method the simulation results are presented by using
Matlab/Simulink platform.
Comparision of pi, fuzzy & neuro fuzzy controller based multi converter unifi...IAEME Publication
The document summarizes a research paper that proposes a Neuro-Fuzzy controller for a Multi Converter Unified Power Quality Conditioner (MC-UPQC) device. The MC-UPQC uses multiple voltage source converters to compensate voltage sags/swells and harmonics on multiple feeder lines simultaneously. Conventionally, a PI controller is used for DC link voltage regulation but it has slow response. The proposed Neuro-Fuzzy controller combines the advantages of Fuzzy Logic and Neural Network controllers. It uses the error voltage and change in error as inputs to separate Fuzzy and Neural Network controllers. This improves the transient response and reduces DC link capacitor charging time compared to PI and Fuzzy controllers alone. Simulation results verify the effectiveness of
High-efficiency 2.45 and 5.8 GHz dual-band rectifier design with modulated in...IJECEIAES
This document presents the design of a dual-band rectifier for radio frequency energy harvesting. The rectifier is designed to operate with both continuous wave and modulated input signals over a wide input power range without using active components. It achieves this through a Wilkinson power divider that distributes power to two branches, each with an impedance matching network and voltage doubler rectifier using different diodes suited to different power levels. Simulation results show the rectifier achieves peak efficiencies of 67.0% and 49.1% for 2.45 GHz and 5.8 GHz continuous wave signals respectively. With modulated 16QAM and 8PSK input signals, efficiencies within 3-5% of continuous wave signals are obtained, demonstrating modulated
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
Abstract- This paper presents a major revision of the Universal Four Leg ‘DC Grid Laboratory Experimental Setup’. This revision includes the reduction of current loops, the increase of efficiency in the power stage, the expansion of measurement possibilities and the re-specification of the input/output range.
To deal with an ever present complication in the world of measurements, simple fuse holders are converted into dedicated probe measurement connectors. These connectors reduce large ground loops to a minimum.
Key features include a clear board layout and silkscreen, a tremendous reduction of semiconductor losses resulting in a heatsink-less power stage and easy, reliable probe and power connections. Provisions are made for a Single Board Computer (SBC) to read and control the Universal Four Leg V4. The SBC can also be used to communicate with external devices to allow for remote control of the Universal Four Leg and the presentation of measurements performed.
The Universal Four Leg is a power management device with a wide range of applications in both higher educational laboratory courses, as well as a dedicated grid manager in low voltage DC-grids.
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HIPDN: A POWER DISTRIBUTION NETWORK FOR EFFICIENT ON-CHIP POWER DELIVERY AND FINEGRAIN LOW-POWER APPLICATIONS
1. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
27
HIPDN: A POWER DISTRIBUTION NETWORK FOR
EFFICIENT ON-CHIP POWER DELIVERY AND FINE-
GRAIN LOW-POWER APPLICATIONS
Yangyang Tang1
, Xinru Wang2
, Nghia Tang3
, Bai Nguyen3
, Deukhyoun Heo3
and
Philipp Zhang4
1
Research Dept. of Hisilicon, Huawei, Shenzhen, China
2
Research Dept. of Hisilicon, Huawei, Shanghai, China
3
ARMAG, Washington State University, Pullman, WA
4
Research Dept. of Hisilicon, Huawei, Dallas, TX
ABSTRACT
While the semiconductor roadmap is about to locate in 16nm-FinFET (or Tri-Gate) era, power budget is
being entitled major concern to contemporary electronics and future nanometer devices. In this work, a
new Power Distribution Network (PDN), referred to as HiPDN, is disclosed for further fine-grain power
saving and higher power integrity for supplies in multi-voltage domains. The proposed PDN employs two
types of Integrated Voltage Regulators (IVR) with large difference in voltage regulation range. By
combining the proposed PDN with the Adaptive Voltage Scaling (AVS) technique, voltage guard-bands can
be mitigated to lower the safety margin for voltage variation, i.e., reducing DC set points, thereby
effectively decreasing the overhead of power dissipation. In comparison to existing PDNs, theoretical
results with a simple equivalent circuit model demonstrate an increase of power saving achieved by
HiPDN, thus, allowing longer battery life. Finally, this work provides an on-chip power delivery
methodology to improve power efficiency and a simple model to evaluate a PDN and its IVRs.
KEYWORDS
Power distribution network, integrated voltage regulator, power saving, adaptive voltage scaling
1. INTRODUCTION
Over decades, technology scaling which results in significant miniaturization of transistors has
brought enormous benefits to the semiconductor industry, such as devices with lower power
supply, higher compactness, more powerful performance and etc [4]. However, since 90nm node,
transistors have been scaled in an inconsistent track lacking several figures of merit, such as
doping concentrations, threshold voltage, and operating speed. So far, Moore's law predicts
downsize scaling to 7nm technology node or even more [23]. Under this circumstance, circuit
designers are facing various challenges such as tight power budget without degradation in
performance, variability in manufacturing or parametric variation, logic failures incurred from
different sources, high-energy particles, temperature sense, electro migration and etc [11]. Among
these challenges, the energy-efficiency issue has gained special attention from designers.
2. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
28
In literature, various techniques for energy-efficient computing have been developed [2,23,11].
Among them, two well-known power-saving techniques, which are Dynamic Voltage and
Frequency Scaling (DVFS) and Power Gating (PG), have been implanted in the latest commercial
products [15,20,8,25,10]. In practice, DVFS has been extended into full DVFS, or per core
DVFS, for the purpose of fine-grain voltage regulation [27,8,25,10]. The latter PG technique has
also been introduced as fine-grain improvement [7,10], where voltage regulation plays a strategic
role.
In many cases, the promising capabilities of DVFS and PG have been stemmed by slow off-chip
voltage regulators. For example, in DVFS the voltage supply and working frequency are
adaptively adjusted which results in minimum power consumption without affecting the
performance level. Due to slow off-chip voltage regulators, a considerable amount of energy is
wasted while the supply voltage is slowly rising and/or falling correspondingly to frequency
transition. The effectiveness of DVFS also significantly relies on the regulator's efficiency and
transient response. As a result, the concept of Fully Integrated Voltage Regulator (FIVR) has
been introduced and realized in Haswell processors [15], and Integrated Voltage Regulator (IVR)
has been implemented in POWER8 processor [8, 25]. IVR- or FIVR-based on-chip Power
Distribution Network (PDN) has drawn much attention.
In this paper, a novel PDN is presented to support fine-grain improvement in power-efficiency.
Compared with existing PDNs, the proposed PDN is able to mitigate power dissipations
associated with power delivery from source to load. To be precise, when being combined with
Adaptive Voltage Scaling (AVS) technique [5], this new PDN enables the reduction of voltage
safety margin by guard-banding approach. Voltage safety margin for both minimum voltage and
voltage variation is decreased, whereby power saving can be obtained by reducing power
consumption of voltage converters.
The rest of this paper is organized as follows: background of PDNs and related works are first
reviewed in Section 2. Section 3 presents the proposed PDN and its properties. From this new
PDN, power transmission losses, power saving obtained when combined with AVS, and total
power consumption are estimated in Section 4. Finally, conclusions are given.
2. RELATED WORK
Since Integrated Circuits (IC) were introduced into commercial products, the PDN illustrated in
Fig. 1 has been employed for a long while. The power delivery mechanism in Fig. 1 is
straightforward, with a single Voltage Regulator (VR) located on the motherboard [22].
After the very first phase of PDN, in [29], the second phase of power delivery network has been
presented, with migration from VR into IVR, as shown in Fig. 2. By utilizing IVR, instead of off-
chip VR, several advantages can be obtained, such as, high power integrity, power saving with
per-core voltage control, reduced PCB area, nanosecond voltage scaling speed, mitigation on IR
loss by power delivery at high voltage and low current, and etc [21, 30-32].
Recently, a more dedicated PDN has been developed in [16, 26], as shown in Fig. 3. In this PDN,
two stages of IVRs are utilized for on-chip power supply while an off-chip VR, which is located
on the motherboard, provides the input power for IVR-1, as in Fig. 3. IVR-1 down converts the
3. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
29
output voltage of VR and provides power for IVR-2, which in turn regulates its output to support
a load, for instance, a CPU core or an SoC. In the routing configuration of Fig. 3, a single IVR-1
is used while multiple IVRs-2 are disposed to support different voltage domains. Based on this
PDN, an extension work which couples the PG technique to provide reduction of silicon area on
power delivery network is introduced in [9].
3. HIPDN: THE POWER DISTRIBUTION NETWORK
In Fig. 4, the proposed PDN, referred to as HiPDN, is demonstrated. In contrast with the PDN in
Fig. 3, multiple IVRs-1 are implemented, instead of a single IVR-1, as shown in Fig. 4.
Moreover, regulated power is supplied to the load through three converter stages: VR to IVR-1
Figure 1.The very first phase of power delivery network, from VRM to IC package.
Figure 2. The second phase of power delivery network, from VRM to IVR, then to IC package.
4. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
30
Figure 3. The third phase of power delivery network, from VRM to IVR-1, and conversion from IVR-1 to IVRs-2, then
to IC package.
to IVR-2 to load, or two converter stages, VR to IVR-1 to load if it is needed, as shown by the
dashed lines and shadowed box in Fig. 4. To explain this voltage regulation mechanism,
properties and characteristics of IVRs-1 and IVRs-2 are detailed in Section 3.2.
As a preview of the HiPDN, its contributions can be summarized as following:
• Expandability: Different power conversion stages are designed for the purpose of mitigation
on power transmission losses and reduction of DC set point.
Figure 4. The proposed PDN, HiPDN, for on-chip SoC power supply.
5. Circuits and Systems: An Inter
Figure 5. The proposed PDN, HiPDN, with multiple IVRs
IVRs
• Heterogeneity: IVRs implemented in this PDN perform large range of voltage
regulation and narrow range of voltage regulation in different stages to optimize the
efficiency of individual IVRs,
well.
• Fine-adjustment: For the forthcoming nanometer devices, high power integrity and
high resolution in voltage adjustment not only are a must for circuit's power supply
but also enable fine
• Synergy: In combination with guard
power saving can be realized through reduction of voltage safety margin
minimum voltage set up
3.1. Expandability: power deliver
The first main contribution of the HiPDN is the utilization of multiple IVRs
IVR-1. In practice, multiple-domain DVFS with multiple output levels is required to deliver a
wide range of voltage supply for on
(SoC) architecture. An SoC deploys a considerable amount of computing blocks or subsystems,
which can be digital signal processing units, logic computing blocks, RF co
signal process, analog devices, and etc
RF transceiver, communication process, memory, application processor, connectivity, camera,
display, user interface and audio are powered by Power Management Integrated Circuits (PMIC)
[13]. Consequently, a wide range of power level, supply voltage, and working frequency are
required for those subsystems.
To regulate and finely adjust multiple voltage supplies over a wide range, multiple IVRs
implemented so that power supply can be
the followings.
Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
. The proposed PDN, HiPDN, with multiple IVRs-1 coupled to VR and conversion from
IVRs-1 to IVRs-2 for different voltage domains.
: IVRs implemented in this PDN perform large range of voltage
regulation and narrow range of voltage regulation in different stages to optimize the
efficiency of individual IVRs, per se, and the efficiency of the overall system as
: For the forthcoming nanometer devices, high power integrity and
high resolution in voltage adjustment not only are a must for circuit's power supply
but also enable fine-grain low-power techniques.
: In combination with guard-band approach of AVS technique, further
power saving can be realized through reduction of voltage safety margin
minimum voltage set up and voltage variation.
Expandability: power delivery system
The first main contribution of the HiPDN is the utilization of multiple IVRs-1, instead of a single
domain DVFS with multiple output levels is required to deliver a
wide range of voltage supply for on-line and/or off-line components in a modern System
(SoC) architecture. An SoC deploys a considerable amount of computing blocks or subsystems,
which can be digital signal processing units, logic computing blocks, RF components, mixed
, and etc [7,8,25]. For instance, in the SoC of a modern cell phone,
RF transceiver, communication process, memory, application processor, connectivity, camera,
display, user interface and audio are powered by Power Management Integrated Circuits (PMIC)
. Consequently, a wide range of power level, supply voltage, and working frequency are
To regulate and finely adjust multiple voltage supplies over a wide range, multiple IVRs
implemented so that power supply can be provided in an efficient manner, which is discussed in
national Journal (CSIJ), Vol. 1, No.3, July 2014
31
conversion from
: IVRs implemented in this PDN perform large range of voltage
regulation and narrow range of voltage regulation in different stages to optimize the
per se, and the efficiency of the overall system as
: For the forthcoming nanometer devices, high power integrity and
high resolution in voltage adjustment not only are a must for circuit's power supply
AVS technique, further
power saving can be realized through reduction of voltage safety margin for both
1, instead of a single
domain DVFS with multiple output levels is required to deliver a
line components in a modern System-on-Chip
(SoC) architecture. An SoC deploys a considerable amount of computing blocks or subsystems,
mponents, mixed-
. For instance, in the SoC of a modern cell phone,
RF transceiver, communication process, memory, application processor, connectivity, camera,
display, user interface and audio are powered by Power Management Integrated Circuits (PMIC)
. Consequently, a wide range of power level, supply voltage, and working frequency are
To regulate and finely adjust multiple voltage supplies over a wide range, multiple IVRs-1 are
provided in an efficient manner, which is discussed in
6. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
32
3.2. Heterogeneity: designs of IVRs
In this section, the designs of IVR-1 and IVR-2 are explained in details. There are mainly three
types of regulators. Linear regulators provide the best integration compactness and transient
response, but they compromise efficiency at low output voltage [19]. Similarly, switched-
capacitor regulators are able to offer high integration, but they also suffer from voltage-dependent
efficiency characteristic. However, several on-chip switched-capacitor regulators have been
reported to reach efficiency as high as 90% thanks to the self-regulation capability with stacked
voltage domain technique [2,24]. On the contrary, inductive switching regulators achieve high
efficiency over a wide range of output voltage levels. Although inductive switching regulators are
difficult to fully integrate on-chip due to bulky inductors, they are capable of delivering good
transient response with a high level of efficiency [19, 15].
In this work, inductive switching regulator and low-dropout (LDO) regulator have been
implemented for IVR-1 and IVR-2, respectively. Since we aim at high efficiency over a wide
range of output voltage levels, a buck converter is the choice for IVR-1. For IVR-2, because an
LDO achieves high efficiency only if the voltage drop is low while the current efficiency is fixed
[3, 14, 18], the difference between input voltage and output voltage of IVR-2 is locked in short
range, for instance, 500mV. In short, multiple IVRs-1 are implemented as the first voltage
conversion stage, and the second stage of voltage regulation is carried out by IVRs-2 over a
narrow range of voltage drop.
3.3. Fine-adjustment: fine-grain low-power applications
Since the 70's, technology scaling has led to transistor miniaturization and reduced the supply
voltage toward an incredible low range [4]. Besides, the turn-on voltage can be further reduced
via emergent techniques at fundamental physics level, for instance, the transistors beyond silicon
[2, 23, 12]. Currently, foundries still stick to the schedule for the coming tape-out or mass
production based on Si FET, for example, TSMC has introduced the FinFET process at 16nm
node [1], where supply voltage and threshold voltage are certainly going down.
In other words, the headroom for voltage regulation has been migrated from volts level to lower
than a hundred millivolts, so that fine-grain based voltage regulation is achieved [27]. Meanwhile,
variations including supply voltage fluctuation have caused reliability concern to modern
processes [17, 6]. Therefore, high resolution in voltage step and high Power Integrity (PI) have
become important characteristics of power supply. In literature, several LDOs have been reported
with featured high resolution in voltage step, as low as 3mV in [14].
7. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
33
Figure 6. The structure of a buck converter with additional filtering block.
Figure 7. The structure of an LDO with additional fine-grain regulation.
For high PI, in this paper, two noise rejection mechanisms are presented for buck converter and
LDO, respectively. In Fig. 6, an error amplifier and a power MOSFET are employed as an extra
filtering block for ripple rejection and spike suppression. This mechanism relies on the filtering
virtue of LDO, of which similar work has been introduced in [18]. For noise rejection in LDOs,
an additional fine-grain regulation line with sub-filtering network is clamped at the load. Beside
noise rejection, the fine-grain regulation network also delivers fast transient response.
As a conclusion, since the load supply is provided by LDOs, the LDOs must both reject noise at
the input while generating minimal noise at the output and the load. Both buck converter stage
and LDO stage are needed to enhance the ability of noise rejection.
8. Circuits and Systems: An Inter
3.4. Synergy: combination with AVS
In this section, another major contribution of the HiPDN is presented. Designers may have
ignored the implication of PDN to the AVS. In this work, we introduce the connections between
the PDN and the AVS so that the power consumption can be mitigated witho
other power-reduction technique.
In Fig. 8, voltage safety margin is depicted by guard
divided into five shares that allow for, process variation, temperature fluctuation, aging issue,
voltage variation, and minimum voltage
such as transient drop by Idi/dt raise DC set point. However, inc
Figure 8. By guard-banding approach, voltage safety margin takes into acc
temperature fluctuations, aging issues, and voltage variations
more power dissipation. Furthermore, the margin for voltage variation raises while bad load
condition is met.
The proposed HiPDN provides better resilience to AC ef
3.3 and also decreases the DC set point via the
4. POWER SAVING ACHIEVED
In this section, estimations of power saving achieved by HiPDN, without applying any other
techniques for energy-efficiency boost, are disclosed. The major reduction
consumption for power delivery systems
delivery and reductions on power consumption of regulators
4.1. Simplified model for transmission losses
From Fig. 1, Fig. 2, Fig. 3, and Fig.
PDN-4, as the corresponding PDN, can be derived, respectively. For the sake of simplicity, ES
ESLs, parasitic resistances, and capacitance have been simplified into three resistive variables,
Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
ombination with AVS
In this section, another major contribution of the HiPDN is presented. Designers may have
ignored the implication of PDN to the AVS. In this work, we introduce the connections between
the PDN and the AVS so that the power consumption can be mitigated without involving any
reduction technique.
, voltage safety margin is depicted by guard-banding approach. The safety margin is
divided into five shares that allow for, process variation, temperature fluctuation, aging issue,
tion, and minimum voltage [28]. In fact, DC effect such as IR drop and AC effect
raise DC set point. However, increasing DC set point introduces
banding approach, voltage safety margin takes into account process variations,
temperature fluctuations, aging issues, and voltage variations.
more power dissipation. Furthermore, the margin for voltage variation raises while bad load
The proposed HiPDN provides better resilience to AC effect, see the Fine-adjustment
and also decreases the DC set point via the Heterogeneity introduced in Section 3.2
OWER SAVING ACHIEVED BY HIPDN
In this section, estimations of power saving achieved by HiPDN, without applying any other
efficiency boost, are disclosed. The major reduction
for power delivery systems are in twofold, mitigation on transmission losses over
delivery and reductions on power consumption of regulators via shrinking voltage safety margin.
Simplified model for transmission losses
, and Fig. 5, the transmission losses for PDN-1, PDN-2, PDN
4, as the corresponding PDN, can be derived, respectively. For the sake of simplicity, ES
ESLs, parasitic resistances, and capacitance have been simplified into three resistive variables,
national Journal (CSIJ), Vol. 1, No.3, July 2014
34
In this section, another major contribution of the HiPDN is presented. Designers may have
ignored the implication of PDN to the AVS. In this work, we introduce the connections between
ut involving any
banding approach. The safety margin is
divided into five shares that allow for, process variation, temperature fluctuation, aging issue,
. In fact, DC effect such as IR drop and AC effect
reasing DC set point introduces
ount process variations,
more power dissipation. Furthermore, the margin for voltage variation raises while bad load
adjustment in Section
3.2.
In this section, estimations of power saving achieved by HiPDN, without applying any other
efficiency boost, are disclosed. The major reductions on power
are in twofold, mitigation on transmission losses over
tage safety margin.
2, PDN-3, and
4, as the corresponding PDN, can be derived, respectively. For the sake of simplicity, ESRs,
ESLs, parasitic resistances, and capacitance have been simplified into three resistive variables,
9. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
35
Rboard, Rpackage, and Rdie, which represent the equivalent resistance for connects of VR on
motherboard, the equivalent resistance for connects of IVRs in package, and the equivalent
resistance for connects of ICs or IVRs on die, respectively. Please note that Rboard, Rpackage, and
Rdie represent DC resistor in paths and also AC resistance incurred by parasitic effects, such as the
inductance of package leads. Therefore, power consumption for transmission over power delivery
Ptr can be expressed as,
P୲୰ = ∑ (I୧ିୠ୭ୟ୰ୢ
ଶ
൫Rୠ୭ୟ୰ୢ + jR୮ୟୡ୩ୟୣ൯ + I୧ି୮ୟୡ୩ୟୣ
ଶ
൫R୮ୟୡ୩ୟୣ + kRୢ୧ୣ൯ + I୧ିୢ୧ୣ
ଶ
Rୢ୧ୣ)
୧ୀଵ (1)
where Ii-board, Ii-package, and Ii-die represents the resultant current from power regulators flows
through related board, package, and die, respectively, for each load supply, j and k are variable
from the binary set (0, 1). Since different topologies are involved from Fig. 1 to Fig. 4,
configurations by j and k enable different connects for packaging and different connections for
die. N represents the number of load supply, for instance, N equals to 2 in the case of Fig. 3.
Moreover, for resultant currents from different power regulators, each of them depends on the
transmission voltage across different ends while total power supply to load Pps is constant, as
described as,
P୮ୱ = ∑ I୧ିୢ୧ୣV୧ିୢ୧ୣ
୧ୀଵ (2)
where Ii-die and Vi-die represent the supply current to load and the supply voltage to load,
respectively, which are defined by specifications.
4.2. Simplified model for power consumption of regulators
Besides transmission losses, power consumptions by regulators are also regarded as significant
proportions to total power consumption. In order to estimate the power consumption of regulators
Preg, a simple model is introduced, here, based on resultant voltage, resultant current and
efficiency of regulator, as follows,
P୰ୣ = ∑ (I୧ିୠ୭ୟ୰ୢV୧ିୖ(
ଵ
బ
− 1) + I୧ି୮ୟୡ୩ୟୣV୧ି୍ୖଵ(
ଵ
భ
− 1) + I୧ିୢ୧ୣV୧ି୍ୖଶ(
ଵ
మ
− 1))
୧ୀଵ (3)
where Vi-VR, Vi-IVR1, and Vi-IVR2 represent the output voltage from off chip voltage regulator, the
output voltage from IVR-1, and the output voltage IVR-2, respectively. Moreover, E0, E1 and E2
define the efficiency of off-chip regulator, the efficiency of IVR-1, and the efficiency of IVR-2,
respectively. While power supply to load is constant according to specification, as shown in (2),
load current and voltage drop for each end are differed for different power delivery systems.
Nevertheless, resultant voltages from different regulators are all composed of three proportions;
minimum voltage, transient voltage drop, namely transient response incurred by load change, e.g.,
IR drop and di/dt-drops caused by parasitics resistances and inductance. Thus, the DC set points
for different regulator can be expressed as,
Vୈିଵ = V୧ିୢ୧ୣ + tdଵ + I୧ିୠ୭ୟ୰ୢ(Rୠ୭ୟ୰ୢ + R୮ୟୡ୩ୟୣ + Rୢ୧ୣ) (4)
Vୈିଶ = V୧ିୢ୧ୣ + tdଶ + I୧ି୮ୟୡ୩ୟୣ(R୮ୟୡ୩ୟୣ + Rୢ୧ୣ) (5)
Vୈିଷ = V୧ିୢ୧ୣ + tdଷ + I୧ିୢ୧ୣRୢ୧ୣ (6)
10. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
36
Vୈିସ = V୧ିୢ୧ୣ + tdସ + I୧ିୢ୧ୣRୢ୧ୣ (7)
where VPDN-1, VPDN-2, VPDN-3, and VPDN-4 are DC set point for PDN-1, PDN-2, PDN-3, and PDN-4,
respectively. Also, td1, td2, td3, and td4 are transient voltage drop for PDN-1, PDN-2, PDN-3, and
PDN-4, respectively. From (4)-(7), DC set point depends on the structure of delivery system, as
explained in Section 3.2. Furthermore, resistive voltage drops are proportional to equivalent DC
resistance and as well AC resistance. In fact, supply grids within shorter distance to loads
introduce smaller voltage drops caused by parasitic resistance.
4.3. Estimation on total power saving
With (1) and (3), the power consumption for power delivery system Ptotal can be concluded as the
sum of transmission losses and power dissipations of regulators as written as follows,
P୲୭୲ୟ୪ = P୲୰ + P୰ୣ (8)
In this work, the simulated power supply scenarios are four power supplies, Vdds, as 0.9V, 1.2V,
1.5V, and 1.8V, with identical load current of 10A for each. In addition, voltages resulted from
different regulators should meet the minimum level requirement as power supply to load is
constant, see (2). Hence, resultant voltages of regulators in different PDNs are deductable.
First, in Fig. 9, total power losses of PDN-2 and PDN-4, normalized to PDN-1, are compared
over a range of R1 from 0.001 to 0.2 , and from 0.001 to 0.1 to for R2, while R3 = 0.001 .
In addition, td1, td2, and td4 are 0.32V, 0.08V, and 0.003V, respectively. Also, E0 and E1 are both
fixed at 95% and current efficiency as 100% for IVR-2. As illustrated, PDN-2 offers more than
30% reduction of total power loss when R1 addresses significant large resistance and R2 are, on
the contrary, in small resistance. However, if R1 is fixed as high as 0.1 , PDN-2 is not producing
gain in power saving with comparison to PDN-1, unless R2 drops as low as
Figure 9. Normalized total power losses of three PDNs versus R1 and R2 when td1, td2, and td4 are 0.32V,
0.08V, and 0.003V, respectively. Additionally, E0 and E1 are both fixed at 95%, and current efficiency as
100% for IVR-2, with R3 = 0.001 .
11. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
37
Figure 10. Normalized total power losses of three PDNs versus R2 and R3 when td1, td2, and td4 are 0.32V,
0.08V, and 0.003V, respectively. Additionally, E0 and E1 are both fixed at 95%, and current efficiency as
100% for IVR-2, with R1 = 0.1 .
Figure 11. Normalized total power losses of three PDNs versus td1 and td2 when R1, R2, and R3 are 0.1 ,
0.05 , and 0.01 , respectively. Additionally, E0 and E1 are both fixed at 95%, and current efficiency as
100% for IVR-2, with td4 = 0.003V.
12. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
38
close to 0.65 , as shown in Fig. 10. In contrast, PDN-4 is able to generate reduction on power
losses in the sweeping range for R2 from 0.05 to 0.1 , while R3 is swept from 0.0001 to
0.02 . Therefore, PDN-2 enables reduction on power consumption while equivalent resistance
through package R2 is small enough, i.e., the ratio of resistance through package R2 to resistance
through motherboard R1 is sufficiently small. Meanwhile, PDN-4 achieves lower power losses
even in the case of large resistance R2. One should note that PDN-3 is not discussed in the work
because its total power consumption is not good in comparison to the remaining three PDNs.
Second, by sweeping the transient voltage drop for PDN-1, td1, and the transient voltage drop for
PDN-2, td2, normalized power losses of PDN-2 and PDN-4 to PND-1 are demonstrated in Fig.
11, with constant td4 of 0.003V. It can be observed that PDN-4 obtains gain in power savings
while td1 is swept from 0.001V to 0.64V and td2 is swept from 0.001V to 0.16V, but for PDN-2, its
power consumption increases instead. While Fig. 11 is generated with R1, R2, and R3 are fixed at,
0.1 , 0.05 , and 0.01 , respectively, Fig. 12 is obtained with R1, R2, and R3 are 0.1 , 0.025 ,
and 0.005 , respectively. From Fig. 11 and Fig. 12, it can be seen that PDN-2 delivers large
power savings only if R2 is regarded as a small proportion to R1. In contrast, PDN-4 enables
power reduction even in a power delivery system with large resistance through motherboard as
well as for resistance through package and large resistance through die.
Third, Fig. 13 illustrates the effect of both off-chip regulator’s efficiency and IVR-1’s efficiency
on the power saving performances of PDN-4 and PDN-2 relative to that of PDN-1, by sweeping
E0 and E1, while R1, R2, and R3 are set as 0.1 , 0.05 , and 0.01 , respectively. It can be seen that
PDN-4 achieves power saving without placing stricter requirements on the design of the voltage
regulators as compared to PDN-2.
Figure 12. Normalized total power losses of three PDNs versus td1 and td2 when R1, R2, and R3 are 0.1 ,
0.025 , and 0.005 , respectively. Additionally, E0 and E1 are both fixed at 95%, and current efficiency as
100% for IVR-2, with td4 = 0.003V.
13. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
39
Figure 13. Normalized total power losses of three PDNs versus E0 and E1 when R1, R2, and R3 are 0.1 ,
0.05 , and 0.01 , respectively. Additionally, current efficiency for IVR-2 is fixed at 100%, with td1 = 0.
32V, td2 = 0.08V, and td4 = 0.003V.
To sum up, the following conclusions can be drawn,
• With comparison to PDN-1 and PDN-4, PDN-2 is able to deliver large reduction in
power consumption only if small resistance (including DC and AC effects of parasitics)
is assumed in the power delivery system, especially, the resistance through package.
• In contrast, the power saving advantage of PDN-4 is relatively insensitive to parasitic in
the power delivery system. Power saving can still be achieved by adopting PDN-4 in a
system with large resistances R1, R2, and R3.
• For both PDN-2 and PDN-4, voltage regulators are required to have high efficiency to
enable power reduction. Nevertheless, in comparison with PDN-2, PDN-4 requires lower
efficiencies for VR and IVR-1 to achieve the same amount of power reduction.
6. CONCLUSIONS
As energy-efficiency becomes a major concern, circuit designers have spent much effort to
improve the performance of power distribution network (PDN) so as to lower power budget. By
employing two types of Integrated Voltage Regulators (IVR) with large difference in voltage
regulation range, the proposed PDN, referred to as HiPDN, enables power saving and higher
power integrity for supplies in multi-voltage domains. First, the HiPDN achieves the reduction of
14. Circuits and Systems: An International Journal (CSIJ), Vol. 1, No.3, July 2014
40
transmission losses associated with power delivery. Second, when being combined with the
voltage guard-banding approach from the Adaptive Voltage Scaling (AVS) technique, the
proposed PDN reduces voltage safety margin for minimum supply voltage and as well voltage
variation, and thus additional power saving can be achieved. In comparison with existing PDNs,
theoretical results based on a simple equivalent circuit model demonstrate an increase of power
efficiency achieved by HiPDN via reduction of transmission losses and lower dissipations by
voltage regulators themselves. As a consequence, extending battery life can be achieved when
HiPDN is applied. Additionally, this theoretical analysis model is suitable to guide the design of
PDNs and IVRs.
ACKNOWLEDGEMENTS
This research has been supported by the HiFET project of Hisilicon.
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