Presentation by Kobi Hasharoni, Compass-EOS on creating a high end routing platform using optical interconnects

1. © 2012 Compass EOS Confidential
1
High end routing platform using
optical interconnects
Kobi Hasharoni
February 2013

2. © 2012 Compass EOS Confidential
2
Outline
§ Introduction
§ The router bottleneck
problem
§ The solution - photonics
§ The compass solution
using optical
interconnects

3. © 2012 Compass EOS Confidential
3
The exploding demand for BW
§ With the penetration of FTTx,
Mobility and Video, the
demand for BW continues to
accelerate.
§ Yet today’s network infra-
structure has already maxed
out in terms of size, BW,
power, high cost and
weight.
§ Current vendors offer no
solution that will allow to
scale forward.
§ An order of magnitude
improvement is required

4. © 2012 Compass EOS Confidential
4
The price to pay 1: Power
Worldwide
electricity
consump2on
in
telecom
operator
networks
(S.
Lambert
et.
al.,
Op0c
Express
Vol.
20
2012)
q The total electricity
consumption of routers
will exceed 350TW/h/y
in 2013
q This amounts to about
2% of the total electrical
power in the world!
q However, the growth
rate of ICT is ~40%
annually!
q Core routers are
responsible for most of
the power consumption
in ICT

5. © 2012 Compass EOS Confidential
5
The price to pay 2: Size & Weight
§ Weight: 740 kg 275 kg
§ H×W×D: 2.1×0.6×1 m 0.44×0.95×0.78 m

6. © 2012 Compass EOS Confidential
6
L2TP
ISSU
Current Routing Solutions
Overly Complex Monolithic Routers
…
It
Doesn’t
Have
To
Be
This
Way

7. © 2012 Compass EOS Confidential
7
Outline
§ Introduction
§ The router bottleneck
problem
§ The solution - photonics
§ The compass solution
using optical
interconnects

8. © 2012 Compass EOS Confidential
8
Router Architecture (1)
Input ports
Input ports
Output ports
Output ports
Ingress
Buffer
Ingress
Forward
Engine
To
Switch
Buffer
Queing
&
Egress
Buffer
Egress
Forward
Engine
From
Switch
Buffer
Ingress
Buffer
Ingress
Forward
Engine
To
Switch
Buffer
Queing
&
Egress
Buffer
Egress
Forward
Engine
From
Switch
Buffer

9. © 2012 Compass EOS Confidential
9
Processing
Traffic
Fabric
Processing
Traffic
Chip
to
chip
interconnect

10. © 2012 Compass EOS Confidential
10
Router Architecture (2)
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
iB
iF
i
eB
eF
e
Chip
to
Chip
Board
to
Board
Rack
to
Rack
Conveying
data
between
linecards
is
the
largest
boIleneck
in
core
router
design

11. © 2012 Compass EOS Confidential
11
• Copper
transmission
lines
suffer
from
loss:
• Resis>ve
loss
(skin
effect)
• Dielectric
loss
• Impedance
mismatch
• Crosstalk
• Loss
could
be
as
high
as
30dB
and
is
frequency
dependent
• Decision
feedback
equaliza>on
may
use
upwards
of
200mW
per
10Gb/s
channel!
• Interconnect
length
is
limited
Problem #1: connectivity

12. © 2012 Compass EOS Confidential
12
Problem #2: density
§ Q: How do you get all of the needed BW into a single
CMOS chip?
§ A: Not with BGA technology, its limited in scale and has
run out of capacity.
• Option 1: split the data into several CMOS chips
• Option 2: push the limit of electrical SerDes to very high data
rates using 20nm CMOS or lower (?)
• Even if you push the limit, you cannot drive high frequency
signals efficiently on the PCB!

13. © 2012 Compass EOS Confidential
13
Outline
§ Introduction
§ The router bottleneck
problem
§ The solution – use
photonics
§ The compass solution
using optical
interconnects

14. © 2012 Compass EOS Confidential
14
Photonics Advantages
§ Insensi>ve
to
data
rate
§ Small
power
consump>on
§ Negligible
crosstalk
§ 300m
serial
link,
<1dB/km
loss
(mul>mode
op>cs)
§ Efficiency
is
high
if
using
parallel
links
§ Minimal
footprint
on
the
CMOS
chip

15. © 2012 Compass EOS Confidential
15
From Copper to Photons
Processing
Traffic
Fabric
Processing
Traffic
An
op2cal
interconnect
between
the
rou2ng
elements
High
speed
serial
links
Copper
on
PCB

16. © 2012 Compass EOS Confidential
16
The optical interconnect

17. © 2012 Compass EOS Confidential
17
An optical interconnect-based router
§ Need
to
establish
an
op>cal
connec>on
between
linecards
§ This
connec>on
must
be
data
rate
transparent
§ Need
to
move
large
amount
of
data
between
linecards
§ Minimal
power
consump>on
§ Backplane
should
be
passive
§ Put
an
op>cal
transceiver
on
each
router
§ Photons
are
data
rate
insensi>ve,
w/o
cross
talk
§ Use
parallel
op>cs
(2D
optoelectronic
matrices)
§ Do
the
analog
design
efficiently,
use
power
efficient
components
§ Use
fibers
for
the
backplane
–
absolutely
passive

18. © 2012 Compass EOS Confidential
18
Outline
§ Introduction
§ The router bottleneck
problem
§ The solution - photonics
§ The compass solution
using optical
interconnects

19. © 2012 Compass EOS Confidential
19
A New Router Architecture
Input ports
Input ports
Output ports
Output ports
Ingress
Buffer
Ingress
Forward
Engine
To
Switch
Buffer
Queing
&
Egress
Buffer
Egress
Forward
Engine
From
Switch
Buffer
Ingress
Buffer
Ingress
Forward
Engine
To
Switch
Buffer
Queing
&
Egress
Buffer
Egress
Forward
Engine
From
Switch
Buffer
• Queing
• Egress Processing
• Egress Buffer
• Queing
• Egress Processing
• Egress Buffer
• Switch fabric
EOS
EOS
Router
The
Compass
way
• Chip
to
Chip
Op>cal
interconnect
• True
Output
Switched
Router
• Switch
Fabric
eliminated
• No
ingress
side
queuing
• Maintaining
all
of
the
func>onality

20. © 2012 Compass EOS Confidential
20
Building an optical interconnect
Step
1:
optoelectronic
chips
A
12×14
matrix
of
VCSELs
A
12×14
matrix
of
photodiodes
A
12×14
matrix
of
microlenses
…….

21. © 2012 Compass EOS Confidential
21
Building an optical interconnect
Step
2:
Design
a
new
CMOS
• Queing
• Egress
processing
• Egress
buffer
• Switch
fabric
• Op>cal
transceiver
Analog
circuits

22. © 2012 Compass EOS Confidential
22
Building an optical interconnectBuilding an optical interconnect
Step
3:
assemble
op>cs
on
chip
VCSEL
matrix
PD
matrix

23. © 2012 Compass EOS Confidential
23
Building an optical interconnect
Step
4:
build
a
12×14
fiber
matrix

24. © 2012 Compass EOS Confidential
24
Building an optical interconnect
Step
5:
assemble
op>cs
on
PCB

25. © 2012 Compass EOS Confidential
25
Building an optical interconnect
Step
6:
Integrate
with
linecard
and
build
a
high
end
core
router

26. © 2012 Compass EOS Confidential
26
• Highest
aggregate
bandwidth
reported
for
an
op>cal
interconnect:
1.34Tb/s
full
duplex
• Data
density:
64Gb/s/mm2
• 168
bi-­‐direc>onal
8Gb/s
data
links
• Power
efficiency:
10.2
pJ/bit
(including
SERDES)
Building an optical interconnect
• The
op>cal
interconnect
enables
a
new
class
of
core
and
edge
routers:
• Lower
power
consump>on
• Smaller
size
• Lower
weight
• High
BW
u>liza>on
• Lower
cost

27. © 2012 Compass EOS Confidential
27
The Compass EOS core router
• 1.6
Tb/s
system
• 6
RU,
19’’
shelf
• 4
×
200
Gb/s
linecards
• 3kW
power
consump>on
• Front
to
back
air
flow
• Distributed
DC
power
supply
• Carrier
grade
• Full
L3
func>onality
• Mul>-­‐chassis
support
• 80×10GE,
8×100GE
• SW
configurable
10GE/
OC192/OTN
• NEBS/ETSI
compliant
SHIPPING

28. © 2012 Compass EOS Confidential
28
The Compass EOS core router
• Redundant
power
feeds
• Redundant
cooling
system
• Mul>-­‐chassis
ready
• Passive
op>cal
backplane

29. © 2012 Compass EOS Confidential
29
The path to a 2 Tb/s linecard
8Gb/s
×
168
channels
1.3
Tb/s
Scale
up
Scale
out
32Gb/s
×
336channels
10.8
Tb/s
200
Gb/s
linecard
2
Tb/s
linecard
8Gb/s
×
336
channels
2.7
Tb/s
32Gb/s
×
168
channels
5.4
Tb/s

30. © 2012 Compass EOS Confidential
30
TCO Analysis
3X to 4X Total Costs Reduction over 5 Years
$1,018,712
$3,386,195
$2,934,419
$3,262,824
$3,928,513
Lightbox
CRS-­‐3
FP-­‐140
Juniper
T4000
ASR9010
ALU
7750
FP3
Configura2on:
60x10GE
and
20x10G
POS
Includes:
CAPEX,
Power,
Cooling
&
Space
Costs

31. © 2012 Compass EOS Confidential
31
COMPASS EOS
THANK YOU
February 2013