ST Developers Conference 2016 - Silicon Photonics for the New Internet

1. October 4, 2016
Santa Clara Convention Center
Mission City Ballroom
Silicon Photonics
for the New Internet
Francesco Brianti

2. How ST Plays in the New Internet

3. The New Internet 3
Smart Driving
• Advanced safety
• Assisted driving
• Infotainment
• Traffic monitoring
Smart Home and City
• Home and building automation
• Urban monitoring and control system
• Smart metering and distribution
• Heating and energy control
• Smart LED lighting
• Security and surveillance
Smart Industry
• Enterprise gateways and routers
• Networked devices
• Human-machine interface
• Machine-to-Machine communication
• Connected farms
Smart Things
• Connected wearable devices
• Virtual Reality
• Gaming
• Tele-health
• Drones
Data center
Cloud computing
Networking

4. Where You “See” ST 4
Making driving safer, greener
and more connected
Enabling cities to make more of
available resources
Enabling the evolution of industry
towards smarter, safer and more
efficient factories and workplaces
Making homes smarter, for
better living, higher security,
and less waste
Making everyday things
smarter, connected and
more aware of their
surroundings

5. But ST is also Here 5
Making driving safer, greener
and more connected
Enabling cities to make more of
available resources
Enabling the evolution of industry
towards smarter, safer and more
efficient factories and workplaces
Making homes smarter, for
better living, higher security,
and less waste
Making everyday things
smarter, connected and
more aware of their
surroundings

6. First phase of the Internet
Expanding the Network

7. Evolution of the Internet 7
Source: DARPA
1969

8. Evolution of the Internet 8
Source: Brian Reid
1993

9. Second phase of the Internet
Rewiring the Data Center

10. Bits “Travel” Within The Data Center 10
Within Data Center (73.1%)
Storage, production and
development data, authentication
Data Center to Data Center (8.7%)
Replication, CDN, inter-cloud links
Data Center to User (18.2%)
Web, e-mail, VoD, …
Within Data Center
(75.4%)
Global Data Center traffic by destination
Source: Cisco Global Cloud index, 2014
2014

11. … Demanding a New DC Topology 11
Traditional Three-Tier architecture
• Hierarchical tree
• Most traffic leaves and enter datacenter
• Limited scalability
CORE
AGGREGATION
ACCESS
Designed for North – South traffic
Spine / Leaf architecture
• Uniform switching Fabric
• Most traffic stays within data center
• Scalable architecture
SPINE
LEAF
Designed for East – West traffic
CORE
1~20m
0.1~2km
2km~metro
40G 100G 200G/400G

12. …Increasing the Number of Ports 12
$0
$2
$4
$6
$8
$10
$12
0
2
4
6
8
10
12
14
2014 2015 2016 2017 2018 2019
Thousands
Millions
Average Selling Price
per Port (line)
100GbE Port
Shipments (Bars)
Source: CREHAN Research Inc.

13. … Requiring Economy of Scale 13
Cost
(CAPEX +OPEX)
Functionality [and Time]
(Range / accuracy / speed / size)
Discrete
Hybrid
Monolithic
Integrated 3D Optical Engine

14. How ST Silicon Photonics can help

15. Silicon Photonics
• Photonics
• Photonics is the technology associated with signal
generation, processing, transmission and detection
where the signal is carried by photons (i.e. light)
• Silicon Photonics
• Photonic devices produced within standard
silicon factory and with standard silicon processing
15

16. Bringing SiPho to Reality
• Produce in a high volume silicon wafer fab
• Repeatability and uniformity
• Standard design flow and volume production
• Make photonics design [very] similar to CMOS ICs design
• Have a library of available elementary devices allowing to manipulate the light in the same way
as electrical signals
• Have a standard automated design flow
• Manage supply chain from wafers to final product (the 3D optical engine)
• On-wafer testing for electrical and optical functionalities
• Volume production ensuring required quality standard
16

17. 300mm Photonics
Tool Set Portfolio
300mm PHOTONICS
Technological Platform
Wafer Supply Strategy 17
Etch
SiGe & Ge
epitaxies
193 nm
Litho
Low T° Dep
Ni,Co,Pt silicide
193 i
Existing Tools
• High volume
• Sub-90nm CMOS node tools
• 193nm/193i photolithography
• Improved process control versus 200mm

18. Electro Optical Wafer Sort
Integrated 3D Optical Engine
Schematic Capture
CAD simulation
Optical Die
Chip on Wafer Bonding
Crolles 200 and 300mm Wafer Fab
From Development to Prototype 18

19. Photonics Design Strategy 19
Brings dramatic increase in processing speed and significant power consumption reduction
Waveguide & optical splitter
Grating couplers Germanium PIN PD
High Speed
Phase Modulator

20. Integration Strategy 20
Electronic IC= CMOS or BiCMOS
Cu-pillar
Independent evolution for optimal technology platform
(process flow & design environment)
Opto-Electronic
System
Photonic IC
Ni-pillar
3D
Integration
Electronic
IC
Photonic
IC
F2F Cu-pillar process, 40µm pitch
7mm
11 mm
Opto-Electronic System = Photonic IC + Electronic IC
F2F Cu-pillar process, 40µm pitch

21. Testing Strategy
EIC PIC
EIC
PIC
OEWS
21
Optical Test
Optical fiber array head connected to laser instruments
Tunable CW laser source(s), driven by ATE test program during test execution
Power meters, triggered by ATE test program during test execution
Dynamic die alignment (x-y-z) through optical loop and proximity sensor
Optical tests integrated in the test program (EO std datalog output)
Electric Test
Cantilever “Half-Moon” probecard
Standard DC + Digital testing capability, without limitations vs EWS
Standard probing operation, including wafer mapping, load/unload, OCR,
networking etc.
Special anti-vibration environment (modified ATE and specific prober solution)

22. STsP10028
Ready for 100G PSM4 - QSFP28
22
3D Silicon
Photonics
STSP10028
1.3um CW
Laser or Lamp
testing assembly shown for simplicity
Fiber Attach
Electronic
IC
Photonic
IC
F2F Cu-pillar process, 40µm pitch
7mm
11 mm
Compliant to 100G PSM4 QSFP28 MSA specifications

23. Preparing for the Future

24. Pervasion of Optics 24
Chip-to-Chip
1 to 50 cm
Board-to-Board
50 to 100 cm
Rack-to-Rack
1 to 100 m
Metro and long-haul
0.1 to 80 km
Volumes
Distance
Optical Copper
Bandwidth x Length
favors optical
Historical cross over: 100Gb/s*m

25. Facilitated by SiPho 25
Silicon Photonics
Interposer with TSV
ASIC EIC
Optical Interposer with TSV and
Photonic Control IP embedded into ASIC
SiPho IC
SiPho Interposer
Optical Coupling
Classical Interposer
ASIC OIC
EIC
3D Silicon Photonics integrated on
Classic Interposer
Optical
Coupling
OIC
EIC
3D Silicon low cost
Package and IO coupling
OIC
EIC
SiPho 3D Chipset
3D Silicon
standalone

26. SiPho Turning the Corner
• Silicon Photonics technology is today an Industrial reality
• Usage of Silicon Photonics ST 3D Optical Engine in 100G QSP28 applications shows an
outstanding BOM reduction and assembly ease
• Silicon Photonics provides a sustainable, scalable, and viable path towards
On Board Optics for next generation networking equipment and infrastructure
There is nothing more powerful than an idea whose time has come – V. Hugo
26

27. Thank You