The document discusses the applications and features of microcontrollers. It provides examples of using microcontrollers for interfacing seven segment displays, temperature control, and other applications. It also discusses where microcontrollers can commonly be found, such as in cell phones, laptops, appliances, toys and more. The document outlines reasons for learning about microprocessors/controllers and provides an overview of the 8051 microcontroller, including its architecture, pins, registers and memory mapping.

1. Debasis Das

2. Applications of
Microcontrollers
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3. Simple Interfacing Examples
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4. Seven segment Interfacing
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5. Closed loop control system-
Temperature control
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6. Micro-controllers Can be
Found in..
 Personal information products: Cell
phone, pager, watch, pocket recorder, calculator
 Laptop components: mouse, keyboard, modem, fax
card, sound card, battery charger
 Home appliances: door lock, alarm
clock, thermostat, air conditioner, TV
remote, VCR, small refrigerator, exercise
equipment, washer/dryer, microwave oven
 Industrial equipment: Temperature/pressure
controllers, Counters, timers, RPM Controllers
 Toys: video games, cars, dolls, etc.
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7. Why do we need to learn
Microprocessors/controllers?
 The microprocessor is the core of computer
systems.
 Nowadays many communication, digital
entertainment, portable devices, are controlled by
them.
 A designer should know what types of components
he needs, ways to reduce production costs and
product reliable.
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8. Why Study Microcontroller
Will help understand how to
 Build useful applications
 Build programming and debugging skills
 Understand the insides of a computer
Helps learning computer design, operating
systems, compilers, embedded
systems, security and other topics.
 Microcontrollers have everything in a typical
computer: CPU, memory and I/O
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9. Microcontrollers
 Essentially a microprocessor with on-chip memories
and I/O devices
 Designed for specific functions
 All in one solution - Reduction in chip count
 Reduced cost, power, physical size, etc.
 Examples
 I 8051, MC68332, MC68HC11, PPC555
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10. Microprocessor
vs.
Microcontroller
Microprocessor Microcontroller
 CPU is stand- • CPU, RAM, ROM, I/O and
alone, RAM, ROM, I/O, time timer are all on a single
r are separate chip
 Designer can decide on the • Fixed amount of on-chip
amount of ROM, RAM and ROM, RAM, I/O ports
I/O ports • For applications in which
 expansive cost, power and space are
 versatile critical
 general-purpose • Single-purpose
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11. Application Areas-
Embedded Systems
 Special purpose computer system usually completely inside
the device it controls
 Has specific requirements and performs pre-defined tasks
 Cost reduction compared to general purpose processor
 Different design criteria
 Performance
 Reliability
 Availability
 Safety
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12. A Typical Microcontroller
 A smaller computer
 On-chip RAM, ROM, I/O ports...
 Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and
PIC 16X
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13. Typical Resources on
a Microprocessor/Controller
 CPU: Central Processing Unit
 I/O: Input /Output
 Bus: Address bus & Data bus
 Memory: RAM & ROM
 Timer
 Interrupt
 Serial Port
 Parallel Port
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14. Features of 8051
 4K bytes ROM
 128 bytes RAM
 Four 8-bit I/O ports
 Two 16-bit timers
 Serial interface
 64K external code memory space
 64K data memory space
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15. Block Diagram
External interrupts
On-chip Timer/Counter
Interrupt ROM for
On-chip Timer 1 Counter
Control program
code RAM Timer 0 Inputs
CPU
Bus Serial
4 I/O Ports
OSC Control Port
P0 P1 P2 P3 TxD RxD
Address/Data
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16. Block Diagram
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17. Pin Description of the 8051
P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0
P1.2 3 38 P
) 0.1(AD1)
P1.3
P1.4
4
5
8051 37
36
P0.2(AD2
P0.3(AD3)
)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14
(T1)P3.5 15 26 P
) 2.5(A13
(WR)P3.6 16 25 P2.4(A12
)
(RD)P3.7 17 24 P
) 2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
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18. Pin Description of the 8051
 The 8051 is a 40
pin device, but out
of these 40 pins, 32
are used for I/O.
 24 of these are
dual purpose, i.e.
they can operate as
I/O or a control line
or as part of
address or date
bus.
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19. MCS-51 “Family” of
Microcontollers
Feature 8031 8051 8052 8751
ROM NO 4kB 8kB 4kB UV
Eprom
RAM (Bytes) 128 128 256 128
128
TIMERS 2 2 3 2
I/O PINS 32 32 32 32
SERIAL PORTS 1 1 1 1
INTERRUPT 6 6 8 6
SOURCES
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20. MCS-51 Family
Configurations
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21. Pins of 8051-1
 Vcc（pin 40）：
 Vcc provides supply voltage to the chip.
 The voltage source is +5V.
 GND（pin 20）：ground
 XTAL1 and XTAL2（pins 19,18）
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22. Pins of 8051-2
 RST（pin 9）：reset
 It is an input pin and is active high（normally low）.
 The high pulse must be high at least 2 machine cycles.
 It is a power-on reset.
 Upon applying a high pulse to RST, the microcontroller
will reset and all values in registers will be lost.
 Reset values of some 8051 registers
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23. Pins of 8051-3
 /EA（pin 31）：external access
 There is no on-chip ROM in 8031 and 8032 .
 The /EA pin is connected to GND to indicate the code is
stored externally.
 /PSEN ＆ ALE are used for external ROM.
 For 8051, /EA pin is connected to Vcc.
 “/” means active low.
 /PSEN（pin 29）：program store enable
 This is an output pin and is connected to the OE pin of the
ROM.
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24. Pins of 8051-4
 ALE（pin 30）：address latch enable
 It is an output pin and is active high.
 8051 port 0 provides both address and data.
 The ALE pin is used for de-multiplexing the address and
data by connecting to the G pin of the 74LS373 latch.
 I/O port pins
 The four ports P0, P1, P2, and P3.
 Each port uses 8 pins.
 All I/O pins are bi-directional.
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25. Pins of I/O Port
 The 8051 has four I/O ports
Port 0 （pins 32-39）：P0（P0.0～P0.7）

Port 1（pins 1-8） ：P1（P1.0～P1.7）


Port 2（pins 21-28）：P2（P2.0～P2.7）

Port 3（pins 10-17）：P3（P3.0～P3.7）

Each port has 8 pins.
 Named P0.X （X=0,1,...,7）, P1.X, P2.X, P3.X
 Ex：P0.0 is the bit 0（LSB）of P0
 Ex：P0.7 is the bit 7（MSB）of P0
 These 8 bits form a byte.
 Each port can be used as input or output (bi-direction).
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26. Other Pins
 P1, P2, and P3 have internal pull-up resisters.
 P1, P2, and P3 are not open drain.
 P0 has no internal pull-up resistors and does not
connects to Vcc inside the 8051.
 P0 is open drain.
 Compare the figures of P1.X and P0.X.
 However, for a programmer, it is the same to
program P0, P1, P2 and P3.
 All the ports upon RESET are configured as output.
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27. Port 3 Alternate Functions
P3 Bit Function Pin
P3.0 RxD 10
P3.1 TxD 11
P3.2 INT0 12
P3.3 INT1 13
P3.4 T0 14
P3.5 T1 15
P3.6 WR 16
P3.7 RD 17
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28. 8051 Register Contents on
Reset
Register Reset Value
PC 0000
ACC 0000
B 0000
PSW 0000
SP 0007
DPTR 0000
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29. Memory mapping in 8051
 ROM memory map in 8051 family
4k 8k 32k
0000H 0000H 0000H
0FFFH
DS5000-32
1FFFH
8751
AT89C51 8752
AT89C52 7FFFH
from Atmel
Corporation from Dallas
Semiconductor
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30. RAM Address Space
 RAM memory space allocation in the 8051
7FH
Scratch pad RAM
30H
2FH
Bit-Addressable RAM
20H
1FH Register Bank 3
18H
17H
Register Bank 2
10H
0FH (Stack) Register Bank 1
08H
07H
Register Bank 0
00H
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31. Stack in the 8051
 The register used to access 7FH
the stack is called SP
(stack pointer) register. Scratch pad RAM
30H
 The stack pointer in the 2FH
8051 is only 8 bits
Bit-Addressable RAM
wide, which means that it 20H
1FH
can take value 00 to FFH.
Register Bank 3
18H
When 8051 powers up, the 17H
10H
Register Bank 2
SP register contains value 0FH (Stack) Register Bank 1
07. 08H
07H
Register Bank 0
00H
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32. Timer Modes
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33. Timer Modes
 Gate : When set, timer only runs while INT(0,1) is high.
 C/T : Counter/Timer select bit.
 M1 : Mode bit 1.
 M0 : Mode bit 0.
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34. Interrupt
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35. 8051 CPU Registers
A (8-bit Accumulator)
B (8-bit register for Mul &Div)
PSW (8-bit Program Status Word)
SP (8-bit Stack Pointer)
PC (16-bit Program Counter)
DPTR (16-bit Data Pointer)
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36. Special Function Registers
DATA registers
CONTROL registers
•Timers
•Serial ports
•Interrupt system
•Analog to Digital converter
•Digital to Analog converter
etc.. Addresses 80h – FFH
Direct Addressing is used
to access SFRs
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37. Registers
A
B
R0
DPTR DPH DPL
R1
R2 PC PC
R3
R4 Some 8051 16-bit Register
R5
R6
R7
Some 8-bit
Registers of the
8051
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38. List of Registers
(*Denotes the SFRs)
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39. Contd…
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40. PSW REGISTER
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41. Memory mapping in 8051
ROM memory map in 8051
family
4k 8k 32k
0000H 0000H 0000H
0FFFH
DS5000-32
1FFFH
8051
8752 7FFFH
from Atmel from Dallas
Corporation Semiconductor
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42. RAM Memory Space
Allocation in the 8051
7FH
Scratch pad RAM
30H
2FH
Bit-Addressable RAM
20H
1FH Register Bank 3
18H
17H
Register Bank 2
10H
0FH (Stack) Register Bank 1
08H
07H
Register Bank 0
00H
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43. Address Multiplexing
for External Memory
Accessing
external
code
memory
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44. Accessing External
Data Memory
Interface
to 1K
RAM
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45. Ports of 8051
 8051 has 4 Ports. Port 0, Port1, Port2 , Port3
 Port 0 is a dual purpose port, it is located from pin
32 to pin 39 (8 pins). To use this port as both
input/output ports each pin must be connected
externally to a 10 k ohm pull-up resistor. This is
because Port 0 is an open drain.
Simple ex:MOV A, #22
BACK MOV P0 ,A
ACALL DELAY
CPL A
SJMP BACK
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46. Ports of 8051
 Port 1 is a dedicated I/O port from pin 1 to pin 8. Upon reset it is
configured as out port. It is generally used for interfacing to external
device thus if you need to connect to switches or LEDs, you could
make use of these 8 pins, but it doesn’t need any pull-up resistors
(internal)
 Like port 0, port 2 is a dual-purpose port.(Pins 21 through 28) It can
alternately be used as the high byte of the address bus for designs
with external code memory. Port2 also doesn’t require any pull-up
resistors
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47. Ports of 8051
 Port 3 is also dual purpose but designers generally avoid
using this port unnecessarily for I/O because the pins
have alternate functions which are related to special
features of the 8051.
 For a programmer, it is the same to program P0, P1, P2
and P3.
 All the ports upon RESET are configured as output. To
use any of the ports as an input port.
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48. Alternative Definitions of Port
3
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49. Timers /Counters
 The 8051 has 2 timers/counters:
 Timer/Counter 0
 Timer/Counter 1
They can be used as
1. A Timer to be a time delay generator, internal
clock is used
2. An event counter
 External signals from input pin counted for number
of events on registers
 These clock pulses could help count people through
a gate, or number of wheel rotations, or any other
event that can be converted to pulses
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50. Timer
 Set the initial value of registers
 Start the timer, the 8051 counts up
 Input from internal system clock
 When the registers equals 0, the 8051 sets
a bit to denote time out
8051
P2 P1
Set to
Timer 0 TH0 LCD
TL0
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51. Counter
 Count number of events
 Show number of events on registers
 External input to T0 input pin (P3.4) for Counter 0
 External input to T1 input pin (P3.5) for Counter 1
8051
TH0
P1 to
TL0
LCD
P3.4
a switch T0
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52. Registers Used in
Timer/Counter
 8051 has two 16-bit Timer registers ,Timer 0 & Timer
1.
 As 8051 has 8-bit architecture , each Timer register
is treated as two 8-bit registers namely
TH0, TL0, TH1, TL1.
 One 8-bit mode register -TMOD.
 One 8-bit control register-TCON.
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53. TMOD Register
(MSB) (LSB)
GATE C/T M1 M0 GATE C/T M1 M0
Timer 1 Timer 0
Both Timer 0 &Timer 1 use the same Mode
register TMOD.
 It is an-8-bit register .The lower 4-bits are meant
for Timer 0 &the upper 4-bits are meant for
Timer 1
 It is not bit addressable, used like any other
register of 8051 . For ex:
MOV TMOD,#21H
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54. TMOD-Gate Operation
 Clock to timers can be gated
 GATE=0
 Internal control
 Software starts and stops the timer
 Set/clear TR for start/stop timer.
SETB TR0
CLR TR0
 GATE=1
 External control
 An external control helps start or stop
Timer/counter is enabled only while the INT pin is high and the
TR control pin is set (TR).
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55. TMOD Controls
C/T : Timer or counter selected cleared for timer operation
(input from internal system clock). Set for counter
operation (input from Tx input pin).
M1,M0 : Used for mode selection.
M1 M0 Mode Operation
0 0 0 13-bit timer mode 8-bit THx + 5-bit TLx (x= 0 or
0 1 1 16-bit timer mode 8-bit THx + 8-bit TLx
1 0 2 8-bit auto reload 8-bit auto reload tim/cntr
THx holds a value which is to be reloaded into
TLx each time it overflows.
1 1 3 Split timer mode
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56. TCON Register
Timer control register TMOD is a 8-bit
register which is bit addressable and in
which Upper nibble is for timer/counter,
lower nibble is for interrupts
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57. 8051- SERIAL
COMMUNICATION
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58. Basics of serial
communication
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59. Types of Serial
communications
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60. RxD and TxD pins in the
8051
 The 8051 has two pins for transferring and receiving
data by serial communication. These two pins are
part of the Port3(P3.0 &P3.1)
 These pins are TTL compatible and hence they
require a line driver to make them RS232 compatible
 Max232 chip is one such line driver in use.
 Serial communication is controlled by an 8-bit
register called SCON register, it is a bit addressable
register.
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61. Serial Control Register
SCON
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62. SCON Mode Setting
 These two bits of SCON register determine
 number of bits per character, start bit and stop bits.
SM0 SM1
0 0 Serial Mode 0
0 1 Serial Mode 1, 8 bit data,
1 stop bit, 1 start bit
1 0 Serial Mode 2
1 1 Serial Mode 3
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63. Receive Enable
 REN (Receive Enable)-When high, allows 8051 to
receive data on the RxD pin. When low the receiver
is disabled. This is achieved as below
SETB SCON.4
& CLR SCON.4
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64. Transmit & Receive
Interrupts
 TI (Transmit interrupt)- TI is raised when a byte is
completely transmitted. The TI bit is raised at the
beginning of the stop bit.
 RI (Receive interrupt)- once a byte is completely
received, it is transferred to SBUF and the
interrupt is raised.
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65. Interrupt Vectors
 External Interrupt 0: 0003h
 Timer 0 overflow: 000Bh
 External Interrupt 1: 0013h
 Timer 1 overflow: 001Bh
 Serial : 0023h
 Timer 2 overflow(8052+) 002bh
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66. Interrupt Enable
Register
 Upon reset all Interrupts are disabled
 These interrupts must be enabled
 This is done through an Interrupt Enable
Register (IE).
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67.  EA : Global enable/disable.
 --- : Undefined.
 ET2 : Enable Timer 2 interrupt.
 ES : Enable Serial port interrupt.
 ET1 : Enable Timer 1 interrupt.
 EX1 :Enable External 1 interrupt.
 ET0 : Enable Timer 0 interrupt.
 EX0 : Enable External 0 interrupt.
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68. Interrupt Priorities
 All interrupts have a power on default priority
order.
1. External interrupt 0 (INT0)
2. Timer interrupt0 (TF0)
3. External interrupt 1 (INT1)
4. Timer interrupt1 (TF1)
5. Serial communication (RI+TI)
 Priority can also be set to “high” or “low” by IP
register
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69. Interrupt Priorities
Register
--- --- PT2 PS PT1 PX1 PT0 PX0
IP.7: reserved
IP.6: reserved
IP.5: Timer 2 interrupt priority bit (8052 only)
IP.4: Serial port interrupt priority bit
IP.3: Timer 1 interrupt priority bit
IP.2: External interrupt 1 priority bit
IP.1: Timer 0 interrupt priority bit
IP.0: External interrupt 0 priority bit
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70. EPROM Programming
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71. Program Verification
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73. Instruction Set
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74. Sample Memory
Organization
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75. Internal Data Memory
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76. Special Function
Registers
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77. Addressing Modes
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78. Register Addressing
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79. Direct Addressing
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80. Indirect Addressing
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81. Immediate Constant
Addressing
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82. Relative Addressing
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83. Absolute Addressing
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84. Long Addressing
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85. Indexed Addressing
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86. Instruction Types
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87. Arithmetic Operations
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88. Logical Operations
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89. Data Transfer Operations
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90. Boolean Operations
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91. Program Branching
Operations
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92. Arithmetic Instructions
 Add
 Subtract
 Increment
 Decrement
 Multiply
 Divide
 Decimal adjust
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93. Arithmetic Instructions
Mnemonic Description
ADD A, byte add A to byte, put result in A
ADDC A, byte add with carry
SUBB A, byte subtract with borrow
INC A increment A
INC byte increment byte in memory
INC DPTR increment data pointer
DEC A decrement accumulator
DEC byte decrement byte
MUL AB multiply accumulator by b register
DIV AB divide accumulator by b register
DA A decimal adjust the accumulator
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94. ADD Instructions
add a, byte ; a  a + byte
addc a, byte ; a  a + byte + C
These instructions affect 3 bits in PSW:
C = 1 if result of add is greater than FF
AC = 1 if there is a carry out of bit 3
OV = 1 if there is a carry out of bit 7, but not from bit 6, or visa
versa.
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95. Instructions that Affect
PSW bits
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96. Increment and Decrement
INC A increment A
INC byte increment byte in memory
INC DPTR increment data pointer
DEC A decrement accumulator
DEC byte decrement byte
 The increment and decrement instructions do NOT affect the C
flag.
 Notice we can only INCREMENT the data pointer, not
decrement.
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97. Bitwise logic operations
 (AND, OR, XOR, NOT)
Clear
Rotate
Swap
Logic instructions do NOT affect the flags in PSW

98. Program Flow Control
 Unconditional jumps (“go to”)
 Conditional jumps
 Call and return
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99. Call and Return
 Call is similar to a jump, but
 Call pushes PC on stack before branching
acall <address ll> ; stack  PC
; PC  address 11 bit
lcall <address 16> ; stack  PC
; PC  address 16 bit
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100. An Example Subroutine
square: push b
mov b,a
mul ab
pop b
ret
 8 byte and 11 machine cycle
square: inc a
movc a,@a+pc
ret
table: db 0,1,4,9,16,25,36,49,64,81
 13 byte and 5 machine cycle
Sep-Oct 2011 Mallabhum Institute of Technology Debasis Das 100

101. Another Subroutine Example
; Program to compute square root of value on Port 3
; (bits 3-0) and output on Port 1.
org 0
ljmp Main reset service
Main: mov P3, #0xFF ; Port 3 is an input
loop: mov a, P3
anl a, #0x0F ; Clear bits 7..4 of A
lcall sqrt
mov P1, a main program
sjmp loop
sqrt: inc a
movc a, @a + PC
ret subroutine
Sqrs: db 0,1,1,1,2,2,2,2,2,3,3,3,3,3,3,3
end
data
Sep-Oct 2011 Mallabhum Institute of Technology Debasis Das 101

102. Subroutines Help!
 Subroutines allow us to have "structured" assembly
language programs.
 This is useful for breaking a large design into
manageable parts.
 It saves code space when subroutines can be called
many times in the same program.
Sep-Oct 2011 Mallabhum Institute of Technology Debasis Das 102

103. Example of Delay
mov a,#0aah Delay2:
Back1:mov p0,a mov r6,#0ffh
lcall delay1 back1: mov r7,#0ffh ;1cycle
cpl a Here: djnz r7,here ;2cycle
sjmp back1 djnz r6,back1;2cycle
Delay1:mov r0,#0ffh;1cycle ret ;2cycle
Here: djnz r0,here ;2cycle end
ret ;2cycle
end Delay=1+(1+255*2+2)*255+2
=130818 machine cycle
Delay=1+255*2+2=513 cycle
Sep-Oct 2011 Mallabhum Institute of Technology Debasis Das 103

104. Long delay
GREEN_LED: equ P1.6
org ooh reset service
ljmp Main
org 100h
Main: clr GREEN_LED
Again: acall Delay main program
cpl GREEN_LED
sjmp Again
Delay: mov R7, #02
Loop1: mov R6, #00h
Loop0: mov R5, #00h
djnz R5, $
subroutine
djnz R6, Loop0
djnz R7, Loop1
ret
END
Sep-Oct 2011 Mallabhum Institute of Technology Debasis Das 104

105. String Operations
; Move string from code memory to RAM
org 0
mov dptr,#string
mov r0,#10h
Loop1: clr a
movc a,@a+dptr
jz stop
mov @r0,a
inc dptr
inc r0
sjmp loop1
Stop: sjmp stop
; on-chip code memory used for string
org 18h
String: db ‘this is a string’,0
end
Sep-Oct 2011 Mallabhum Institute of Technology Debasis Das 105

106. Strobed I/O
; p0:input p1:output
mov a,#0ffh
mov p0,a
back: mov a,p0
mov p1,a
sjmp back
setb p1.2
mov a,#45h ;data
Again: jnb p1.2,again ;wait for data
request
mov p0,a ;enable strobe
setb p2.3
clr p2.3
Sep-Oct 2011 Mallabhum Institute of Technology Debasis Das 106

107. Interrupts
…
mov a, #2
mov b, #16
mul ab
mov R0, a
Program Execution
mov R1, b interrupt
mov a, #12
mov b, #20 ISR: inc r7
mul ab mov a,r7
add a, R0 jnz NEXT
mov R0, a cpl P1.6
mov a, R1 NEXT: reti
addc a, b
mov R1, a return
end
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