This document discusses the operation of microprocessors and microcontrollers, including fetch cycles, instruction cycles, memory read/write cycles, demultiplexing address lines, different memory configurations from 256x4 to 8kx8, input/output port timing, and memory-mapped versus input/output mapped input/output techniques. It is a lecture on hardware interfacing from Mallabhum Institute of Technology presented by Debasis Das in August 2011.

1. EI 502Microprocessors & MicrocontrollersPart 3(Hardware Interfacing)Debasis Das1Mallabhum Institute of Technology Debasis DasAug 2011

2. Fetch CycleAug 2011Mallabhum Institute of Technology Debasis Das2

3. Timing: Op Code Fetch (Mov A,B)Aug 2011Mallabhum Institute of Technology Debasis Das3

4. MVI C,FFAug 2011Mallabhum Institute of Technology Debasis Das4

5. Instruction CycleAug 2011Mallabhum Institute of Technology Debasis Das5

6. Memory Read CycleAug 2011Mallabhum Institute of Technology Debasis Das6

7. Memory Read CycleAug 2011Mallabhum Institute of Technology Debasis Das7

8. Memory WriteAug 2011Mallabhum Institute of Technology Debasis Das8

9. Memory Write CycleAug 2011Mallabhum Institute of Technology Debasis Das9

10. Demultiplexing AD0-8Aug 2011Mallabhum Institute of Technology Debasis Das10

11. Memory & I/OControl SignalsAug 2011Mallabhum Institute of Technology Debasis Das11

12. 256 x 4 MemoryAug 2011Mallabhum Institute of Technology Debasis Das12

13. 1k x 8 MemoryAug 2011Mallabhum Institute of Technology Debasis Das13

14. Memory: 2k x 8 using 1k x 8Aug 2011Mallabhum Institute of Technology Debasis Das14

15. 2k x 8 MemoryAug 2011Mallabhum Institute of Technology Debasis Das15

16. 8k x 8 MemoryAug 2011Mallabhum Institute of Technology Debasis Das16

17. 2 k x 8 MemoryAug 2011Mallabhum Institute of Technology Debasis Das17

18. Timing: IN portAug 2011Mallabhum Institute of Technology Debasis Das18

19. I/O Read CycleAug 2011Mallabhum Institute of Technology Debasis Das19

20. I/O Mapped I/OAug 2011Mallabhum Institute of Technology Debasis Das20

21. OUT portAug 2011Mallabhum Institute of Technology Debasis Das21

22. Memory Mapped I/OAug 2011Mallabhum Institute of Technology Debasis Das22

23. Memory & I/OAug 2011Mallabhum Institute of Technology Debasis Das23