This document describes the design and implementation of a microcontroller-based function generator. The system uses an AT89s52 microcontroller to generate digital waveforms that are converted to analog signals using a DAC and current-voltage converter for display on an oscilloscope. Software was developed in assembly language to generate standard waveforms like square, sawtooth, triangular and sine waves. The microcontroller approach allows for flexibility and user-programmability of output waveforms. Experimental results showed the system could generate the desired waveforms accurately and at fast processing speeds.
This document describes the features and specifications of the AT89S8252 microcontroller. It has 8K bytes of flash memory, 2K bytes of EEPROM, and 256 bytes of RAM. It supports SPI serial interfacing and has 32 I/O lines, three timers, interrupts, and low power modes. The flash can be reprogrammed in-system through an SPI interface or programmer to update code.
This document contains diagrams and descriptions of various programmable logic controller (PLC) components. It discusses CPU block diagrams, PLC scan representations, error detection methods, power supplies, input/output modules, remote I/O configurations, and discrete, AC/DC, isolated, TTL, and register/BCD input and output circuits. The document provides detailed information on the functional aspects and configurations of key PLC subsystems.
The document provides information about electrical components in the second generation Skoda Octavia, including:
1) The onboard electrical system is decentralized with fuse boxes and relays located close to relevant components. Communication is via CAN and LIN databuses.
2) Key components include the onboard supply control unit, dash panel insert, and Gateway which controls communication between CAN databuses.
3) The document describes the locations and functions of fuses, relays, and various control units that manage electrical systems.
This document discusses various types of input/output interfaces used in programmable logic controllers (PLCs). It describes interfaces for analog, digital, and specialty signals like temperature sensors. Intelligent interfaces include PID controllers for closed-loop processes and positioning interfaces for machine axes. The document also covers serial communication modes and network interfaces that allow multiple PLCs to communicate over local area networks.
The document provides an overview of programmable logic controllers (PLCs). It discusses the origins and development of PLCs, moving from complex relay-based control systems to more flexible PLCs. The key applications of PLCs are in industrial automation, where they can flexibly control processes. PLCs now support many functions beyond basic logic, such as timers, counters, memory functions, and mathematical operations. The document also introduces the IEC 61131 standard for PLC programming.
Familiarization with instrumentation used for reactor core temperatureCMS90
The document discusses the components and setup of a Channel Temperature Monitoring System (CTMS) used in nuclear reactors. The key components are a CPU board (RT-20) running a real-time operating system (VxWorks), RTD input modules (RIM) that acquire temperature readings from resistance temperature detectors and send them to the CPU board, and a CRT monitor connected to the CPU board to display temperature readings. The system is developed using the Tornado integrated development environment and monitors the temperature of channels carrying hot water from the reactor core to steam generators.
The document discusses different types of programming languages used in programmable logic controllers (PLCs), including ladder logic, Boolean logic, and Grafcet. It provides details on each language and describes common instruction sets used, such as timers, counters, arithmetic, and data manipulation. The document also covers IEC 61131-3 standard languages like ladder diagrams, function block diagrams, instruction lists, structured text, and sequential function charts. Finally, it discusses PLC architecture and different I/O bus network standards and configurations.
Programmable logic controllers (PLCs) are solid-state industrial computer control systems that can store instructions to control machines and processes. PLCs are capable of controlling binary inputs and outputs, performing arithmetic and data manipulation, sequencing, timing, counting, and communication. Modern PLCs are modular, scalable, and programmable via simple programming methods to control industrial automation applications. PLCs use logic gates and binary concepts to read inputs, execute program instructions, and control outputs.
This document describes the features and specifications of the AT89S8252 microcontroller. It has 8K bytes of flash memory, 2K bytes of EEPROM, and 256 bytes of RAM. It supports SPI serial interfacing and has 32 I/O lines, three timers, interrupts, and low power modes. The flash can be reprogrammed in-system through an SPI interface or programmer to update code.
This document contains diagrams and descriptions of various programmable logic controller (PLC) components. It discusses CPU block diagrams, PLC scan representations, error detection methods, power supplies, input/output modules, remote I/O configurations, and discrete, AC/DC, isolated, TTL, and register/BCD input and output circuits. The document provides detailed information on the functional aspects and configurations of key PLC subsystems.
The document provides information about electrical components in the second generation Skoda Octavia, including:
1) The onboard electrical system is decentralized with fuse boxes and relays located close to relevant components. Communication is via CAN and LIN databuses.
2) Key components include the onboard supply control unit, dash panel insert, and Gateway which controls communication between CAN databuses.
3) The document describes the locations and functions of fuses, relays, and various control units that manage electrical systems.
This document discusses various types of input/output interfaces used in programmable logic controllers (PLCs). It describes interfaces for analog, digital, and specialty signals like temperature sensors. Intelligent interfaces include PID controllers for closed-loop processes and positioning interfaces for machine axes. The document also covers serial communication modes and network interfaces that allow multiple PLCs to communicate over local area networks.
The document provides an overview of programmable logic controllers (PLCs). It discusses the origins and development of PLCs, moving from complex relay-based control systems to more flexible PLCs. The key applications of PLCs are in industrial automation, where they can flexibly control processes. PLCs now support many functions beyond basic logic, such as timers, counters, memory functions, and mathematical operations. The document also introduces the IEC 61131 standard for PLC programming.
Familiarization with instrumentation used for reactor core temperatureCMS90
The document discusses the components and setup of a Channel Temperature Monitoring System (CTMS) used in nuclear reactors. The key components are a CPU board (RT-20) running a real-time operating system (VxWorks), RTD input modules (RIM) that acquire temperature readings from resistance temperature detectors and send them to the CPU board, and a CRT monitor connected to the CPU board to display temperature readings. The system is developed using the Tornado integrated development environment and monitors the temperature of channels carrying hot water from the reactor core to steam generators.
The document discusses different types of programming languages used in programmable logic controllers (PLCs), including ladder logic, Boolean logic, and Grafcet. It provides details on each language and describes common instruction sets used, such as timers, counters, arithmetic, and data manipulation. The document also covers IEC 61131-3 standard languages like ladder diagrams, function block diagrams, instruction lists, structured text, and sequential function charts. Finally, it discusses PLC architecture and different I/O bus network standards and configurations.
Programmable logic controllers (PLCs) are solid-state industrial computer control systems that can store instructions to control machines and processes. PLCs are capable of controlling binary inputs and outputs, performing arithmetic and data manipulation, sequencing, timing, counting, and communication. Modern PLCs are modular, scalable, and programmable via simple programming methods to control industrial automation applications. PLCs use logic gates and binary concepts to read inputs, execute program instructions, and control outputs.
This document provides an introduction to PIC microcontrollers. It discusses that PIC stands for "Programmable Intelligent Computer" and that a PIC microcontroller is a processor with built-in memory and RAM that can be used to control projects. It then lists some of the useful built-in modules of PIC microcontrollers like EEPROM, timers, and analog comparators. The document also discusses why PIC microcontrollers are popular, which includes their low cost, wide availability, and small size. It then provides details on the pins of the common PIC 16F84 microcontroller and describes its registers and peripherals. Finally, it gives a simple code example using ports on the PIC 16F84
This document describes the features and specifications of the ATF1504AS high-performance complex programmable logic device. It has 64 macrocells with 5 product terms per macrocell that can be expanded up to 40. It has 44, 68, 84, or 100 pins and a maximum pin-to-pin delay of 7.5 ns. It also has in-system programmability via JTAG and advanced power management features.
The document provides an introduction to programmable logic controllers (PLCs). It discusses how PLCs replaced electromechanical relays for control systems, allowing logic functions to be programmed rather than physically wired. The summary describes how PLCs work, including taking input from sensors and switches and outputting signals to devices. It also discusses how PLCs are programmed using ladder logic and can be reprogrammed to change control functions without rewiring. The document provides examples of programming PLCs to control lights and motors.
This document provides an overview of Honeywell's new ML50 compact programmable logic controller (PLC). The ML50 combines power, versatility, and affordability in a compact solution. It offers high performance and functionality for industrial control applications. The ML50 family can be used as input/output, a standalone PLC, or in a distributed control system. It includes a variety of base modules, expansion I/O modules, network interface options, and special function modules. The document then describes the ML50's features such as processing speed, program capacity, communication capabilities, and integrated programming environment. It also discusses the ML50 system configuration and provides specifications for power supply, communication, and programming software.
This document provides an introduction to PIC microcontrollers. It discusses why PICs have become popular, including their low cost, wide availability, and support tools. It then describes the basic architecture of PIC microcontrollers, including their Harvard architecture, RISC design, and peripheral features like timers and serial communication. Finally, it discusses the architecture of the PIC16C6x line specifically, outlining its registers, addressing modes, and peripheral modules.
The PIC microcontroller is a single-chip computer with RAM, ROM, I/O ports and a CPU. The PIC16F73 has features like a RISC CPU, 4K bytes of flash memory, 192 bytes of RAM, three I/O ports and a built-in oscillator. It has peripherals like timers, PWM, ADC and serial communication modules. The PIC memory is divided into program memory for instructions and data memory consisting of register banks. Common applications include interfacing with LCDs and 7-segment displays.
This document provides an overview and summary of Siemens S7-300 PLC programming. It covers the STEP 7 programming software, comparing CPU models and modules, addressing modules, loading memory, data types, and instructions for statement list programming, logic, math, timers, and more. Programming examples are also included at the end.
This document discusses jump instructions in PLC ladder logic. Jump instructions allow a PLC program to break its normal sequential execution and move to another part of the program. The key points covered are:
- Jump instructions work with label instructions to redirect program flow. The jump instruction moves execution to the rung with a matching label number.
- Jumps can move execution forward or backward within a program. Multiple jumps can target the same label. Jumps can also be nested within other jumps.
- Advantages of jumps include allowing a PLC to run multiple programs, jumping sections during faults to reduce downtime, and improving scan time performance.
- An example is provided demonstrating a parking lot control system
This document describes the architectural features and peripheral functions of the PIC16F873 microcontroller. It discusses the microcontroller core, which uses a Harvard architecture with separate program and data memory. It then describes the peripheral features including timers, I/O ports, serial communication interfaces, and analog-to-digital converter. Diagrams are included showing the memory map, pin configuration, and block diagrams of timers and serial communication modules. The document provides a detailed overview of the capabilities and operation of the PIC16F873 microcontroller.
The document discusses programmable logic controllers (PLCs). It outlines the general objectives of explaining PLC concepts, including the structure of PLC systems and their components, programming languages, logic gates, counters, shift registers, and programming applications. It then defines PLCs, describes their advantages, functions, basic control systems, hardware and software components, programming formats, logic gates, timers, counters, internal relays, shift registers, and provides examples of PLC programming applications for machines.
This is a small project on Siemens PLC Step 7 models. The project required lot of lateral thinking and logical decision making in order to develop programs for the traffic light management for the entire chandigarh city. The project is known as Total Traffic Security & Management (TTSM)
This document provides details about the MSP430x5xx microcontroller including its block diagram, CPU architecture, memory map, I/O ports, interrupts, clock system, low power modes, watchdog timer and more. Key aspects include its 16-bit RISC CPU, various clock signals, flash memory up to 512KB, RAM up to 66KB, 8 I/O ports, analog to digital converter, timers, real-time clock, and low power modes down to 0.1uA. Example code is provided to configure ports for output and LED interfacing.
This document provides an overview of a basic training course on programmable logic controllers (PLCs). It describes the objectives of the course which are to explain the basic components and programming of PLCs. The document outlines the course contents which will cover the history of PLCs, relay logic, the central processing unit, input/output systems, programming concepts, applications, troubleshooting and maintenance. It also provides examples of PLC components and their functions.
This document provides an overview of microcontroller programming using C language for ATMEL and PIC microcontrollers. It discusses microcontroller architecture, including the central processing unit, memory, timers/counters, and interrupts. It then introduces the ATMEL 89C2051 microcontroller, describing its pin configuration, special purpose I/O, memory, and other features. The document outlines the structure of microcontroller C programming and provides sample programs to blink an LED. It also discusses configuring the hardware and software environment, compiling and burning programs to the microcontroller, and writing interrupt subroutines.
Honeywell PLC ML 200R ystem architecture &-installationShivam Singh
The document discusses the architecture and installation of the ML-200R PLC system. It provides details on the redundant CPU and power systems, synchronization of data between CPUs, and cable specifications. The installation process involves connecting the required devices like bases, modules, and cables then configuring and testing the system using the provided software.
Arm cortex (lpc 2148) based motor speedUday Wankar
The project is designed to control the speed of a DC and AC motor using an
ARM7 LPC2148 processor. The speed of motor is directly proportional to the voltage
applied across its terminals. Hence, if voltage across motor terminal is varied, then
speed can also be varied. This project uses the above principle to control the speed of
the motor by varying the duty cycle of the pulses applied to it, popularly known as
PWM control. The project uses input button interfaced to the processor, which are
used to control the speed of motor. Pulse Width Modulation is generated at the output
by the microcontroller as per the program. The program is written in Embedded C.
The average voltage given or the average current flowing through the motor
will change depending on the duty cycle, ON and OFF time of the pulses, so the speed
of the motor will change. A motor driver IC is interfaced to the ARM7 LPC2148
processor board for receiving PWM signals and delivering desired output for speed
control. Further the project can be enhanced by using power electronic devices such
as IGBTs to achieve speed control higher capacity industrial motors.
The document discusses the PIC-18 microcontroller. It describes the PIC-18 as an 8-bit microcontroller with 16-bit instruction sets, 256 bytes of EPROM, 2KB of SRAM, and 32KB of flash memory. It operates at 40MHz and has features like a 10-bit A/D converter, instruction pipelining, and low power consumption. The document also provides details on the pin diagram, architecture, memory organization, addressing modes, and pipelining of the PIC-18 microcontroller.
All that we know of God is that which we see in ourselves.Rhea Myers
This document contains a collection of short quotes and passages on a variety of topics including technology, society, networks, and the future. It discusses concepts like the importance of a universal space for sites to interact, being aware of common context between human and non-human agents, and how early adoption can provide advantages in software systems. The collection aims to provide food for thought on emerging issues.
This document is a schedule of final examinations for the December 2011 semester at Kota Bharu Polytechnic. It lists the dates, times, room numbers, and other details for numerous exams in subjects like engineering mathematics, construction technology, hydraulics, and more, taking place from April 22 to May 3, 2012. Over 100 exams for many different classes are included in the schedule.
This document provides an introduction to PIC microcontrollers. It discusses that PIC stands for "Programmable Intelligent Computer" and that a PIC microcontroller is a processor with built-in memory and RAM that can be used to control projects. It then lists some of the useful built-in modules of PIC microcontrollers like EEPROM, timers, and analog comparators. The document also discusses why PIC microcontrollers are popular, which includes their low cost, wide availability, and small size. It then provides details on the pins of the common PIC 16F84 microcontroller and describes its registers and peripherals. Finally, it gives a simple code example using ports on the PIC 16F84
This document describes the features and specifications of the ATF1504AS high-performance complex programmable logic device. It has 64 macrocells with 5 product terms per macrocell that can be expanded up to 40. It has 44, 68, 84, or 100 pins and a maximum pin-to-pin delay of 7.5 ns. It also has in-system programmability via JTAG and advanced power management features.
The document provides an introduction to programmable logic controllers (PLCs). It discusses how PLCs replaced electromechanical relays for control systems, allowing logic functions to be programmed rather than physically wired. The summary describes how PLCs work, including taking input from sensors and switches and outputting signals to devices. It also discusses how PLCs are programmed using ladder logic and can be reprogrammed to change control functions without rewiring. The document provides examples of programming PLCs to control lights and motors.
This document provides an overview of Honeywell's new ML50 compact programmable logic controller (PLC). The ML50 combines power, versatility, and affordability in a compact solution. It offers high performance and functionality for industrial control applications. The ML50 family can be used as input/output, a standalone PLC, or in a distributed control system. It includes a variety of base modules, expansion I/O modules, network interface options, and special function modules. The document then describes the ML50's features such as processing speed, program capacity, communication capabilities, and integrated programming environment. It also discusses the ML50 system configuration and provides specifications for power supply, communication, and programming software.
This document provides an introduction to PIC microcontrollers. It discusses why PICs have become popular, including their low cost, wide availability, and support tools. It then describes the basic architecture of PIC microcontrollers, including their Harvard architecture, RISC design, and peripheral features like timers and serial communication. Finally, it discusses the architecture of the PIC16C6x line specifically, outlining its registers, addressing modes, and peripheral modules.
The PIC microcontroller is a single-chip computer with RAM, ROM, I/O ports and a CPU. The PIC16F73 has features like a RISC CPU, 4K bytes of flash memory, 192 bytes of RAM, three I/O ports and a built-in oscillator. It has peripherals like timers, PWM, ADC and serial communication modules. The PIC memory is divided into program memory for instructions and data memory consisting of register banks. Common applications include interfacing with LCDs and 7-segment displays.
This document provides an overview and summary of Siemens S7-300 PLC programming. It covers the STEP 7 programming software, comparing CPU models and modules, addressing modules, loading memory, data types, and instructions for statement list programming, logic, math, timers, and more. Programming examples are also included at the end.
This document discusses jump instructions in PLC ladder logic. Jump instructions allow a PLC program to break its normal sequential execution and move to another part of the program. The key points covered are:
- Jump instructions work with label instructions to redirect program flow. The jump instruction moves execution to the rung with a matching label number.
- Jumps can move execution forward or backward within a program. Multiple jumps can target the same label. Jumps can also be nested within other jumps.
- Advantages of jumps include allowing a PLC to run multiple programs, jumping sections during faults to reduce downtime, and improving scan time performance.
- An example is provided demonstrating a parking lot control system
This document describes the architectural features and peripheral functions of the PIC16F873 microcontroller. It discusses the microcontroller core, which uses a Harvard architecture with separate program and data memory. It then describes the peripheral features including timers, I/O ports, serial communication interfaces, and analog-to-digital converter. Diagrams are included showing the memory map, pin configuration, and block diagrams of timers and serial communication modules. The document provides a detailed overview of the capabilities and operation of the PIC16F873 microcontroller.
The document discusses programmable logic controllers (PLCs). It outlines the general objectives of explaining PLC concepts, including the structure of PLC systems and their components, programming languages, logic gates, counters, shift registers, and programming applications. It then defines PLCs, describes their advantages, functions, basic control systems, hardware and software components, programming formats, logic gates, timers, counters, internal relays, shift registers, and provides examples of PLC programming applications for machines.
This is a small project on Siemens PLC Step 7 models. The project required lot of lateral thinking and logical decision making in order to develop programs for the traffic light management for the entire chandigarh city. The project is known as Total Traffic Security & Management (TTSM)
This document provides details about the MSP430x5xx microcontroller including its block diagram, CPU architecture, memory map, I/O ports, interrupts, clock system, low power modes, watchdog timer and more. Key aspects include its 16-bit RISC CPU, various clock signals, flash memory up to 512KB, RAM up to 66KB, 8 I/O ports, analog to digital converter, timers, real-time clock, and low power modes down to 0.1uA. Example code is provided to configure ports for output and LED interfacing.
This document provides an overview of a basic training course on programmable logic controllers (PLCs). It describes the objectives of the course which are to explain the basic components and programming of PLCs. The document outlines the course contents which will cover the history of PLCs, relay logic, the central processing unit, input/output systems, programming concepts, applications, troubleshooting and maintenance. It also provides examples of PLC components and their functions.
This document provides an overview of microcontroller programming using C language for ATMEL and PIC microcontrollers. It discusses microcontroller architecture, including the central processing unit, memory, timers/counters, and interrupts. It then introduces the ATMEL 89C2051 microcontroller, describing its pin configuration, special purpose I/O, memory, and other features. The document outlines the structure of microcontroller C programming and provides sample programs to blink an LED. It also discusses configuring the hardware and software environment, compiling and burning programs to the microcontroller, and writing interrupt subroutines.
Honeywell PLC ML 200R ystem architecture &-installationShivam Singh
The document discusses the architecture and installation of the ML-200R PLC system. It provides details on the redundant CPU and power systems, synchronization of data between CPUs, and cable specifications. The installation process involves connecting the required devices like bases, modules, and cables then configuring and testing the system using the provided software.
Arm cortex (lpc 2148) based motor speedUday Wankar
The project is designed to control the speed of a DC and AC motor using an
ARM7 LPC2148 processor. The speed of motor is directly proportional to the voltage
applied across its terminals. Hence, if voltage across motor terminal is varied, then
speed can also be varied. This project uses the above principle to control the speed of
the motor by varying the duty cycle of the pulses applied to it, popularly known as
PWM control. The project uses input button interfaced to the processor, which are
used to control the speed of motor. Pulse Width Modulation is generated at the output
by the microcontroller as per the program. The program is written in Embedded C.
The average voltage given or the average current flowing through the motor
will change depending on the duty cycle, ON and OFF time of the pulses, so the speed
of the motor will change. A motor driver IC is interfaced to the ARM7 LPC2148
processor board for receiving PWM signals and delivering desired output for speed
control. Further the project can be enhanced by using power electronic devices such
as IGBTs to achieve speed control higher capacity industrial motors.
The document discusses the PIC-18 microcontroller. It describes the PIC-18 as an 8-bit microcontroller with 16-bit instruction sets, 256 bytes of EPROM, 2KB of SRAM, and 32KB of flash memory. It operates at 40MHz and has features like a 10-bit A/D converter, instruction pipelining, and low power consumption. The document also provides details on the pin diagram, architecture, memory organization, addressing modes, and pipelining of the PIC-18 microcontroller.
All that we know of God is that which we see in ourselves.Rhea Myers
This document contains a collection of short quotes and passages on a variety of topics including technology, society, networks, and the future. It discusses concepts like the importance of a universal space for sites to interact, being aware of common context between human and non-human agents, and how early adoption can provide advantages in software systems. The collection aims to provide food for thought on emerging issues.
This document is a schedule of final examinations for the December 2011 semester at Kota Bharu Polytechnic. It lists the dates, times, room numbers, and other details for numerous exams in subjects like engineering mathematics, construction technology, hydraulics, and more, taking place from April 22 to May 3, 2012. Over 100 exams for many different classes are included in the schedule.
Mary S. Wells is a strategic human resources leader with over 30 years of experience in human resources management. She currently serves as the Director of Human Resources for Westmont Hospitality Group, overseeing HR operations for two Hilton hotels. Wells has expertise in areas such as organizational development, employee relations, talent management, and compensation. She holds certifications as a Senior Professional in Human Resources and SHRM-Senior Certified Professional.
This document provides tips and exercises for developing flexible thinking and future-proofing yourself against changes. It recommends reinventing yourself, focusing on bringing value, and being the best. Various exercises are presented to train different types of thinking and strengthen mental abilities like noticing details or making connections. Principles of creating memorable messages are outlined. The conclusion encourages developing both logical and creative thinking skills to be adaptive.
The document summarizes several regional insurance facilities that provide coverage for governments against natural catastrophes. It describes the Caribbean Catastrophe Risk Insurance Facility (CCRIF) which offers hurricane and earthquake insurance to 16 Caribbean governments and has made payouts after several hurricanes and earthquakes. It also outlines plans for a similar facility in Central America that would offer earthquake, hurricane and mudslide coverage to participating countries. The document argues that public-private partnerships are needed to effectively reduce and finance catastrophic risks.
If you're having a bad day, know this. the mayfly lives only one day, and som...Rhea Myers
This document contains a collection of short quotes, passages, and thoughts on various topics ranging from technology and the future to art, relationships, and time. It discusses issues like control shifting to users, collective phenomena, paying for design and printing of words, greasing wheels and digging deeper to increase engagement, and integrating podcasting relationships. The document concludes by thanking the viewer and providing contact details for further information.
Maximise your returns in crisis management preparedness: a cyclic approach to...Global Risk Forum GRFDavos
This document discusses using a cyclic approach to crisis management training and exercises. It proposes a 6-step cycle: 1) identify desired outcomes, 2) design suitable training/exercises, 3) deliver the training/exercises, 4) review the outcomes, 5) identify any remaining knowledge or skill gaps, and 6) determine if further training is needed or the skills can be maintained. This cyclic approach helps ensure continuous learning and improvement. It also discusses the importance of using trained evaluators and a clear evaluation methodology to assess outcomes at each stage of the cycle.
The document provides a product datasheet for the AUBTM-23 Bluetooth V2.0 Class 2 module. Key specifications of the module include Bluetooth V2.0+EDR compliance, support for profiles like A2DP and HFP, and interfaces like UART, USB, PCM and I2C. The module is designed to enable cable replacement in applications such as wireless headsets, speakers, car kits and multimedia dongles.
Haresh Shah - PLENARY SESSION 1From Thoughts to Action: Research, Education,...Global Risk Forum GRFDavos
Haresh C. Shah gave a plenary session at the IRDC Davos 2012 on disaster risk reduction. The presentation covered understanding disasters and possible mitigation strategies through research, development, and education. It discussed challenges such as the costs and benefits of reducing disaster risks and related public policies. Specific topics included the historical focus on natural disasters, the evolution of man-made disasters, and the impact of climate change on increasing disaster severity and frequency. Research and education needs to improve design, rescue, recovery, community preparedness, and financial strategies.
Severe accidents of nuclear power plants in Europe: possible consequences and...Global Risk Forum GRFDavos
Petra SEIBERT1, Delia ARNOLD1,4, Gabriele MRAZ3, Nikolaus ARNOLD2, Klaus GUFLER2, Helga KROMP-KOLB1, Wolfgang KROMP2, Philipp SUTTER3, Antonia WENISH3
1Institute of Meteorology, BOKU, Austria, Republic of; 2Institute for Security and Risk Sciences, BOKU, Austria, Republic of; 3Austrian Institute of Ecology, Austria, Republic of; 4Institute of Energy Technologies (INTE), Technical University of Catalonia (UPC), Barcelona, Spain
The document describes a presentation on microcontrollers and various interfacing projects. It includes sections on an AT89C51 microcontroller, software used like Keil and Proteus, and interfacing projects for LEDs, 7-segment displays, LCDs, and a traffic light project. The traffic light project uses an AT89C51 microcontroller to control green, yellow and red LEDs in automatic, semi-automatic and manual modes using feedback from sensors and commands from a remote computer.
The P89V51RD2 is an 80C51 microcontroller with 64kB of Flash memory and 1kB of RAM. It has features like In-System Programming, In-Application Programming, and a choice of running at the standard 80C51 clock rate or twice the throughput at the same clock frequency in X2 mode. It includes ports, timers, serial interfaces, and low power modes.
The document provides an overview of the 8051 microcontroller, including its block diagram, pin descriptions, registers, memory mapping, stack, I/O port programming, timers, and interrupts. It explains the basic components and architecture of the 8051, how it maps memory and handles interrupts and timers. It also compares microprocessors to microcontrollers and discusses embedded systems.
The document discusses peripheral devices and the programmable peripheral interface (PPI) chip 8255A. It provides 3 key points:
1) The 8255A is a versatile chip used for parallel data transfer between a microprocessor and peripheral devices. It has 3 programmable I/O ports (Port A, B, and C) that can be independently programmed as input or output ports.
2) The 8255A can be programmed to operate in different modes like Mode 0 (simple I/O), Mode 1 (strobed mode), and Mode 2 (bidirectional bus mode) to interface with different types of I/O devices.
3) An 8-bit control register is used
Program, Code of Program and Screen Shot of Output (UNIVERSAL DRIVER USING µ...Er. Ashish Pandey
The document describes a program for a universal motor driver using a P89C51 microcontroller. It can control AC and DC motors by varying the pulse width modulation (PWM) of the TRIAC for AC motors and switching relays for DC motor voltage levels. The program uses timers and interrupts to generate the PWM and reads inputs to control motor speed and select motor type/voltage. Screenshots show the operating scheme and motor control via keypad input to the serial port.
Design and Implementation of 8 Bit Multiplier Using M.G.D.I. TechniqueIJMER
In this paper we have implemented Radix 8 High Speed Low Power Binary Multiplier using
Modified Gate Diffusion Input(M.G.D.I) technique. Here we have used “Urdhva-tiryakbhyam”(
Vertically and crosswise ) Algorithm because as compared to other multiplication algorithms it shows
less computation and less complexity since it reduces the total number of partial products to half of it.
This multiplier at gate level can be design using any technique such as CMOS, PTL and TG but design
with new MGDI technique gives far better result in terms of area, switching delay and power
dissipation. The radix 8 High Speed Low Power Pipelined Multiplier is designed with MGDI technique
in DSCH 3.5 and layout generated in Microwind tool. The Simulation is done using 0.12μm technology
at 1.2 v supply voltage and results are compared with conventional CMOS technique. Simulation result
shows great improvement in terms of area, switching delay and power dissipation.
The document discusses the architecture, programming, and interfacing of microprocessors using the 8086 as an example. It describes two models used to study microprocessors: the programmer's model which shows internal registers and buses, and the hardware model which shows pin diagrams. It then discusses the basic components of a microcomputer system using an 8086, including memory, I/O devices, and different types of buses. Finally, it provides details on the 8086 architecture, registers, addressing modes, and timing sequences for read and write cycles.
Ei502microprocessorsmicrtocontrollerspart4 8051 MicrocontrollerDebasis Das
The document discusses the applications and features of microcontrollers. It provides examples of using microcontrollers for interfacing seven segment displays, temperature control, and other applications. It also discusses where microcontrollers can commonly be found, such as in cell phones, laptops, appliances, toys and more. The document outlines reasons for learning about microprocessors/controllers and provides an overview of the 8051 microcontroller, including its architecture, pins, registers and memory mapping.
The document discusses the PIC16F877 microcontroller. It provides details about its memory, packaging options, I/O pins and their special functions. Examples are given to illustrate using the microcontroller for an LED flasher, lockout system, musical tone generator, stepper motor controller and PWM motor speed control using interrupts. The examples cover digital I/O, timers, interrupts, ADC and USART communication.
The International Journal of Engineering and Science (The IJES)theijes
The International Journal of Engineering & Science is aimed at providing a platform for researchers, engineers, scientists, or educators to publish their original research results, to exchange new ideas, to disseminate information in innovative designs, engineering experiences and technological skills. It is also the Journal's objective to promote engineering and technology education. All papers submitted to the Journal will be blind peer-reviewed. Only original articles will be published.
The document discusses the machine cycles and timing of the 8085 microprocessor. It describes that each instruction of the 8085 is divided into machine cycles and each machine cycle is divided into clock cycles called T-states. The 5 basic machine cycles of the 8085 are listed as opcode fetch cycle, memory write cycle, I/O read cycle, memory read cycle, and I/O write cycle. The timing and status of signals like ALE, RD, WR, and IO/M during each machine cycle are explained.
The document describes the P89V51RB2/RC2/RD2 microcontroller, which features an 80C51 CPU, 16/32/64kB of flash memory, 1kB of RAM, and various peripherals. It has an X2 mode that allows it to run at twice the throughput of a standard 80C51 at the same clock frequency. The microcontroller supports both parallel and serial programming of its flash memory. It is available in PLCC44, TQFP44, and DIP40 packages.
The document discusses the 8051 microcontroller. It lists advantages of microcontroller-based systems such as lower cost, smaller size, and higher reliability compared to microprocessor-based systems. It describes some 8051 family members and compares their features such as ROM type, RAM size, and number of timers. It also discusses important components of the 8051 like ROM, RAM, I/O ports, timers, and serial port. The document provides block diagrams of the 8051 internal architecture and pinout. It describes the functions of various pins and registers.
The AT89S8253 is a low-power 8-bit microcontroller with 12K bytes of flash program memory and 2K bytes of EEPROM data memory. It has various I/O features including ports, timers, serial interface, and interrupts. The flash memory can be reprogrammed in-system through an SPI interface or external programmer, allowing for flexible and cost-effective solutions to embedded applications.
Design and Implementation of 8 Bit Multiplier Using M.G.D.I. TechniqueIJMER
In this paper we have implemented Radix 8 High Speed Low Power Binary Multiplier using
Modified Gate Diffusion Input(M.G.D.I) technique. Here we have used “Urdhva-tiryakbhyam”(
Vertically and crosswise ) Algorithm because as compared to other multiplication algorithms it shows
less computation and less complexity since it reduces the total number of partial products to half of it.
This multiplier at gate level can be design using any technique such as CMOS, PTL and TG but design
with new MGDI technique gives far better result in terms of area, switching delay and power
dissipation. The radix 8 High Speed Low Power Pipelined Multiplier is designed with MGDI technique
in DSCH 3.5 and layout generated in Microwind tool. The Simulation is done using 0.12μm technology
at 1.2 v supply voltage and results are compared with conventional CMOS technique. Simulation result
shows great improvement in terms of area, switching delay and power dissipation.
IRJET- Performance Evalution of Gate Diffusion Input and Modified Gate Di...IRJET Journal
The document discusses techniques for designing low-power multipliers and fast adders. It introduces the Gate Diffusion Input (GDI) and Modified Gate Diffusion Input (MGDI) techniques, which can reduce transistor count and power consumption compared to traditional CMOS designs. Basic logic gates like AND, OR, XOR can be implemented using GDI cells. Using GDI gates, low-power multipliers and fast adders can be designed, like a 6-transistor GDI full adder. MGDI further improves upon GDI by permanently tying the substrate terminals, reducing static power dissipation. Array and tree multipliers are discussed as approaches to multiply two binary numbers using additions of partial products.
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The document describes the features and specifications of the AT89S52 microcontroller. It includes 8K bytes of in-system programmable flash memory, 256 bytes of RAM, 32 I/O lines, and various timer/counter and serial communication functions. It provides detailed information on the microcontroller's pin configurations, pin descriptions and alternate functions.
The document provides an overview of the 8051 microcontroller, comparing it to microprocessors. It discusses the architecture and features of the 8051, including its on-chip RAM, ROM, I/O ports, and CPU. It also outlines the basic steps for application development using the 8051, such as connecting the power supply and crystal, adding a reset circuit, writing software, and burning the program into ROM.
Similar to IJERD (www.ijerd.com) International Journal of Engineering Research and Development (20)
A Novel Method for Prevention of Bandwidth Distributed Denial of Service AttacksIJERD Editor
Distributed Denial of Service (DDoS) Attacks became a massive threat to the Internet. Traditional
Architecture of internet is vulnerable to the attacks like DDoS. Attacker primarily acquire his army of Zombies,
then that army will be instructed by the Attacker that when to start an attack and on whom the attack should be
done. In this paper, different techniques which are used to perform DDoS Attacks, Tools that were used to
perform Attacks and Countermeasures in order to detect the attackers and eliminate the Bandwidth Distributed
Denial of Service attacks (B-DDoS) are reviewed. DDoS Attacks were done by using various Flooding
techniques which are used in DDoS attack.
The main purpose of this paper is to design an architecture which can reduce the Bandwidth
Distributed Denial of service Attack and make the victim site or server available for the normal users by
eliminating the zombie machines. Our Primary focus of this paper is to dispute how normal machines are
turning into zombies (Bots), how attack is been initiated, DDoS attack procedure and how an organization can
save their server from being a DDoS victim. In order to present this we implemented a simulated environment
with Cisco switches, Routers, Firewall, some virtual machines and some Attack tools to display a real DDoS
attack. By using Time scheduling, Resource Limiting, System log, Access Control List and some Modular
policy Framework we stopped the attack and identified the Attacker (Bot) machines
Hearing loss is one of the most common human impairments. It is estimated that by year 2015 more
than 700 million people will suffer mild deafness. Most can be helped by hearing aid devices depending on the
severity of their hearing loss. This paper describes the implementation and characterization details of a dual
channel transmitter front end (TFE) for digital hearing aid (DHA) applications that use novel micro
electromechanical- systems (MEMS) audio transducers and ultra-low power-scalable analog-to-digital
converters (ADCs), which enable a very-low form factor, energy-efficient implementation for next-generation
DHA. The contribution of the design is the implementation of the dual channel MEMS microphones and powerscalable
ADC system.
Influence of tensile behaviour of slab on the structural Behaviour of shear c...IJERD Editor
-A composite beam is composed of a steel beam and a slab connected by means of shear connectors
like studs installed on the top flange of the steel beam to form a structure behaving monolithically. This study
analyzes the effects of the tensile behavior of the slab on the structural behavior of the shear connection like slip
stiffness and maximum shear force in composite beams subjected to hogging moment. The results show that the
shear studs located in the crack-concentration zones due to large hogging moments sustain significantly smaller
shear force and slip stiffness than the other zones. Moreover, the reduction of the slip stiffness in the shear
connection appears also to be closely related to the change in the tensile strain of rebar according to the increase
of the load. Further experimental and analytical studies shall be conducted considering variables such as the
reinforcement ratio and the arrangement of shear connectors to achieve efficient design of the shear connection
in composite beams subjected to hogging moment.
Gold prospecting using Remote Sensing ‘A case study of Sudan’IJERD Editor
Gold has been extracted from northeast Africa for more than 5000 years, and this may be the first
place where the metal was extracted. The Arabian-Nubian Shield (ANS) is an exposure of Precambrian
crystalline rocks on the flanks of the Red Sea. The crystalline rocks are mostly Neoproterozoic in age. ANS
includes the nations of Israel, Jordan. Egypt, Saudi Arabia, Sudan, Eritrea, Ethiopia, Yemen, and Somalia.
Arabian Nubian Shield Consists of juvenile continental crest that formed between 900 550 Ma, when intra
oceanic arc welded together along ophiolite decorated arc. Primary Au mineralization probably developed in
association with the growth of intra oceanic arc and evolution of back arc. Multiple episodes of deformation
have obscured the primary metallogenic setting, but at least some of the deposits preserve evidence that they
originate as sea floor massive sulphide deposits.
The Red Sea Hills Region is a vast span of rugged, harsh and inhospitable sector of the Earth with
inimical moon-like terrain, nevertheless since ancient times it is famed to be an abode of gold and was a major
source of wealth for the Pharaohs of ancient Egypt. The Pharaohs old workings have been periodically
rediscovered through time. Recent endeavours by the Geological Research Authority of Sudan led to the
discovery of a score of occurrences with gold and massive sulphide mineralizations. In the nineties of the
previous century the Geological Research Authority of Sudan (GRAS) in cooperation with BRGM utilized
satellite data of Landsat TM using spectral ratio technique to map possible mineralized zones in the Red Sea
Hills of Sudan. The outcome of the study mapped a gossan type gold mineralization. Band ratio technique was
applied to Arbaat area and a signature of alteration zone was detected. The alteration zones are commonly
associated with mineralization. The alteration zones are commonly associated with mineralization. A filed check
confirmed the existence of stock work of gold bearing quartz in the alteration zone. Another type of gold
mineralization that was discovered using remote sensing is the gold associated with metachert in the Atmur
Desert.
Reducing Corrosion Rate by Welding DesignIJERD Editor
This document summarizes a study on reducing corrosion rates in steel through welding design. The researchers tested different welding groove designs (X, V, 1/2X, 1/2V) and preheating temperatures (400°C, 500°C, 600°C) on ferritic malleable iron samples. Testing found that X and V groove designs with 500°C and 600°C preheating had corrosion rates of 0.5-0.69% weight loss after 14 days, compared to 0.57-0.76% for 400°C preheating. Higher preheating reduced residual stresses which decreased corrosion. Residual stresses were 1.7 MPa for optimal X groove and 600°C
Router 1X3 – RTL Design and VerificationIJERD Editor
Routing is the process of moving a packet of data from source to destination and enables messages
to pass from one computer to another and eventually reach the target machine. A router is a networking device
that forwards data packets between computer networks. It is connected to two or more data lines from different
networks (as opposed to a network switch, which connects data lines from one single network). This paper,
mainly emphasizes upon the study of router device, it‟s top level architecture, and how various sub-modules of
router i.e. Register, FIFO, FSM and Synchronizer are synthesized, and simulated and finally connected to its top
module.
Active Power Exchange in Distributed Power-Flow Controller (DPFC) At Third Ha...IJERD Editor
This paper presents a component within the flexible ac-transmission system (FACTS) family, called
distributed power-flow controller (DPFC). The DPFC is derived from the unified power-flow controller (UPFC)
with an eliminated common dc link. The DPFC has the same control capabilities as the UPFC, which comprise
the adjustment of the line impedance, the transmission angle, and the bus voltage. The active power exchange
between the shunt and series converters, which is through the common dc link in the UPFC, is now through the
transmission lines at the third-harmonic frequency. DPFC multiple small-size single-phase converters which
reduces the cost of equipment, no voltage isolation between phases, increases redundancy and there by
reliability increases. The principle and analysis of the DPFC are presented in this paper and the corresponding
simulation results that are carried out on a scaled prototype are also shown.
Mitigation of Voltage Sag/Swell with Fuzzy Control Reduced Rating DVRIJERD Editor
Power quality has been an issue that is becoming increasingly pivotal in industrial electricity
consumers point of view in recent times. Modern industries employ Sensitive power electronic equipments,
control devices and non-linear loads as part of automated processes to increase energy efficiency and
productivity. Voltage disturbances are the most common power quality problem due to this the use of a large
numbers of sophisticated and sensitive electronic equipment in industrial systems is increased. This paper
discusses the design and simulation of dynamic voltage restorer for improvement of power quality and
reduce the harmonics distortion of sensitive loads. Power quality problem is occurring at non-standard
voltage, current and frequency. Electronic devices are very sensitive loads. In power system voltage sag,
swell, flicker and harmonics are some of the problem to the sensitive load. The compensation capability
of a DVR depends primarily on the maximum voltage injection ability and the amount of stored
energy available within the restorer. This device is connected in series with the distribution feeder at
medium voltage. A fuzzy logic control is used to produce the gate pulses for control circuit of DVR and the
circuit is simulated by using MATLAB/SIMULINK software.
Study on the Fused Deposition Modelling In Additive ManufacturingIJERD Editor
Additive manufacturing process, also popularly known as 3-D printing, is a process where a product
is created in a succession of layers. It is based on a novel materials incremental manufacturing philosophy.
Unlike conventional manufacturing processes where material is removed from a given work price to derive the
final shape of a product, 3-D printing develops the product from scratch thus obviating the necessity to cut away
materials. This prevents wastage of raw materials. Commonly used raw materials for the process are ABS
plastic, PLA and nylon. Recently the use of gold, bronze and wood has also been implemented. The complexity
factor of this process is 0% as in any object of any shape and size can be manufactured.
Spyware triggering system by particular string valueIJERD Editor
This computer programme can be used for good and bad purpose in hacking or in any general
purpose. We can say it is next step for hacking techniques such as keylogger and spyware. Once in this system if
user or hacker store particular string as a input after that software continually compare typing activity of user
with that stored string and if it is match then launch spyware programme.
A Blind Steganalysis on JPEG Gray Level Image Based on Statistical Features a...IJERD Editor
This paper presents a blind steganalysis technique to effectively attack the JPEG steganographic
schemes i.e. Jsteg, F5, Outguess and DWT Based. The proposed method exploits the correlations between
block-DCTcoefficients from intra-block and inter-block relation and the statistical moments of characteristic
functions of the test image is selected as features. The features are extracted from the BDCT JPEG 2-array.
Support Vector Machine with cross-validation is implemented for the classification.The proposed scheme gives
improved outcome in attacking.
Secure Image Transmission for Cloud Storage System Using Hybrid SchemeIJERD Editor
- Data over the cloud is transferred or transmitted between servers and users. Privacy of that
data is very important as it belongs to personal information. If data get hacked by the hacker, can be
used to defame a person’s social data. Sometimes delay are held during data transmission. i.e. Mobile
communication, bandwidth is low. Hence compression algorithms are proposed for fast and efficient
transmission, encryption is used for security purposes and blurring is used by providing additional
layers of security. These algorithms are hybridized for having a robust and efficient security and
transmission over cloud storage system.
Application of Buckley-Leverett Equation in Modeling the Radius of Invasion i...IJERD Editor
A thorough review of existing literature indicates that the Buckley-Leverett equation only analyzes
waterflood practices directly without any adjustments on real reservoir scenarios. By doing so, quite a number
of errors are introduced into these analyses. Also, for most waterflood scenarios, a radial investigation is more
appropriate than a simplified linear system. This study investigates the adoption of the Buckley-Leverett
equation to estimate the radius invasion of the displacing fluid during waterflooding. The model is also adopted
for a Microbial flood and a comparative analysis is conducted for both waterflooding and microbial flooding.
Results shown from the analysis doesn’t only records a success in determining the radial distance of the leading
edge of water during the flooding process, but also gives a clearer understanding of the applicability of
microbes to enhance oil production through in-situ production of bio-products like bio surfactans, biogenic
gases, bio acids etc.
Gesture Gaming on the World Wide Web Using an Ordinary Web CameraIJERD Editor
- Gesture gaming is a method by which users having a laptop/pc/x-box play games using natural or
bodily gestures. This paper presents a way of playing free flash games on the internet using an ordinary webcam
with the help of open source technologies. Emphasis in human activity recognition is given on the pose
estimation and the consistency in the pose of the player. These are estimated with the help of an ordinary web
camera having different resolutions from VGA to 20mps. Our work involved giving a 10 second documentary to
the user on how to play a particular game using gestures and what are the various kinds of gestures that can be
performed in front of the system. The initial inputs of the RGB values for the gesture component is obtained by
instructing the user to place his component in a red box in about 10 seconds after the short documentary before
the game is finished. Later the system opens the concerned game on the internet on popular flash game sites like
miniclip, games arcade, GameStop etc and loads the game clicking at various places and brings the state to a
place where the user is to perform only gestures to start playing the game. At any point of time the user can call
off the game by hitting the esc key and the program will release all of the controls and return to the desktop. It
was noted that the results obtained using an ordinary webcam matched that of the Kinect and the users could
relive the gaming experience of the free flash games on the net. Therefore effective in game advertising could
also be achieved thus resulting in a disruptive growth to the advertising firms.
Hardware Analysis of Resonant Frequency Converter Using Isolated Circuits And...IJERD Editor
-LLC resonant frequency converter is basically a combo of series as well as parallel resonant ckt. For
LCC resonant converter it is associated with a disadvantage that, though it has two resonant frequencies, the
lower resonant frequency is in ZCS region[5]. For this application, we are not able to design the converter
working at this resonant frequency. LLC resonant converter existed for a very long time but because of
unknown characteristic of this converter it was used as a series resonant converter with basically a passive
(resistive) load. . Here, it was designed to operate in switching frequency higher than resonant frequency of the
series resonant tank of Lr and Cr converter acts very similar to Series Resonant Converter. The benefit of LLC
resonant converter is narrow switching frequency range with light load[6] . Basically, the control ckt plays a
very imp. role and hence 555 Timer used here provides a perfect square wave as the control ckt provides no
slew rate which makes the square wave really strong and impenetrable. The dead band circuit provides the
exclusive dead band in micro seconds so as to avoid the simultaneous firing of two pairs of IGBT’s where one
pair switches off and the other on for a slightest period of time. Hence, the isolator ckt here is associated with
each and every ckt used because it acts as a driver and an isolation to each of the IGBT is provided with one
exclusive transformer supply[3]. The IGBT’s are fired using the appropriate signal using the previous boards
and hence at last a high frequency rectifier ckt with a filtering capacitor is used to get an exact dc
waveform .The basic goal of this particular analysis is to observe the wave forms and characteristics of
converters with differently positioned passive elements in the form of tank circuits.
Simulated Analysis of Resonant Frequency Converter Using Different Tank Circu...IJERD Editor
LLC resonant frequency converter is basically a combo of series as well as parallel resonant ckt. For
LCC resonant converter it is associated with a disadvantage that, though it has two resonant frequencies, the
lower resonant frequency is in ZCS region [5]. For this application, we are not able to design the converter
working at this resonant frequency. LLC resonant converter existed for a very long time but because of
unknown characteristic of this converter it was used as a series resonant converter with basically a passive
(resistive) load. . Here, it was designed to operate in switching frequency higher than resonant frequency of the
series resonant tank of Lr and Cr converter acts very similar to Series Resonant Converter. The benefit of LLC
resonant converter is narrow switching frequency range with light load[6] . Basically, the control ckt plays a
very imp. role and hence 555 Timer used here provides a perfect square wave as the control ckt provides no
slew rate which makes the square wave really strong and impenetrable. The dead band circuit provides the
exclusive dead band in micro seconds so as to avoid the simultaneous firing of two pairs of IGBT’s where one
pair switches off and the other on for a slightest period of time. Hence, the isolator ckt here is associated with
each and every ckt used because it acts as a driver and an isolation to each of the IGBT is provided with one
exclusive transformer supply[3]. The IGBT’s are fired using the appropriate signal using the previous boards
and hence at last a high frequency rectifier ckt with a filtering capacitor is used to get an exact dc
waveform .The basic goal of this particular analysis is to observe the wave forms and characteristics of
converters with differently positioned passive elements in the form of tank circuits. The supported simulation
is done through PSIM 6.0 software tool
Amateurs Radio operator, also known as HAM communicates with other HAMs through Radio
waves. Wireless communication in which Moon is used as natural satellite is called Moon-bounce or EME
(Earth -Moon-Earth) technique. Long distance communication (DXing) using Very High Frequency (VHF)
operated amateur HAM radio was difficult. Even with the modest setup having good transceiver, power
amplifier and high gain antenna with high directivity, VHF DXing is possible. Generally 2X11 YAGI antenna
along with rotor to set horizontal and vertical angle is used. Moon tracking software gives exact location,
visibility of Moon at both the stations and other vital data to acquire real time position of moon.
“MS-Extractor: An Innovative Approach to Extract Microsatellites on „Y‟ Chrom...IJERD Editor
Simple Sequence Repeats (SSR), also known as Microsatellites, have been extensively used as
molecular markers due to their abundance and high degree of polymorphism. The nucleotide sequences of
polymorphic forms of the same gene should be 99.9% identical. So, Microsatellites extraction from the Gene is
crucial. However, Microsatellites repeat count is compared, if they differ largely, he has some disorder. The Y
chromosome likely contains 50 to 60 genes that provide instructions for making proteins. Because only males
have the Y chromosome, the genes on this chromosome tend to be involved in male sex determination and
development. Several Microsatellite Extractors exist and they fail to extract microsatellites on large data sets of
giga bytes and tera bytes in size. The proposed tool “MS-Extractor: An Innovative Approach to extract
Microsatellites on „Y‟ Chromosome” can extract both Perfect as well as Imperfect Microsatellites from large
data sets of human genome „Y‟. The proposed system uses string matching with sliding window approach to
locate Microsatellites and extracts them.
Importance of Measurements in Smart GridIJERD Editor
- The need to get reliable supply, independence from fossil fuels, and capability to provide clean
energy at a fixed and lower cost, the existing power grid structure is transforming into Smart Grid. The
development of a smart energy distribution grid is a current goal of many nations. A Smart Grid should have
new capabilities such as self-healing, high reliability, energy management, and real-time pricing. This new era
of smart future grid will lead to major changes in existing technologies at generation, transmission and
distribution levels. The incorporation of renewable energy resources and distribution generators in the existing
grid will increase the complexity, optimization problems and instability of the system. This will lead to a
paradigm shift in the instrumentation and control requirements for Smart Grids for high quality, stable and
reliable electricity supply of power. The monitoring of the grid system state and stability relies on the
availability of reliable measurement of data. In this paper the measurement areas that highlight new
measurement challenges, development of the Smart Meters and the critical parameters of electric energy to be
monitored for improving the reliability of power systems has been discussed.
Study of Macro level Properties of SCC using GGBS and Lime stone powderIJERD Editor
The document summarizes a study on the use of ground granulated blast furnace slag (GGBS) and limestone powder to replace cement in self-compacting concrete (SCC). Tests were conducted on SCC mixes with 0-50% replacement of cement with GGBS and 0-20% replacement with limestone powder. The results showed that replacing 30% of cement with GGBS and 15% with limestone powder produced SCC with the highest compressive strength of 46MPa, meeting fresh property requirements. The study concluded that this ternary blend of cement, GGBS and limestone powder can improve SCC properties while reducing costs.
In the rapidly evolving landscape of technologies, XML continues to play a vital role in structuring, storing, and transporting data across diverse systems. The recent advancements in artificial intelligence (AI) present new methodologies for enhancing XML development workflows, introducing efficiency, automation, and intelligent capabilities. This presentation will outline the scope and perspective of utilizing AI in XML development. The potential benefits and the possible pitfalls will be highlighted, providing a balanced view of the subject.
We will explore the capabilities of AI in understanding XML markup languages and autonomously creating structured XML content. Additionally, we will examine the capacity of AI to enrich plain text with appropriate XML markup. Practical examples and methodological guidelines will be provided to elucidate how AI can be effectively prompted to interpret and generate accurate XML markup.
Further emphasis will be placed on the role of AI in developing XSLT, or schemas such as XSD and Schematron. We will address the techniques and strategies adopted to create prompts for generating code, explaining code, or refactoring the code, and the results achieved.
The discussion will extend to how AI can be used to transform XML content. In particular, the focus will be on the use of AI XPath extension functions in XSLT, Schematron, Schematron Quick Fixes, or for XML content refactoring.
The presentation aims to deliver a comprehensive overview of AI usage in XML development, providing attendees with the necessary knowledge to make informed decisions. Whether you’re at the early stages of adopting AI or considering integrating it in advanced XML development, this presentation will cover all levels of expertise.
By highlighting the potential advantages and challenges of integrating AI with XML development tools and languages, the presentation seeks to inspire thoughtful conversation around the future of XML development. We’ll not only delve into the technical aspects of AI-powered XML development but also discuss practical implications and possible future directions.
Programming Foundation Models with DSPy - Meetup SlidesZilliz
Prompting language models is hard, while programming language models is easy. In this talk, I will discuss the state-of-the-art framework DSPy for programming foundation models with its powerful optimizers and runtime constraint system.
Introduction of Cybersecurity with OSS at Code Europe 2024Hiroshi SHIBATA
I develop the Ruby programming language, RubyGems, and Bundler, which are package managers for Ruby. Today, I will introduce how to enhance the security of your application using open-source software (OSS) examples from Ruby and RubyGems.
The first topic is CVE (Common Vulnerabilities and Exposures). I have published CVEs many times. But what exactly is a CVE? I'll provide a basic understanding of CVEs and explain how to detect and handle vulnerabilities in OSS.
Next, let's discuss package managers. Package managers play a critical role in the OSS ecosystem. I'll explain how to manage library dependencies in your application.
I'll share insights into how the Ruby and RubyGems core team works to keep our ecosystem safe. By the end of this talk, you'll have a better understanding of how to safeguard your code.
Nunit vs XUnit vs MSTest Differences Between These Unit Testing Frameworks.pdfflufftailshop
When it comes to unit testing in the .NET ecosystem, developers have a wide range of options available. Among the most popular choices are NUnit, XUnit, and MSTest. These unit testing frameworks provide essential tools and features to help ensure the quality and reliability of code. However, understanding the differences between these frameworks is crucial for selecting the most suitable one for your projects.
Letter and Document Automation for Bonterra Impact Management (fka Social Sol...Jeffrey Haguewood
Sidekick Solutions uses Bonterra Impact Management (fka Social Solutions Apricot) and automation solutions to integrate data for business workflows.
We believe integration and automation are essential to user experience and the promise of efficient work through technology. Automation is the critical ingredient to realizing that full vision. We develop integration products and services for Bonterra Case Management software to support the deployment of automations for a variety of use cases.
This video focuses on automated letter generation for Bonterra Impact Management using Google Workspace or Microsoft 365.
Interested in deploying letter generation automations for Bonterra Impact Management? Contact us at sales@sidekicksolutionsllc.com to discuss next steps.
Skybuffer AI: Advanced Conversational and Generative AI Solution on SAP Busin...Tatiana Kojar
Skybuffer AI, built on the robust SAP Business Technology Platform (SAP BTP), is the latest and most advanced version of our AI development, reaffirming our commitment to delivering top-tier AI solutions. Skybuffer AI harnesses all the innovative capabilities of the SAP BTP in the AI domain, from Conversational AI to cutting-edge Generative AI and Retrieval-Augmented Generation (RAG). It also helps SAP customers safeguard their investments into SAP Conversational AI and ensure a seamless, one-click transition to SAP Business AI.
With Skybuffer AI, various AI models can be integrated into a single communication channel such as Microsoft Teams. This integration empowers business users with insights drawn from SAP backend systems, enterprise documents, and the expansive knowledge of Generative AI. And the best part of it is that it is all managed through our intuitive no-code Action Server interface, requiring no extensive coding knowledge and making the advanced AI accessible to more users.
Fueling AI with Great Data with Airbyte WebinarZilliz
This talk will focus on how to collect data from a variety of sources, leveraging this data for RAG and other GenAI use cases, and finally charting your course to productionalization.
Main news related to the CCS TSI 2023 (2023/1695)Jakub Marek
An English 🇬🇧 translation of a presentation to the speech I gave about the main changes brought by CCS TSI 2023 at the biggest Czech conference on Communications and signalling systems on Railways, which was held in Clarion Hotel Olomouc from 7th to 9th November 2023 (konferenceszt.cz). Attended by around 500 participants and 200 on-line followers.
The original Czech 🇨🇿 version of the presentation can be found here: https://www.slideshare.net/slideshow/hlavni-novinky-souvisejici-s-ccs-tsi-2023-2023-1695/269688092 .
The videorecording (in Czech) from the presentation is available here: https://youtu.be/WzjJWm4IyPk?si=SImb06tuXGb30BEH .
Digital Marketing Trends in 2024 | Guide for Staying AheadWask
https://www.wask.co/ebooks/digital-marketing-trends-in-2024
Feeling lost in the digital marketing whirlwind of 2024? Technology is changing, consumer habits are evolving, and staying ahead of the curve feels like a never-ending pursuit. This e-book is your compass. Dive into actionable insights to handle the complexities of modern marketing. From hyper-personalization to the power of user-generated content, learn how to build long-term relationships with your audience and unlock the secrets to success in the ever-shifting digital landscape.
HCL Notes und Domino Lizenzkostenreduzierung in der Welt von DLAUpanagenda
Webinar Recording: https://www.panagenda.com/webinars/hcl-notes-und-domino-lizenzkostenreduzierung-in-der-welt-von-dlau/
DLAU und die Lizenzen nach dem CCB- und CCX-Modell sind für viele in der HCL-Community seit letztem Jahr ein heißes Thema. Als Notes- oder Domino-Kunde haben Sie vielleicht mit unerwartet hohen Benutzerzahlen und Lizenzgebühren zu kämpfen. Sie fragen sich vielleicht, wie diese neue Art der Lizenzierung funktioniert und welchen Nutzen sie Ihnen bringt. Vor allem wollen Sie sicherlich Ihr Budget einhalten und Kosten sparen, wo immer möglich. Das verstehen wir und wir möchten Ihnen dabei helfen!
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IJERD (www.ijerd.com) International Journal of Engineering Research and Development
1. International Journal of Engineering Research and Development
e-ISSN : 2278-067X, p-ISSN : 2278-800X, www.ijerd.com
Volume 2, Issue 7 (August 2012), PP. 19-25
Microcontroller Synthesized Function Generator
Visa M. Ibrahim1.Oni Taiwo2.Uyoata E. Uyoata3
1,2,3
Department of Electrical and Electronic Engineering, School of Engineering and Engineering Technology, Modibbo
Adamma University of Technology Yola, Adamawa State. Nigeria
Abstract––The need to ascertain the reliability and performance of electronic systems under test and in operation using
electronic instruments such as the function generator cannot be over emphasized. The output responses of most
electronic systems under test operation is the waveforms they generate on a scope; in consonant with the function
generator waveform responses which could be in the standardized or non-standardized format. The continuous clamour
for an easily re-programmable, simplified hardware, decreased power consumption, and high in performance function
generation is the major set out goal of this paper. Practical results obtained show an appreciable degree of accuracy and
repeatability of the system moreover, the microcontroller makes the system user-friendly.
Keywords––Microcontroller, DAC, Synthesized Function Generator
I. INTRODUCTION
The performance of most electronic systems under test and in operation using the function generator are basically
to extract vital information based on the generated signals displayed on a scope, and in some other case be used to initiate
control for systems and as such there is need to inhabit special signals for such operation [1]
Various approaches have been adopted in the past, but with the ever increasing need for flexibility and user-
friendliness evolves the digital synthesis approach based on the use of microcontrollers [2, 3]. The microcontroller approach;
are easily re-programmable, a simplified hardware design, allow user selectivity by a matrix keypad [4]. Time varying
signals in digital format are generated from the microcontroller, as it is converted into the corresponding analogue format at
a high processing speed.
It is worth mentioning here that the system performance is enhanced by using a faster microcontroller and the
digital to analogue converter which is the 12 or 16 bit categories [5, 6].
Practical result shows the high in performance, integrating more functions such as to generate square, ramp, sine,
and triangular wave signals in the micro-controlled synthesized function generator [7]. In addition, problem on stability,
accuracy, reproducibility, and the need to change external components when certain desirable parameters are to be obtained
have been achieved.
II. SYSTEM DESCRIPTION
4*4 Matrix Micro- DAC Current -voltage Output to scope
keypad controller converter
Regulated power supply
Figure 1: system block diagram
The block diagram shown in figure 1 describes the overall system. The system comprises of a 4 * 4 matrix keypad
which allows user selectivity of the various waveforms at desired frequencies. The user-friendly matrix keypad sends signals
in the digital format to microcontroller. The microcontroller which is the brain and control circuit behind the entire design
circuitry is controlled with a written program stored into its read only memory (ROM). The co-ordination of the system’s
operation are with the direction of the written program, allowing:
i. Conversion ofnumerical value of zeros and ones to their corresponding time varying current value.
19
2. Microcontroller Synthesized Function Generator
ii. Comparing the numerical value based on the calculated time delay in other to interpret it in the corresponding
current train before it is being sent to the digital-analogue converter unit.
In this paper, the design utilized a circuit assembly of a digital-analogue converter, current-voltage converter and a few
other basic electronic components to achieve the final generation of the waveform in the analogue format to be displayed on
a scope.
The power supply provides the voltage and current requirement for effective performance of the system. The
uniqueness of this power supply is the generation for a negative rail for compensation on the digital-analogue converter.
III. DESIGN FRAMEWORK
The design process is divided into two viz., the hardware and the software designs.
1.1 Hardware Design
1.1.1 The Microcontroller Unit
The system is designed around the Intel’s AT89s52 microcontroller. The Intel AT89s52 microcontroller is a
complete computer on a single chip. This is because it has read only memory (ROM), Random Access Memory (RAM) and
central processing unit (CPU) embedded in it.The AT89s52 is a low-power, high performance CMOS 8-bit microcomputer
with 8k bytes of memory [8]. The device is manufactured using Atmel’s high-density non-volatile memory technology and is
compatible with the industry standard 80c51 and 80c52 instruction set and pin out. The on-chip flash allows the program
memory to be reprogrammed in-system or by a conventional non-volatile memory programmer. It also provides
programmable timer, programmable I/O ports together with 256x8-bit RAM for use as “scratch book” and also for stack
purposes [8,9]. Voltage regulation was achieved through the use of LM 7805, LM 7815 and LM 7915 regulators.
1.1.2 Interfacing Microcontroller to Coordinate the Entire System
Numerical value of zeros and ones selected from the 4 * 4 matrix keypad are sent to the microcontroller through
port one bit zero through port one bit seven (p1.0-p1.7). The digital format generated from the selectively on the matrix
keypad is sent to the combined digital-analogue converter circuitry (DAC) which allows it to be represented in the analogue
format on the scope through port two bit zero through port two bit seven (p2.0-p2.7). Figure 2 gives clearer view of this
hardware.
R14 R13 R12 R11
R4
C3
U1
4 U3
5
19 39
XT AL1 P0.0/AD0
R2 X1 P0.1/AD1
38 2
37 6
P0.2/AD2
18 36 3
XT AL2 P0.3/AD3
C4 P0.4/AD4
35
34
P0.5/AD5
7
1
33
P0.6/AD6 OPA637AU
9 32
R7 RST P0.7/AD7
21
P2.0/A8
22
P2.1/A9
C5 P2.2/A10
23
29 24
R8 30
PSEN P2.3/A11
25
ALE P2.4/A12
31 26
EA P2.5/A13
27
P2.6/A14
28
8
7
6
5
4
3
2
P2.7/A15
1 10 U5
A4
A3
A2
A1
VEE
IOUT
GND
P1.0/T2 P3.0/RXD
2 11
R9 3
P1.1/T 2EX P3.1/T XD
12
DAC0807
P1.2 P3.2/INT0
0R1
4
P1.3 P3.3/INT1
13 R3 C2
5 14
P1.4 P3.4/T0
6 15
VREF(+)
P1.5 P3.5/T1
VREF(-)
7 16
COMP
P1.6 P3.6/WR
VCC
8 17
A5
A6
A7
A8
P1.7 P3.7/RD
80C52
9
10
11
12
13
14
15
16
R5
R1
R10
C1
Figure 2: Complete Circuit diagram
20
3. Microcontroller Synthesized Function Generator
VCC
U1
7805
VIN OUT
GND
C1
0.1uF
R1 C4
D1 1M 6800uF U2
BRIDGE 7815
TR1
VIN OUT
GND
C2
0.1uF
TRAN-2P39 R2 C5
1M
6800uF
U3
7915
VIN OUT
GND GND C3
0.1uF
GND
Figure 3: Circuit diagram for regulated power supply
1.2 Software Design
1.2.1 Software Development
The program was written in assembly language using the 8051 instruction set. Calculated parameters were carried out in
other to achieve the program software development for the various waveforms generated. These and the flowchart are
discussed in this paper as:
i. Development of square wave program
The square wave signal is generated by a suitable digital logic of Ton and Toff and is equivalent to the analogue output.
V ref
Tc
Figure 4: Square Waveform
Tp = Ton + Toff = T c
1
Where Tp = is the time period between Ton and Toff
F
And F = desired frequency
Ton = Toff
Tp = 2 Ton
Tc
Ton =
2
The program time delay equivalent to theTon of the square wave generated is:
Tc
Tpdsq = Ton =
2
ii. Development of saw tooth program:
21
4. Microcontroller Synthesized Function Generator
The logic in generating a saw toot wave is such that once the maximum output digital logic is attained, there is a sudden drop
of voltage at a negative level.
V ref
0
T
Figure 3.2: Saw tooth Waveform
255
Step Size =
Vref
Where Vref = reference voltage
1
And Tp = Ta =
F
Ta = time for an ascending level to achieve a step size
F = desired frequency
Ta
T pdsq = the program time delay for a generated saw tooth (Ramp) signal
step size
iii. Development of triangular wave program
255
Ta Td
T
Figure 5: Triangular Waveform
Tp = Ta + Td
Where Tp = time period
Ta = time for ascending level
Td = time for descending level
But Tp = 2Tp
Tp
Ta =
2
255
But also step size =
Vref
The program time delay to generate a triangular waveform is
Ta TaVref
TpdTR = orTpdTR =
step size 255
iv. Development of sine wave program:
The technique used for the generation of sine wave as presented in this paper is the use of a look-up table where
predetermined values of the sine function are calculated and loaded on a separate memory bank.
22
5. Microcontroller Synthesized Function Generator
Vref
Figure 6: Sine Waveform
Vout = 2.5v + (2.5 × sin θ)
255
The value sent to DAC (decimal)= Vout ×
Vref
T
But t =
4
Where T = periodic time
1
Also T =
f
1
Where f = desired frequency; t =
4f
t
The required program time delay for sine wave generation is given by T pds =
So
Where So is the total number of samples from the look-up table.
Angle(θ) sinθ Vout voltage Mag Values sent to DAC (Dec) voltage Hex value
2.5V + (5V × sinθ) 256
mag ×
s
Table 1:Look-up table for waveform samples
23
6. Microcontroller Synthesized Function Generator
Initialize
Prompt
Read wave form
Square No
Calculate
No
DAC Saw
Calculate
No
Train
No Cycle DAC
Calculate
End d No
No Cycle Sine
DAC
End Calculate
No Cycle
d
DAC
End
No
No Cycle
Yes
End
Figure 3.5:system flowchart
24
7. Microcontroller Synthesized Function Generator
IV. PERFORMANCE EVALUATION AND TESTING
Practical tests were carried out on the system performance during and after the construction. From the
experimental results show a stair case appearance of the square and at a more fast processing speed for the sine wave
generated.
V. CONCLUSION
The use of the microcontroller to actualize the ever needed flexibility thereby eliminating the need of changing the
hardware whenever certain desirable functions are needed have been achieved by the evolution of this design. However, with
little modifications on the hardware especially with regards to the use of a 16 – bit microcontroller and 16 – bit on chip
digital-analogue converter (DAC), the frequency are varied adequately with the waveform from the keypad.
BIBLIOGRAPHY
[1]. MT Abuelmatti A. RAL-Ali (1995) “Fourth Saudi Engineering conference “Department of Electrical Engineering King Fahd
University of Petroleum and Minerals.
[2]. Eva Murphy (2000) “DDS Control Waveforms in Test, Measurement and Communications” Analog devices co-operation
htt//www.analog.com
[3]. M.M.S Ananad (2006) Electrical Instruments and Instrumentation Technology.
[4]. Dag Stranneby (1996) Digital Signal Processing and Applications
[5]. Muhammed Ali Mazidi (2nd edition) The 8051 Microcontroller and Embedded System Using Assembly and C
[6]. Thomas C. Hayes (2002) The Art of Electronics Student Manuals, Cambridge University press.
[7]. Hall F. and Lister P.F (1980), Microprocessor Fundamentals, Pitman, London.
[8]. Horowitz P. and Hill W. (1989), The Art of Electronics, 2nd Edition, Cambridge University press.
25