Generating a specific power model for the platform is a pre-requirement for delpoying EAS and IPA. This makes understanding power models and how to generate parameters for them a useful skill. In this session we demonstrate how to use workload automation to gather power data from a board. We will then describe how to derive rough values for the EAS and IPA power models using nothing but this easily observable data. We will not rely on any information provided by OEM or SoC vendor.
LAS16-105: Walkthrough of the EAS kernel adaptation to the Android Common KernelLinaro
LAS16-105: Walkthrough of the EAS kernel adaptation to the Android Common Kernel
Speakers: Juri Lelli
Date: September 26, 2016
★ Session Description ★
Walkthrough of the EAS kernel adaptation to the Android Common Kernel.
★ Resources ★
Etherpad: pad.linaro.org/p/las16-105
Presentations & Videos: http://connect.linaro.org/resource/las16/las16-105/
★ Event Details ★
Linaro Connect Las Vegas 2016 – #LAS16
September 26-30, 2016
http://www.linaro.org
http://connect.linaro.org
LCU14-410: How to build an Energy Model for your SoCLinaro
LCU14-410: How to build an Energy Model for your SoC
---------------------------------------------------
Speaker: Morten Rasmussen
Date: September 18, 2014
---------------------------------------------------
★ Session Summary ★
- ARM to provide a quick overview of the current energy model
- Introduce the methodology/recipe used to build the energy model
- Discuss ways in which the model is used today and intended next steps
- Key outcomes:
- Describe the
- Identify gaps and limitations
Summary of EAS workshop (Amit)
-Summary of hacking sessions - plan to integrate Qualcomm-ARM-Linaro work to send upstream
-Key outcomes:
-List of features and responsibilities
-Dependencies between upstreaming of features, if any
---------------------------------------------------
★ Resources ★
Zerista: http://lcu14.zerista.com/event/member/137778
Google Event: https://plus.google.com/u/0/events/ck3ti7eurknnsq0a4e9ks5a1sbs
Video: https://www.youtube.com/watch?v=JfZt8W3NVgk&list=UUIVqQKxCyQLJS6xvSmfndLA
Etherpad: http://pad.linaro.org/p/lcu14-410
---------------------------------------------------
★ Event Details ★
Linaro Connect USA - #LCU14
September 15-19th, 2014
Hyatt Regency San Francisco Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
The Linux Kernel Scheduler (For Beginners) - SFO17-421Linaro
Session ID: SFO17-421
Session Name: The Linux Kernel Scheduler (For Beginners) - SFO17-421
Speaker: Viresh Kumar
Track: Power Management
★ Session Summary ★
This talk will take you through the internals of the Linux Kernel scheduler.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/sfo17/sfo17-421/
Presentation:
Video: https://www.youtube.com/watch?v=q283Wm__QQ0
---------------------------------------------------
★ Event Details ★
Linaro Connect San Francisco 2017 (SFO17)
25-29 September 2017
Hyatt Regency San Francisco Airport
---------------------------------------------------
Keyword:
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://twitter.com/linaroorg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961
Session ID: SFO17-307
Session Name: WALT vs PELT : Redux
- SFO17-307
Speaker: Pavan Kumar Kondeti
Track: LMG
★ Session Summary ★
New data on the comparison of the WALT and PELT load tracking schemes in the scheduler
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/sfo17/sfo17-307/
Presentation:
Video: https://www.youtube.com/watch?v=r3QKEYpyetU
---------------------------------------------------
★ Event Details ★
Linaro Connect San Francisco 2017 (SFO17)
25-29 September 2017
Hyatt Regency San Francisco Airport
---------------------------------------------------
Keyword:
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://twitter.com/linaroorg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961
SFO15-302: Energy Aware Scheduling: Progress UpdateLinaro
SFO15-302: Energy Aware Scheduling: Progress Update
Speakers: Amit Kucheria, Robin Randhawa, Ian Rickards
Date: September 23, 2015
★ Session Description ★
ARM and Linaro are jointly developing “Energy Aware Scheduling”, a technique that improves power management on Linux by making it more central and easier to tune. Since the original discussions started on the Linux Kernel Mailing List back in 2013, there has been significant progress during 2015 with the posting of a full-functionality implementation. This talk will cover details of the components and how to get involved.
★ Resources ★
Video: https://www.youtube.com/watch?v=i4GVrG_gkYg
Presentation: http://www.slideshare.net/linaroorg/sfo15302-energy-aware-scheduling-progress-update
Etherpad: pad.linaro.org/p/sfo15-302
Pathable: https://sfo15.pathable.com/meetings/302934
★ Event Details ★
Linaro Connect San Francisco 2015 - #SFO15
September 21-25, 2015
Hyatt Regency Hotel
http://www.linaro.org
http://connect.linaro.org
LAS16-105: Walkthrough of the EAS kernel adaptation to the Android Common KernelLinaro
LAS16-105: Walkthrough of the EAS kernel adaptation to the Android Common Kernel
Speakers: Juri Lelli
Date: September 26, 2016
★ Session Description ★
Walkthrough of the EAS kernel adaptation to the Android Common Kernel.
★ Resources ★
Etherpad: pad.linaro.org/p/las16-105
Presentations & Videos: http://connect.linaro.org/resource/las16/las16-105/
★ Event Details ★
Linaro Connect Las Vegas 2016 – #LAS16
September 26-30, 2016
http://www.linaro.org
http://connect.linaro.org
LCU14-410: How to build an Energy Model for your SoCLinaro
LCU14-410: How to build an Energy Model for your SoC
---------------------------------------------------
Speaker: Morten Rasmussen
Date: September 18, 2014
---------------------------------------------------
★ Session Summary ★
- ARM to provide a quick overview of the current energy model
- Introduce the methodology/recipe used to build the energy model
- Discuss ways in which the model is used today and intended next steps
- Key outcomes:
- Describe the
- Identify gaps and limitations
Summary of EAS workshop (Amit)
-Summary of hacking sessions - plan to integrate Qualcomm-ARM-Linaro work to send upstream
-Key outcomes:
-List of features and responsibilities
-Dependencies between upstreaming of features, if any
---------------------------------------------------
★ Resources ★
Zerista: http://lcu14.zerista.com/event/member/137778
Google Event: https://plus.google.com/u/0/events/ck3ti7eurknnsq0a4e9ks5a1sbs
Video: https://www.youtube.com/watch?v=JfZt8W3NVgk&list=UUIVqQKxCyQLJS6xvSmfndLA
Etherpad: http://pad.linaro.org/p/lcu14-410
---------------------------------------------------
★ Event Details ★
Linaro Connect USA - #LCU14
September 15-19th, 2014
Hyatt Regency San Francisco Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
The Linux Kernel Scheduler (For Beginners) - SFO17-421Linaro
Session ID: SFO17-421
Session Name: The Linux Kernel Scheduler (For Beginners) - SFO17-421
Speaker: Viresh Kumar
Track: Power Management
★ Session Summary ★
This talk will take you through the internals of the Linux Kernel scheduler.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/sfo17/sfo17-421/
Presentation:
Video: https://www.youtube.com/watch?v=q283Wm__QQ0
---------------------------------------------------
★ Event Details ★
Linaro Connect San Francisco 2017 (SFO17)
25-29 September 2017
Hyatt Regency San Francisco Airport
---------------------------------------------------
Keyword:
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://twitter.com/linaroorg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961
Session ID: SFO17-307
Session Name: WALT vs PELT : Redux
- SFO17-307
Speaker: Pavan Kumar Kondeti
Track: LMG
★ Session Summary ★
New data on the comparison of the WALT and PELT load tracking schemes in the scheduler
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/sfo17/sfo17-307/
Presentation:
Video: https://www.youtube.com/watch?v=r3QKEYpyetU
---------------------------------------------------
★ Event Details ★
Linaro Connect San Francisco 2017 (SFO17)
25-29 September 2017
Hyatt Regency San Francisco Airport
---------------------------------------------------
Keyword:
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://twitter.com/linaroorg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961
SFO15-302: Energy Aware Scheduling: Progress UpdateLinaro
SFO15-302: Energy Aware Scheduling: Progress Update
Speakers: Amit Kucheria, Robin Randhawa, Ian Rickards
Date: September 23, 2015
★ Session Description ★
ARM and Linaro are jointly developing “Energy Aware Scheduling”, a technique that improves power management on Linux by making it more central and easier to tune. Since the original discussions started on the Linux Kernel Mailing List back in 2013, there has been significant progress during 2015 with the posting of a full-functionality implementation. This talk will cover details of the components and how to get involved.
★ Resources ★
Video: https://www.youtube.com/watch?v=i4GVrG_gkYg
Presentation: http://www.slideshare.net/linaroorg/sfo15302-energy-aware-scheduling-progress-update
Etherpad: pad.linaro.org/p/sfo15-302
Pathable: https://sfo15.pathable.com/meetings/302934
★ Event Details ★
Linaro Connect San Francisco 2015 - #SFO15
September 21-25, 2015
Hyatt Regency Hotel
http://www.linaro.org
http://connect.linaro.org
LAS16-307: Benchmarking Schedutil in AndroidLinaro
LAS16-307: Benchmarking Schedutil in Android
Speakers: Steve Muckle
Date: September 28, 2016
★ Session Description ★
Being able to see the performance and power impacts of changes in a real world environment such as Android is a prerequisite to doing meaningful development on scheduler-guided frequency (or many other sensitive subsystems). The first half of this session will review setting up the tools to automate testing for performance and power in Android. The second half will cover the results of using these tests to compare the schedutil and interactive governors.
★ Resources ★
Etherpad: pad.linaro.org/p/las16-307
Presentations & Videos: http://connect.linaro.org/resource/las16/las16-307/
★ Event Details ★
Linaro Connect Las Vegas 2016 – #LAS16
September 26-30, 2016
http://www.linaro.org
http://connect.linaro.org
Note: When you view the the slide deck via web browser, the screenshots may be blurred. You can download and view them offline (Screenshots are clear).
Note: When you view the the slide deck via web browser, the screenshots may be blurred. You can download and view them offline (Screenshots are clear).
HKG15-107: ACPI Power Management on ARM64 Servers (v2)Linaro
HKG15-107: ACPI Power Management on ARM64 Servers
---------------------------------------------------
Speaker: Ashwin Chaugule
Date: February 9, 2015
---------------------------------------------------
★ Session Summary ★
Status of CPPC with runtime PM and discussion on idle PM with ACPI
--------------------------------------------------
★ Resources ★
Pathable: https://hkg15.pathable.com/meetings/250767
Video: https://www.youtube.com/watch?v=eDDgYIkUHLI
Etherpad: http://pad.linaro.org/p/hkg15-107
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2015 - #HKG15
February 9-13th, 2015
Regal Airport Hotel Hong Kong Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
Основные темы, затронутые на семинаре:
Задачи и компоненты подсистемы управления памятью;
Аппаратные возможности платформы x86_64;
Как описывается в ядре физическая и виртуальная память;
API подсистемы управления памятью;
Высвобождение ранее занятой памяти;
Инструменты мониторинга;
Memory Cgroups;
Compaction — дефрагментация физической памяти.
Note: When you view the the slide deck via web browser, the screenshots may be blurred. You can download and view them offline (Screenshots are clear).
This slide provides a basic understanding of hypervisor support in ARM v8 and above processors. And these slides (intent to) give some guidelines to automotive engineers to compare and choose right solution!
Linux Kernel Booting Process (2) - For NLKBshimosawa
Describes the bootstrapping part in Linux, and related architectural mechanisms and technologies.
This is the part two of the slides, and the succeeding slides may contain the errata for this slide.
New Ways to Find Latency in Linux Using TracingScyllaDB
Ftrace is the official tracer of the Linux kernel. It originated from the real-time patch (now known as PREEMPT_RT), as developing an operating system for real-time use requires deep insight and transparency of the happenings of the kernel. Not only was tracing useful for debugging, but it was critical for finding areas in the kernel that was causing unbounded latency. It's no wonder why the ftrace infrastructure has a lot of tooling for seeking out latency. Ftrace was introduced into mainline Linux in 2008, and several talks have been done on how to utilize its tracing features. But a lot has happened in the past few years that makes the tooling for finding latency much simpler. Other talks at P99 will discuss the new ftrace tracers "osnoise" and "timerlat", but this talk will focus more on the new flexible and dynamic aspects of ftrace that facilitates finding latency issues which are more specific to your needs. Some of this work may still be in a proof of concept stage, but this talk will give you the advantage of knowing what tools will be available to you in the coming year.
How to achieve 95%+ Accurate power measurement during architecture exploration? Deepak Shankar
During the conceptualization and architectural exploration phases, it is crucial to assess the power budget.
Would you like to accurately measure the:
1. Power consumed for a proposed embedded software or firmware?
2. Savings of a Power Management Algorithm prior to development?
3. Power impact of hardware configuration change?
4. Trade-off between Power and Performance?
5. Temperature, heat, peak power and cumulative power?
LAS16-307: Benchmarking Schedutil in AndroidLinaro
LAS16-307: Benchmarking Schedutil in Android
Speakers: Steve Muckle
Date: September 28, 2016
★ Session Description ★
Being able to see the performance and power impacts of changes in a real world environment such as Android is a prerequisite to doing meaningful development on scheduler-guided frequency (or many other sensitive subsystems). The first half of this session will review setting up the tools to automate testing for performance and power in Android. The second half will cover the results of using these tests to compare the schedutil and interactive governors.
★ Resources ★
Etherpad: pad.linaro.org/p/las16-307
Presentations & Videos: http://connect.linaro.org/resource/las16/las16-307/
★ Event Details ★
Linaro Connect Las Vegas 2016 – #LAS16
September 26-30, 2016
http://www.linaro.org
http://connect.linaro.org
Note: When you view the the slide deck via web browser, the screenshots may be blurred. You can download and view them offline (Screenshots are clear).
Note: When you view the the slide deck via web browser, the screenshots may be blurred. You can download and view them offline (Screenshots are clear).
HKG15-107: ACPI Power Management on ARM64 Servers (v2)Linaro
HKG15-107: ACPI Power Management on ARM64 Servers
---------------------------------------------------
Speaker: Ashwin Chaugule
Date: February 9, 2015
---------------------------------------------------
★ Session Summary ★
Status of CPPC with runtime PM and discussion on idle PM with ACPI
--------------------------------------------------
★ Resources ★
Pathable: https://hkg15.pathable.com/meetings/250767
Video: https://www.youtube.com/watch?v=eDDgYIkUHLI
Etherpad: http://pad.linaro.org/p/hkg15-107
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2015 - #HKG15
February 9-13th, 2015
Regal Airport Hotel Hong Kong Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
Основные темы, затронутые на семинаре:
Задачи и компоненты подсистемы управления памятью;
Аппаратные возможности платформы x86_64;
Как описывается в ядре физическая и виртуальная память;
API подсистемы управления памятью;
Высвобождение ранее занятой памяти;
Инструменты мониторинга;
Memory Cgroups;
Compaction — дефрагментация физической памяти.
Note: When you view the the slide deck via web browser, the screenshots may be blurred. You can download and view them offline (Screenshots are clear).
This slide provides a basic understanding of hypervisor support in ARM v8 and above processors. And these slides (intent to) give some guidelines to automotive engineers to compare and choose right solution!
Linux Kernel Booting Process (2) - For NLKBshimosawa
Describes the bootstrapping part in Linux, and related architectural mechanisms and technologies.
This is the part two of the slides, and the succeeding slides may contain the errata for this slide.
New Ways to Find Latency in Linux Using TracingScyllaDB
Ftrace is the official tracer of the Linux kernel. It originated from the real-time patch (now known as PREEMPT_RT), as developing an operating system for real-time use requires deep insight and transparency of the happenings of the kernel. Not only was tracing useful for debugging, but it was critical for finding areas in the kernel that was causing unbounded latency. It's no wonder why the ftrace infrastructure has a lot of tooling for seeking out latency. Ftrace was introduced into mainline Linux in 2008, and several talks have been done on how to utilize its tracing features. But a lot has happened in the past few years that makes the tooling for finding latency much simpler. Other talks at P99 will discuss the new ftrace tracers "osnoise" and "timerlat", but this talk will focus more on the new flexible and dynamic aspects of ftrace that facilitates finding latency issues which are more specific to your needs. Some of this work may still be in a proof of concept stage, but this talk will give you the advantage of knowing what tools will be available to you in the coming year.
How to achieve 95%+ Accurate power measurement during architecture exploration? Deepak Shankar
During the conceptualization and architectural exploration phases, it is crucial to assess the power budget.
Would you like to accurately measure the:
1. Power consumed for a proposed embedded software or firmware?
2. Savings of a Power Management Algorithm prior to development?
3. Power impact of hardware configuration change?
4. Trade-off between Power and Performance?
5. Temperature, heat, peak power and cumulative power?
The Hidden Face of Cost-Based Optimizer: PL/SQL Specific StatisticsMichael Rosenblum
Database statistics are not limited to tables, columns, and indexes. PL/SQL functions also have a number of associated statistics, namely costs (CPU, I/O, network), selectivity, and cardinality (for functions that return collections). These statistics have default values that only somewhat represent reality. However, these values are always used by Oracle's cost-based optimizer to build execution plans. This session uses real-life examples to illustrate how properly managed PL/SQL statistics can significantly improve executions plans. It also demonstrates that Oracle's extensible optimizer is flexible enough to support packaged functions.
One of the biggest issues for a developer – whether they are an engineer at an OEM or working for a mobile AI application startup – is that their apps are at the mercy of pre-set power and performance settings as defined by OEMs or Silicon vendors. So how can a developer break through that barrier when it seems their hands are tied behind their backs? The Snapdragon Power Optimization SDK allows developers to control the CPU and GPU frequency much more finely from their own application logic. This provides developers with more control within the bounds of the power/thermal framework.
- What we mean by EAS core and how it's distinct from the other components - also why it's so difficult to get it merged. (This is driven by key partner concerns).
- An update on misc work that's underway to resolve the upstreaming.
- Misc load balance pathway enhancements
- Wakeup pathway mods (cleanups, basic big.LITTLE capacity awareness etc)
- Periodic load balancer mods.
- Energy model expression (why this is important, partner perspectives/experience and bottlenecks)
- Proposals to get an expression into the mainline
- Optional boot-time auto-detection of capacity over-ridable by sysfs
- Leveraging the merged power coefficient bindings
- Leveraging the OPP bindings
.. to effectively get to EAS' struct sched_group_energy.
- How we are structuring things to ease upstream acceptance. What's helping, what's not, where partners can help.
Deep Learning Neural Network Acceleration at the Edge - Andrea GalloLinaro
Short
The growing amount of data captured by sensors and the real time constraints imply that not only big data analytics but also Machine Learning (ML) inference shall be executed at the edge. The multiple options for neural network acceleration in Arm-based platforms provide an unprecedented opportunity for new intelligent devices. It also raises the risk of fragmentation and duplication of efforts when multiple frameworks shall support multiple accelerators.
Andrea Gallo, Linaro VP of Segment Groups, will summarise the existing NN frameworks, accelerator solutions, and will describe the efforts underway in the Arm ecosystem.
Abstract
The dramatically growing amount of data captured by sensors and the ever more stringent requirements for latency and real time constraints are paving the way for edge computing, and this implies that not only big data analytics but also Machine Learning (ML) inference shall be executed at the edge. The multiple options for neural network acceleration in recent Arm-based platforms provides an unprecedented opportunity for new intelligent devices with ML inference. It also raises the risk of fragmentation and duplication of efforts when multiple frameworks shall support multiple accelerators.
Andrea Gallo, Linaro VP of Segment Groups, will summarise the existing NN frameworks, model description formats, accelerator solutions, low cost development boards and will describe the efforts underway to identify the best technologies to improve the consolidation and enable the competitive innovative advantage from all vendors.
Audience
The session will be useful for executives to engineers. Executives will gain a deeper understanding of the issues and opportunities. Engineers at NN acceleration IP design houses will take away ideas for how to collaborate in the open source community on their area of expertise, how to evaluate the performance and accelerate multiple NN frameworks without modifying them for each new IP, whether it be targeting edge computing gateways, smart devices or simple microcontrollers.
Benefits to the Ecosystem
The AI deep learning neural network ecosystem is starting just now and it has similar implications with open source as GPU and video accelerators had in the early days with user space drivers, binary blobs, proprietary APIs and all possible ways to protect their IPs. The session will outline a proposal for a collaborative ecosystem effort to create a common framework to manage multiple NN accelerators while at the same time avoiding to modify deep learning frameworks with multiple forks.
Huawei’s requirements for the ARM based HPC solution readiness - Joshua MoraLinaro
Talk Title: Huawei’s requirements for the ARM based HPC solution readiness
Talk Abstract:
A high level review of a wide range of requirements to architect an ARM based competitive HPC solution is provided. The review combines both Industry and Huawei’s unique views with the intend to communicate openly not only the alignment and support in ongoing efforts carried over by other ARM key players but to brief on the areas of differentiation that Huawei is investing towards the research, development and deployment of homegrown ARM based HPC solution(s).
Speaker: Joshua Mora
Speaker Bio:
20 years of experience in research and development of both software and hardware for high performance computing. Currently leading the architecture definition and development of ARM based HPC solutions, both hardware and software, all the way to the applications (ie. turnkey HPC solutions for different compute intensive markets where ARM will succeed !!).
Bud17 113: distribution ci using qemu and open qaLinaro
“Delivering a well working distribution is hard. There are a lot of different hardware platforms that need to be verified and the software stack is in a big flux during development phases. In rolling releases, this gets even worse, as nothing ever stands still. The only sane answer to that problem are working Continuous Integration tests. The SUSE way to check whether any change breaks normal distribution behavior is OpenQA. Using OpenQA we can automatically run tests that hard working QA people did manually in the old days. That way we have fast enough turnaround times to find and reject breaking changes This session shows how OpenQA works, what pitfalls we had to make ARM work with OpenQA and what we’re doing to improve it for ARM specific use cases.”
OpenHPC Automation with Ansible - Renato Golin - Linaro Arm HPC Workshop 2018Linaro
Speaker: Renato Golin
Speaker Bio:
He started programming in the late 80's in C for PCs after a few years playing with 8-bit computers, but he only started programming professionally in the late 90's during the .com bubble. After many years working on Internet's back-end, he moved to UK and worked a few years on bioinformatics at EBI before joining ARM, where he worked on the DS-5 debugger and on the EDG-to-LLVM bridge, where he became the LLVM Tech Lead. Recently, he worked with large clusters and big data at HPCC before moving to Linaro.
Talk Title: OpenHPC Automation with Ansible
Talk Abstract: "In order to test OpenHPC packages and components and to use it as a
platform to benchmark HPC applications, Linaro is developing an automated deployment strategy, using Ansible, Mr-Provisioner and Jenkins, to install the
OS, OpenHPC and prepare the environment on varied architectures (Arm, x86). This work is meant to replace the existing ageing Bash-based recipes upstream while still keeping the documents intact. Our aim is to make it easier to vary hardware configuration, allow for different provisioning techniques and mix internal infrastructure logic to different labs, while still using the same recipes. We hope this will help more people use OpenHPC with a better out-of-the-box experience and with more robust results"
HPC network stack on ARM - Linaro HPC Workshop 2018Linaro
Speaker: Pavel Shamis
Company: Arm
Speaker Bio:
"Pavel is a Principal Research Engineer at ARM with over 16 years of experience in development HPC solutions. His work is focused on co-design software and hardware building blocks for high-performance interconnect technologies, development communication middleware and novel programming models. Prior to joining ARM, he spent five years at Oak Ridge National Laboratory (ORNL) as a research scientist at Computer Science and Math Division (CSMD). In this role, Pavel was responsible for research and development multiple projects in high-performance communication domain including: Collective Communication Offload (CORE-Direct & Cheetah), OpenSHMEM, and OpenUCX. Before joining ORNL, Pavel spent ten years at Mellanox Technologies, where he led Mellanox HPC team and was one of the key driver in enablement Mellanox HPC software stack, including OFA software stack, OpenMPI, MVAPICH, OpenSHMEM, and other.
Pavel is a recipient of prestigious R&D100 award for his contribution in development of the CORE-Direct collective offload technology and he published in excess of 20 research papers.
"
Talk Title: HPC network stack on ARM
Talk Abstract:
Applications, programming languages, and libraries that leverage sophisticated network hardware capabilities have a natural advantage when used in today¹s and tomorrow's high-performance and data center computer environments. Modern RDMA based network interconnects provides incredibly rich functionality (RDMA, Atomics, OS-bypass, etc.) that enable low-latency and high-bandwidth communication services. The functionality is supported by a variety of interconnect technologies such as InfiniBand, RoCE, iWARP, Intel OPA, Cray¹s Aries/Gemini, and others. Over the last decade, the HPC community has developed variety user/kernel level protocols and libraries that enable a variety of high-performance applications over RDMA interconnects including MPI, SHMEM, UPC, etc. With the emerging availability HPC solutions based on ARM CPU architecture it is important to understand how ARM integrates with the RDMA hardware and HPC network software stack. In this talk, we will overview ARM architecture and system software stack, including MPI runtimes, OpenSHMEM, and OpenUCX.
It just keeps getting better - SUSE enablement for Arm - Linaro HPC Workshop ...Linaro
Speaker: Jay Kruemcke
Speaker Company: SUSE
Bio:
"Jay is responsible for the SUSE Linux server products for High Performance Computing, 64-bit ARM systems, and SUSE Linux for IBM Power servers.
Jay has built an extensive career in product management including using social media for client collaboration, product positioning, driving future product directions, and evangelizing the capabilities and future directions for dozens of enterprise products.
"
Talk Title: It just keeps getting better - SUSE enablement for Arm
Talk Abstract:
SUSE has been delivering commercial Linux support for Arm based servers since 2016. Initially the focus was on high end servers for HPC and Ceph based software defined storage. But we have enabled a number of other Arm SoCs and are even supporting the Raspberry Pi. This session will cover the SUSE products that are available for the Arm platform and view to the future.
Intelligent Interconnect Architecture to Enable Next Generation HPC - Linaro ...Linaro
Speakers: Gilad Shainer and Scot Schultz
Company: Mellanox Technologies
Talk Title: Intelligent Interconnect Architecture to Enable Next
Generation HPC
Talk Abstract:
The latest revolution in HPC interconnect architecture is the development of In-Network Computing, a technology that enables handling and accelerating application workloads at the network level. By placing data-related algorithms on an intelligent network, we can overcome the new performance bottlenecks and improve the data center and applications performance. The combination of In-Network Computing and ARM based processors offer a rich set of capabilities and opportunities to build the next generation of HPC platforms.
Gilad Shainer Bio:
Gilad Shainer has served as Mellanox's vice president of marketing since March 2013. Previously, Mr. Shainer was Mellanox's vice president of marketing development from March 2012 to March 2013. Mr. Shainer joined Mellanox in 2001 as a design engineer and later served in senior marketing management roles between July 2005 and February 2012. Mr. Shainer holds several patents in the field of high-speed networking and contributed to the PCI-SIG PCI-X and PCIe specifications. Gilad Shainer holds a MSc degree (2001, Cum Laude) and a BSc degree (1998, Cum Laude) in Electrical Engineering from the Technion Institute of Technology in Israel.
Scot Schultz Bio:
Scot Schultz is a HPC technology specialist with broad knowledge in operating systems, high speed interconnects and processor technologies. Joining the Mellanox team in 2013, Schultz is 30-year veteran of the computing industry. Prior to joining Mellanox, he spent the past 17 years at AMD in various engineering and leadership roles in the area of high performance computing. Scot has also been instrumental with the growth and development of various industry organizations including the Open Fabrics Alliance, and continues to serve as a founding board-member of the OpenPOWER Foundation and Director of Educational Outreach and founding member of the HPC-AI Advisory Council.
Yutaka Ishikawa - Post-K and Arm HPC Ecosystem - Linaro Arm HPC Workshop Sant...Linaro
Yutaka Ishikawa - Post-K and Arm HPC Ecosystem - Linaro Arm HPC Workshop Santa Clara 2018
Bio: "Yutaka Ishikawa is the project leader of developing the post K
supercomputer. From 1987 to 2001, he was a member of AIST (former
Electrotechnical Laboratory), METI. From 1993 to 2001, he was the
chief of Parallel and Distributed System Software Laboratory at Real
World Computing Partnership. He led development of cluster system
software called SCore, which was used in several large PC cluster
systems around 2004. From 2002 to 2014, he was a professor at the
University Tokyo. He led a project to design a commodity-based
supercomputer called T2K open supercomputer. As a result, three
universities, Tsukuba, Tokyo, and Kyoto, obtained each supercomputer
based on the specification in 2008. He was also involved with the
design of the Oakleaf-PACS, the successor of T2K supercomputer in both
Tsukuba and Tokyo, whose peak performance is 25PF."
Session Title: Post-K and Arm HPC Ecosystem
Session Description:
"Post-K, a flagship supercomputer in Japan, is being developed by Riken
and Fujitsu. It will be the first supercomputer with Armv8-A+SVE.
This talk will give an overview of Post-K and how RIKEN and Fujitsu
are currently working on software stack for an Arm architecture."
Andrew J Younge - Vanguard Astra - Petascale Arm Platform for U.S. DOE/ASC Su...Linaro
Event: Arm Architecture HPC Workshop by Linaro and HiSilicon
Location: Santa Clara, CA
Speaker: Andrew J Younge
Talk Title: Vanguard Astra - Petascale Arm Platform for U.S. DOE/ASC Supercomputing
Talk Desc: The Vanguard program looks to expand the potential technology choices for leadership-class High Performance Computing (HPC) platforms, not only for the National Nuclear Security Administration (NNSA) but for the Department of Energy (DOE) and wider HPC community. Specifically, there is a need to expand the supercomputing ecosystem by investing and developing emerging, yet-to-be-proven technologies and address both hardware and software challenges together, as well as to prove-out the viability of such novel platforms for production HPC workloads.
The first deployment of the Vanguard program will be Astra, a prototype Petascale Arm supercomputer to be sited at Sandia National Laboratories during 2018. This talk will focus on the arthictecural details of Astra and the significant investments being made towards the maturing the Arm software ecosystem. Furthermore, we will share initial performance results based on our pre-general availability testbed system and outline several planned research activities for the machine.
Bio: Andrew Younge is a R&D Computer Scientist at Sandia National Laboratories with the Scalable System Software group. His research interests include Cloud Computing, Virtualization, Distributed Systems, and energy efficient computing. Andrew has a Ph.D in Computer Science from Indiana University, where he was the Persistent Systems fellow and a member of the FutureGrid project, an NSF-funded experimental cyberinfrastructure test-bed. Over the years, Andrew has held visiting positions at the MITRE Corporation, the University of Southern California / Information Sciences Institute, and the University of Maryland, College Park. He received his Bachelors and Masters of Science from the Computer Science Department at Rochester Institute of Technology (RIT) in 2008 and 2010, respectively.
HKG18-501 - EAS on Common Kernel 4.14 and getting (much) closer to mainlineLinaro
Session ID: HKG18-501
Session Name: HKG18-501 - EAS on Common Kernel 4.14 and getting (much) closer to mainline
Speaker: Chris Redpath
Track: Mobile, Kernel
★ Session Summary ★
This session will introduce the changes to EAS planned for 4.14 kernel, and how Arm hopes that EAS will develop in future. EAS has already evolved from an Arm/Linaro joint project to involving a much wider community of SoC vendors, Google and interested device manufacturers. We will highlight the product-specific pieces remaining in the Android Common Kernel EAS implementation, and our plans to provide an upstreaming plan for each product feature. In particular, the new 'simplified energy model' is designed to provide mainline-friendliness and comparable performance using a simple DT expression of cpu power/performance.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-501/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-501.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-501.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: Mobile, Kernel
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961
HKG18-501 - EAS on Common Kernel 4.14 and getting (much) closer to mainlineLinaro
"Session ID: HKG18-501
Session Name: HKG18-501 - EAS on Common Kernel 4.14 and getting (much) closer to mainline
Speaker: Chris Redpath
Track: Mobile, Kernel
★ Session Summary ★
This session will introduce the changes to EAS planned for 4.14 kernel, and how Arm hopes that EAS will develop in future. EAS has already evolved from an Arm/Linaro joint project to involving a much wider community of SoC vendors, Google and interested device manufacturers. We will highlight the product-specific pieces remaining in the Android Common Kernel EAS implementation, and our plans to provide an upstreaming plan for each product feature. In particular, the new 'simplified energy model' is designed to provide mainline-friendliness and comparable performance using a simple DT expression of cpu power/performance.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-501/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-501.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-501.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: Mobile, Kernel
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961"
HKG18-315 - Why the ecosystem is a wonderful thing, warts and allLinaro
"Session ID: HKG18-315
Session Name: HKG18-315 - Why the ecosystem is a wonderful thing warts and all
Speaker: Andrew Wafaa
Track: Ecosystem Day
★ Session Summary ★
The Arm ecosystem is a vibrant place, but it's not always smooth sailing. This presentation will go through the highs and lows of getting the ecosystem fully Arm enabled.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-315/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-315.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-315.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: Ecosystem Day
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961"
HKG18- 115 - Partitioning ARM Systems with the Jailhouse HypervisorLinaro
"Session ID: HKG18-115
Session Name: HKG18-115 - Partitioning ARM Systems with the Jailhouse Hypervisor
Speaker: Jan Kiszka
Track: Security
★ Session Summary ★
The open source hypervisor Jailhouse provides hard partitioning of multicore systems to co-locate multiple Linux or RTOS instances side by side. It aims at low complexity and minimal footprint to achieve deterministic behavior and enable certifications according to safety or security standards. In this session, we would like to look at the ARM-specific status of Jailhouse and discuss applications, to-dos and possible collaborations around it with the ARM community. The session is intended to be half presentation, half Q&A / discussion.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-115/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-115.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-115.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: Security
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961"
"Session ID: HKG18-TR08
Session Name: HKG18-TR08 - Upstreaming SVE in QEMU
Speaker: Alex Bennée,Richard Henderson
Track: Enterprise
★ Session Summary ★
ARM's Scalable Vector Extensions is an innovative solution to processing highly data parallel workloads. While several out-of-tree attempts at implementing SVE support for QEMU existed, we took a fundamentally different approach to solving key challenges and therefore pursued a from-scratch QEMU SVE implementation in Linaro. Our strategic choice was driven by several factors. First as an ""upstream first"" organisation we were focused on a solution that would be readily accepted by the upstream project. This entailed doing our development in the open on the project mailing lists where early feedback and community consensus can be reached.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-tr08/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-tr08.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-tr08.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: Enterprise
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961"
HKG18-113- Secure Data Path work with i.MX8MLinaro
"Session ID: HKG18-113
Session Name: HKG18-113 - Secure Data Path work with i.MX8M
Speaker: Cyrille Fleury
Track: Digital Home
★ Session Summary ★
NXP presentation on Secure Data Path work with i.MX8M Soc. Demonstrate 4K PlayReady playback with Android 8.1 running on i.MX8M. Focus on security (MS SL3000 and Widevine level 1)
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-113/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-113.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-113.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: Digital Home
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961"
HKG18-120 - Devicetree Schema Documentation and Validation Linaro
"Session ID: HKG18-120
Session Name: HKG18-120 - Structured Documentation and Validation for Device Tree
Speaker: Grant Likely
Track: Kernel
★ Session Summary ★
Devicetree has become the dominant hardware configuration language used when building embedded systems. Projects using Devicetree now include Linux, U-Boot, Android, FreeBSD, and Zephyr. However, it is notoriously difficult to write correct Devicetree data files. The dtc tools perform limited tests for valid data, and there there is not yet a way to add validity test for specific hardware descriptions. Neither is there a good way to document requirements for specific bindings. Work is underway to solve these problems. This session will present a proposal for adding Devicetree schema files to the Devicetree toolchain that can be used to both validate data and produce usable documentation.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-120/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-120.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-120.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: Kernel
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961"
"Session ID: HKG18-223
Session Name: HKG18-223 - Trusted Firmware M : Trusted Boot
Speaker: Tamas Ban
Track: LITE
★ Session Summary ★
An overview of the trusted boot concept and firmware update on the ARMv8-M based platform and how MCUBoot acts as a BL2 bootloader for TF-M.
Trusted Firmware M
In October 2017, Arm announced the vision of Platform Security Architecture (PSA) - a common framework to allow everyone in the IoT ecosystem to move forward with stronger, scalable security and greater confidence. There are three key stages to the Platform Security Architecture: Analysis, Architecture and Implementation which are described at https://developer.arm.com/products/architecture/platform-security-architecture.
_Trusted Firmware M, i.e. TF-M, is the Arm project to provide an open source reference implementation firmware that will conform to the PSA specification for M-Class devices. Early access to TF-M was released in December 2017 and it is being made public during Linaro Connect. The implementation should be considered a prototype until the PSA specifications reach release state and the code aligns._
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-223/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-223.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-223.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: LITE
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961"
Transcript: Selling digital books in 2024: Insights from industry leaders - T...BookNet Canada
The publishing industry has been selling digital audiobooks and ebooks for over a decade and has found its groove. What’s changed? What has stayed the same? Where do we go from here? Join a group of leading sales peers from across the industry for a conversation about the lessons learned since the popularization of digital books, best practices, digital book supply chain management, and more.
Link to video recording: https://bnctechforum.ca/sessions/selling-digital-books-in-2024-insights-from-industry-leaders/
Presented by BookNet Canada on May 28, 2024, with support from the Department of Canadian Heritage.
Epistemic Interaction - tuning interfaces to provide information for AI supportAlan Dix
Paper presented at SYNERGY workshop at AVI 2024, Genoa, Italy. 3rd June 2024
https://alandix.com/academic/papers/synergy2024-epistemic/
As machine learning integrates deeper into human-computer interactions, the concept of epistemic interaction emerges, aiming to refine these interactions to enhance system adaptability. This approach encourages minor, intentional adjustments in user behaviour to enrich the data available for system learning. This paper introduces epistemic interaction within the context of human-system communication, illustrating how deliberate interaction design can improve system understanding and adaptation. Through concrete examples, we demonstrate the potential of epistemic interaction to significantly advance human-computer interaction by leveraging intuitive human communication strategies to inform system design and functionality, offering a novel pathway for enriching user-system engagements.
Neuro-symbolic is not enough, we need neuro-*semantic*Frank van Harmelen
Neuro-symbolic (NeSy) AI is on the rise. However, simply machine learning on just any symbolic structure is not sufficient to really harvest the gains of NeSy. These will only be gained when the symbolic structures have an actual semantics. I give an operational definition of semantics as “predictable inference”.
All of this illustrated with link prediction over knowledge graphs, but the argument is general.
GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using Deplo...James Anderson
Effective Application Security in Software Delivery lifecycle using Deployment Firewall and DBOM
The modern software delivery process (or the CI/CD process) includes many tools, distributed teams, open-source code, and cloud platforms. Constant focus on speed to release software to market, along with the traditional slow and manual security checks has caused gaps in continuous security as an important piece in the software supply chain. Today organizations feel more susceptible to external and internal cyber threats due to the vast attack surface in their applications supply chain and the lack of end-to-end governance and risk management.
The software team must secure its software delivery process to avoid vulnerability and security breaches. This needs to be achieved with existing tool chains and without extensive rework of the delivery processes. This talk will present strategies and techniques for providing visibility into the true risk of the existing vulnerabilities, preventing the introduction of security issues in the software, resolving vulnerabilities in production environments quickly, and capturing the deployment bill of materials (DBOM).
Speakers:
Bob Boule
Robert Boule is a technology enthusiast with PASSION for technology and making things work along with a knack for helping others understand how things work. He comes with around 20 years of solution engineering experience in application security, software continuous delivery, and SaaS platforms. He is known for his dynamic presentations in CI/CD and application security integrated in software delivery lifecycle.
Gopinath Rebala
Gopinath Rebala is the CTO of OpsMx, where he has overall responsibility for the machine learning and data processing architectures for Secure Software Delivery. Gopi also has a strong connection with our customers, leading design and architecture for strategic implementations. Gopi is a frequent speaker and well-known leader in continuous delivery and integrating security into software delivery.
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...Ramesh Iyer
In today's fast-changing business world, Companies that adapt and embrace new ideas often need help to keep up with the competition. However, fostering a culture of innovation takes much work. It takes vision, leadership and willingness to take risks in the right proportion. Sachin Dev Duggal, co-founder of Builder.ai, has perfected the art of this balance, creating a company culture where creativity and growth are nurtured at each stage.
Key Trends Shaping the Future of Infrastructure.pdfCheryl Hung
Keynote at DIGIT West Expo, Glasgow on 29 May 2024.
Cheryl Hung, ochery.com
Sr Director, Infrastructure Ecosystem, Arm.
The key trends across hardware, cloud and open-source; exploring how these areas are likely to mature and develop over the short and long-term, and then considering how organisations can position themselves to adapt and thrive.
GraphRAG is All You need? LLM & Knowledge GraphGuy Korland
Guy Korland, CEO and Co-founder of FalkorDB, will review two articles on the integration of language models with knowledge graphs.
1. Unifying Large Language Models and Knowledge Graphs: A Roadmap.
https://arxiv.org/abs/2306.08302
2. Microsoft Research's GraphRAG paper and a review paper on various uses of knowledge graphs:
https://www.microsoft.com/en-us/research/blog/graphrag-unlocking-llm-discovery-on-narrative-private-data/
Smart TV Buyer Insights Survey 2024 by 91mobiles.pdf91mobiles
91mobiles recently conducted a Smart TV Buyer Insights Survey in which we asked over 3,000 respondents about the TV they own, aspects they look at on a new TV, and their TV buying preferences.
LF Energy Webinar: Electrical Grid Modelling and Simulation Through PowSyBl -...DanBrown980551
Do you want to learn how to model and simulate an electrical network from scratch in under an hour?
Then welcome to this PowSyBl workshop, hosted by Rte, the French Transmission System Operator (TSO)!
During the webinar, you will discover the PowSyBl ecosystem as well as handle and study an electrical network through an interactive Python notebook.
PowSyBl is an open source project hosted by LF Energy, which offers a comprehensive set of features for electrical grid modelling and simulation. Among other advanced features, PowSyBl provides:
- A fully editable and extendable library for grid component modelling;
- Visualization tools to display your network;
- Grid simulation tools, such as power flows, security analyses (with or without remedial actions) and sensitivity analyses;
The framework is mostly written in Java, with a Python binding so that Python developers can access PowSyBl functionalities as well.
What you will learn during the webinar:
- For beginners: discover PowSyBl's functionalities through a quick general presentation and the notebook, without needing any expert coding skills;
- For advanced developers: master the skills to efficiently apply PowSyBl functionalities to your real-world scenarios.
DevOps and Testing slides at DASA ConnectKari Kakkonen
My and Rik Marselis slides at 30.5.2024 DASA Connect conference. We discuss about what is testing, then what is agile testing and finally what is Testing in DevOps. Finally we had lovely workshop with the participants trying to find out different ways to think about quality and testing in different parts of the DevOps infinity loop.
The Art of the Pitch: WordPress Relationships and SalesLaura Byrne
Clients don’t know what they don’t know. What web solutions are right for them? How does WordPress come into the picture? How do you make sure you understand scope and timeline? What do you do if sometime changes?
All these questions and more will be explored as we talk about matching clients’ needs with what your agency offers without pulling teeth or pulling your hair out. Practical tips, and strategies for successful relationship building that leads to closing the deal.
UiPath Test Automation using UiPath Test Suite series, part 3DianaGray10
Welcome to UiPath Test Automation using UiPath Test Suite series part 3. In this session, we will cover desktop automation along with UI automation.
Topics covered:
UI automation Introduction,
UI automation Sample
Desktop automation flow
Pradeep Chinnala, Senior Consultant Automation Developer @WonderBotz and UiPath MVP
Deepak Rai, Automation Practice Lead, Boundaryless Group and UiPath MVP
State of ICS and IoT Cyber Threat Landscape Report 2024 previewPrayukth K V
The IoT and OT threat landscape report has been prepared by the Threat Research Team at Sectrio using data from Sectrio, cyber threat intelligence farming facilities spread across over 85 cities around the world. In addition, Sectrio also runs AI-based advanced threat and payload engagement facilities that serve as sinks to attract and engage sophisticated threat actors, and newer malware including new variants and latent threats that are at an earlier stage of development.
The latest edition of the OT/ICS and IoT security Threat Landscape Report 2024 also covers:
State of global ICS asset and network exposure
Sectoral targets and attacks as well as the cost of ransom
Global APT activity, AI usage, actor and tactic profiles, and implications
Rise in volumes of AI-powered cyberattacks
Major cyber events in 2024
Malware and malicious payload trends
Cyberattack types and targets
Vulnerability exploit attempts on CVEs
Attacks on counties – USA
Expansion of bot farms – how, where, and why
In-depth analysis of the cyber threat landscape across North America, South America, Europe, APAC, and the Middle East
Why are attacks on smart factories rising?
Cyber risk predictions
Axis of attacks – Europe
Systemic attacks in the Middle East
Download the full report from here:
https://sectrio.com/resources/ot-threat-landscape-reports/sectrio-releases-ot-ics-and-iot-security-threat-landscape-report-2024/
State of ICS and IoT Cyber Threat Landscape Report 2024 preview
BKK16-317 How to generate power models for EAS and IPA
1. Presented by
Date
Event
How to generate power models for
EAS and IPA
… without talking to a hardware engineerLeo Yan
Daniel Thompson
BKK16-317 March 9, 2016
Linaro Connect BKK16
3. Background
● Generating platform-specific parameters for power models are a
prerequisite for deploying EAS and IPA
○ Software engineers need these parameters to work on these features
○ Gaining assistance from hardware engineers is difficult and, for
engineers who don’t work for SoC vendors, impossible
○ It is possible to generate an acceptable (though perhaps not optimal)
model using simple tools
● Today we will focus on CPU and cluster level power modeling
○ Excludes SoC level power modeling (GPU, DDR, ...)
4. The role of power modeling
Power
Modeling
EAS/IPA Profiling
Generate power
modeling
1
Enable EAS/IPA
2
Enable profiling
environment
3
Check if use bad
power modeling
4
Refine algorithm
5
Refine power
modeling
6
6. CPU power states
CPU State PD_CPUx
CPU P-State On
WFI On, internal clock gating
CPU Off Off
7. CPU P-State
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0
ARM CPU0
SCU
Cluster 0
CLKIN
PDCPU0
Powered Off
Powered On
Clock Gating
8. CPU WFI State
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0
ARM CPU0: WFI
SCU
Cluster 0
CLKIN
PDCPU0
Powered Off
Powered On
Clock Gating
9. CPU Off State
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0
ARM CPU0
SCU
Cluster 0
CLKIN
PDCPU0
Powered Off
Powered On
Clock Gating
X
X
10. Cluster power states
Cluster State PD_CPUx PDCORTEXA53 PD_L2
Cluster P-State On or Off On On
Cluster L2
Retention
Off Off Retention
Cluster Off Off Off Off
Cannot keep
cache coherent
between two
clusters
11. Cluster P-State
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0
ARM CPU0
SCU
Cluster 0
CLKIN
PDCPU<n>
Powered Off
Powered On
Clock Gating
PDCORTEXTA53
PDL2
X
X
12. Cluster L2 Retention State
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0
ARM CPU0
SCU
Cluster 0
CLKIN
PDCPU<n>
Powered Off
Powered On
Clock Gating
PDCORTEXTA53
PDL2
X
X
X
13. Cluster Off State
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0
ARM CPU0
SCU
Cluster 0
CLKIN
PDCPU<n>
Powered Off
Powered On
Clock Gating
PDCORTEXTA53
PDL2
X
X
X
X
14. Link power states in Linux Kernel
Power State Linux Kernel
CPU P-state P-state
WFI C-state
CPU Off C-state
Cluster P-state P-state
Cluster L2 Retention C-state
Cluster Off C-state
CPUFreq does not distinguish
“CPU P-state” and “Cluster P-
state” status as usually
binding CPU and Cluster
frequency from hardware
design.
But EAS needs to model
these two states separately.
16. Hikey PMIC Hierarchy
SoC:
Hi6220
DC IN TO
4.2VDC,
4A
PMIC:
Hi6553
12V VDD_4V2
LX0
LX1
BUCK1_1V05
Ideal measure point,
but hardware design
does not encourage
measurement here
Select CPU’s nearest
measurement point
BUCKs & LDOs
ACPU
R247R7
17. Connect with ARM energy probe
DC IN
TO 4.2
VDC, 4A
PMIC:
Hi6553
VDD_4V2
0.033Ω
ARM energy probe
Hikey Board
PC: Linux
V+ V-Ground USB
18. Methodology For Power Measurement
● Use single CPU to measure power
○ All other CPUs will be hot unplugged (CPU off state)
○ CPU0 is left connected
● Use ARM Trusted Firmware to perform system suspend
○ Force cluster and CPU0 to enter specific C-states and P-states
● Measure power data based on different operating points
○ Each OPP implies specific pair of voltage and frequency
○ Measure all C-states and P-states at given OPP
○ Use “dhrystone” to generate 100% CPU utilization for CPU P-state
19. hikey_afflvl_off
Linux kernel
ARM CPUARM CPU0ARM CPU0ARM CPU0
Setup power state
ARM CPUARM CPU0ARM CPU1
CPU1..7
echo 0 > /sys/devices/system/cpu/cpu[1..7]/online
psci_cpu_off
ARM TF
ARM CPUARM
CPU0
ARM
CPU0
ARM CPU4
echo mem > /sys/power/state
ARM CPU0 psci_system_suspend_enter
Cluster 1
ARM CPUARM
CPU0
ARM
CPU0
Cluster 0
ARM CPU0
SoC
ARM CPUARM
CPU0
ARM
CPU0
ARM
CPU4
Cluster 1
ARM CPUARM
CPU0
ARM
CPU0
Cluster 0
ARM
CPU0
SoC
ARM CPUARM
CPU0
ARM
CPU0
ARM
CPU4
Cluster 1
ARM CPUARM
CPU0
ARM
CPU0
Cluster 0
ARM
CPU0
SoC
Hack low level code to only
power off CPU but leave
cluster on
1
2
ARM CPUARM
CPU0
ARM
CPU0
ARM
CPU4
Cluster 1
ARM CPUARM
CPU0
ARM
CPU0
Cluster 0
ARM
CPU0
SoC
hisi_ipc_cpu_suspend
hisi_ipc_psci_system_off
hisi_ipc_cluster_suspendhikey_affinst_suspend
20. Cluster and CPU’s Power Data
OPP (MHz) Voltage (v) Cluster Power
Off State
(mW)
Cluster P-State
(mW)
CPU WFI
State
(mW)
CPU P-State
(mW)
208 1.04 344 360 379 429
432 1.04 345 374 387 498
729 1.09 346 393 408 617
960 1.18 352 427 443 794
1200 1.33 367 479 508 1149
Difference is caused by other
components in SoC that share
the same regulator
“Cluster P-state” means all CPUs in
cluster have been powered off but
cluster is powered on
22. EAS energy model
CPU0
CPU1
Cluster
Time
C-state
P-state
● Formula: energy = energy_cluster + ∑ energy_CPU in cluster
● C-states: Idle energy, include cpu level and cluster level
● P-states: Busy energy, include cpu level and cluster level
23. Normalized CPU capacity
● Normalized CPU capacity is a ratio value
○ Ratio between actual performance of CPU and the maximum
performance of CPU in the system
○ Normalized into range [0..1024]
● Normally use “dhrystone” to measure CPU capacity
○ Safe to derive from CPU frequency if all CPUs are homogeneous
static struct capacity_state cap_states_core_a53[] =
{
/* Power per cpu */
{ .cap = 178, .power = 69, }, /* 208MHz */
{ .cap = 369, .power = 124, }, /* 432MHz */
{ .cap = 622, .power = 224, }, /* 729MHz */
{ .cap = 819, .power = 367, }, /* 960MHz */
{ .cap = 1024, .power = 670, }, /* 1.2GHz */
};
24. Basic method to calculate for power data
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0ARM CPU0
OPP: 729 MHz
SCU
Cluster 0
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0ARM CPU0
SCU
Cluster 0
ARM CPU0
OPP: 729 MHz
Remove cluster level
power consumption
CPU level power
consumption
25. Power of CPU C-State
OPP
(MHz)
Cluster Power
On State
(mW)
CPU WFI
(mW)
Power of CPU
WFI (mW)
208 360 379 19
432 374 387 13
729 393 408 15
960 427 443 16
1200 479 508 31
static struct idle_state idle_states_core_a53[] =
{
{ .power = 15 }, /* active idle state */
{ .power = 15 }, /* WFI state */
{ .power = 0 }, /* CPU Off state */
{ .power = 0 }, /* Cluster Off state */
};
Select 15mW as middle value for WFI
state’s power data
26. Power of CPU P-State
OPP
(MHz)
Cluster P-State
(mW)
CPU P-State
(mW)
Power of
CPU P-state
(mW)
208 360 429 69
432 374 498 124
729 393 617 224
960 427 794 367
1200 479 1149 670
static struct capacity_state cap_states_core_a53[] =
{
/* Power per cpu */
{ .cap = 178, .power = 69, }, /* 208MHz */
{ .cap = 369, .power = 124, }, /* 432MHz */
{ .cap = 622, .power = 224, }, /* 729MHz */
{ .cap = 819, .power = 367, }, /* 960MHz */
{ .cap = 1024, .power = 670, }, /* 1.2GHz */
};
CPU P-state is calculated with static
leakage and dynamic power, so should
use Power (CPU P-state) - Power (Cluster
P-state)
27. Cluster’s active idle state
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0ARM CPU: Off
SCU
Cluster 0
Powered Off
Powered On
Clock Gating
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0ARM CPU: WFI
SCU
Cluster 0
ARM CPUARM CPU0
ACP
ACE
L2 RAM
ARM CPU0ARM CPU: WFI
or Off
SCU
Cluster 0
At CPU level, all CPUs in the cluster are in one of the idle
states (WFI or Off state) and the cluster is not processing
any software.
At cluster level, the cluster remains active.
Is Active idle state a
C-state or a P-state?
The main difference
is if we need consider
it with different OPP...
28. Power of Cluster C-State
OPP
(MHz)
Cluster Power
Off State
(mW)
Cluster
Power On
State
(mW)
Power of cluster
level active idle
state (mW)
208 344 360 16
432 345 374 29
729 346 393 47
960 352 427 75
1200 367 479 112
static struct idle_state idle_states_cluster_a53[] =
{
{ .power = 47 }, /* active idle state */
{ .power = 47 }, /* WFI state */
{ .power = 47 }, /* CPU Off state */
{ .power = 0 }, /* Cluster Off state */
};
Only in cluster power off state will we
totally power off whole cluster, in other
idle states the cluster actually is powered
on even when all CPUs are powered off.
29. Power of Cluster P-State
OPP
(MHz)
Cluster Power
Off State
(mW)
Cluster
Power On
State
(mW)
Power of cluster
level active idle
state (mW)
208 344 360 16
432 345 374 29
729 346 393 47
960 352 427 75
1200 367 479 112
static struct capacity_state cap_states_cluster_a53[] =
{
/* Power per cluster */
{ .cap = 178, .power = 16, },
{ .cap = 369, .power = 29, },
{ .cap = 622, .power = 47, },
{ .cap = 819, .power = 75, },
{ .cap = 1024, .power = 112, },
};
30. static struct idle_state idle_states_cluster_a53[] =
{
{ .power = 47 }, /* active idle state */
{ .power = 47 }, /* WFI state */
{ .power = 47 }, /* CPU Off state */
{ .power = 0 }, /* Cluster Off state */
};
static struct capacity_state cap_states_cluster_a53[] =
{
/* Power per cluster */
{ .cap = 178, .power = 16, },
{ .cap = 369, .power = 29, },
{ .cap = 622, .power = 47, },
{ .cap = 819, .power = 75, },
{ .cap = 1024, .power = 112, },
};
static struct idle_state idle_states_core_a53[] =
{
{ .power = 15 }, /* active idle state */
{ .power = 15 }, /* WFI state */
{ .power = 0 }, /* CPU Off state */
{ .power = 0 }, /* Cluster Off state */
};
static struct capacity_state cap_states_core_a53[] =
{
/* Power per cpu */
{ .cap = 178, .power = 69, }, /* 208MHz */
{ .cap = 369, .power = 124, }, /* 432MHz */
{ .cap = 622, .power = 224, }, /* 729MHz */
{ .cap = 819, .power = 367, }, /* 960MHz */
{ .cap = 1024, .power = 670, }, /* 1.2GHz */
};
Cluster level CPU level
P-State
C-State
Active Idle State
EAS power modeling parameters
31. Overview for IPA power model
IPA
Thermal
sensor driver
CPU Cooling
Device
CPUFreq
Framework
Get dynamic power
3
Get static power
4
Updated allocated budget
5
Update CPUFreq policy
6
Report temperature,
reach trip points
1
Gather actor’s request budget
2
Power Model for
CPU actor
32. Power model based on dynamic power and
static leakage
Dynamic power
CPU static leakage
Cluster static leakage
SoC temperature impacts
static leakage
33. Power model as a linear equation
+power static_power= "capacitance" * (freq * volt^2)
Dynamic power
Y = m * X + b
Can easily calculate best-fit values for
m and b using the LINEST function
found in most spreadsheet programs.
34. OPP
(MHz)
Voltage
(v)
Cluster Power
Off State (mW)
Cluster P-state
(mW)
Cluster Power
(mW)
F * V^2
208 1.04 344 360 16 225
432 1.04 345 374 29 467
729 1.09 346 393 47 866
960 1.18 352 427 75 1337
1200 1.33 367 479 112 2123
Review cluster power
XY
35. Linear regression on the cluster power
Intercept gives static power (~5mW)
Gradient gives “capacitance” = 0.051
37. Linear regression on the CPU power
A negative intercept (static power) makes
no sense physically and strongly
suggests the line is nonlinear. In the graph
we see the highest two OPPs’ power
increase sharply
Intercept (static power) is negative value -27
Gradient (capacitance) = 0.317
38. Potential solutions to generate a model
● Three possible options
○ Can't have negative static power because get_static_power() cannot
return negative number, but we could force linear regression through zero if we
accept that there will be some flaws in the model.
○ Could correct for temperature. It is likely the highest two OPPs start to curve
upwards as die temperature rises and static leakage increases.
○ Could modify kernel to remove IPA model and use EAS figures directly. These
physical measurements already include a contribution from die temperature...
● We didn’t collect temperature data for Hikey and DT bindings for
EAS are not yet agreed so, for now, linear regression through zero
is the simplest choice.
39. Linear regression through zero on the CPU
power
Using linear regression through zero
gives worst case error of ~10%
Intercept (static power) is 0
Gradient (capacitance) = 0.298
40. IPA power coefficients
struct cluster_power_coefficients cluster_data = {
.dyn_coeff = 311,
};
(0.298 + (0.054 / 4 CPUs)) * 1000 = 311
A simplistic power modeling without taking account of static leakage:
1. Given the non-linearity for CPU power data then modeling static power is pointless
2. Updated value for cluster “capacitance” which is now forced through zero as well
3. Error in model can be tolerated in some use cases; dynamic power remains main
contributor to power consumption
4. PID controller’s integral term will partly compensate for temperature drift
41. Decide sustainable power based on OPP
Temperature increases very
quickly when 8CPUs@1.2GHz,
meaning the power consumption is
above max sustainable level.
Temperature increases slowly
when 8CPUs@960MHz,
system is only very slightly
above sustainable power. When CPU runs at 729MHz the
temperature doesn’t increase.
Its power consumption is less
than the sustainable power.
OPP
(MHz)
Sustainable
power
729 2155
960 3326
1200 5285
43. Conclusions
● IPA was very effective on HiKey even with a poor model
○ Increase of ~40% performance compared to step-wise governor
● Allow EAS model to be used for IPA
○ Allows direct link between observed values to power mode
○ Using EAS values directly is convenient for simple systems although it makes it
impossible to explicitly model die temperature effects
● Recommend to record temperature alongside power data
○ If possible enable temperature sensor for SoC before gathering power info
● Other suggestions
○ Use CFS’s CPU utilization for accurate duty cycle and calculate dynamic power
44. Thanks!
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