SlideShare a Scribd company logo
1 of 6
Download to read offline
EE4 Digital Electronics BILBO R. Scaife
I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 1 of 6
BILBO (Built-in Logic Block Observer) (Hobbit).
Adopting Conway-Mead partitioning approach, we re-design registers
so that they may (at different times) be a normal register, a shift reg.
(for scan path), a parallel signature analyser or an autonomous LFSR
(for test vector generation).
Can now apply Signature Analysis
methods to the combinational logic
block between 2 registers, using
SISO to get data in/out. Most of
hardware for testing is now designed
into the logic system.
Use standard Scan Path (such as
JTAG) to control and examine results
of built-in test.
BILBO A
BILBO B
COMBNL.
LOGIC
config. as t.p.g. (ALFSR)
config. as S.A.
SCAN IN
SCAN OUT
COMBNL.
LOGIC
EE4 Digital Electronics BILBO R. Scaife
I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 2 of 6
Full BILBO Register:
Z1
Q
/Q
D
Q
Z2
Q
/Q
D
Q
Z
Q
/Q
D
QN
ZN-1
Q
/Q
D
QN-1
/SO
0
1
SI
B1
B2
EE4 Digital Electronics BILBO R. Scaife
I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 3 of 6
Normal Register Operation (B1= B2 =1):
Acts as normal register.
Z1
Q
/Q
D
Q1
Z2
Q
/Q
D
Q2
ZNZN-1
Q
/Q
D
QN-1
Q
/Q
D
QN
EE4 Digital Electronics BILBO R. Scaife
I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 4 of 6
Shift Register (Scan) Mode (B1= B2 =0):
Used either to drive {Qi} to particular values or read {Qi}, via serial
scan-path.
Q
/Q
D
Q1
Q
/Q
D
QN-1
Q
/Q
D
Q2
Q
/Q
DSI SO
QN
EE4 Digital Electronics BILBO R. Scaife
I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 5 of 6
Autonomous LFSR (ALFSR) Mode (B1= 1, B2= 0):
Used to Generate Test Sequences.
Q
/Q
D
Q
/Q
D Q
/Q
D Q
/Q
D
QNQN-1Q1
Q2
EE4 Digital Electronics BILBO R. Scaife
I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 6 of 6
Multiple-Input Shift Register (MISR) mode (B1= 1, B2= 0):
Used in Signature Analyser mode to process output of combinational logic
block in response to signals generated by BILBO in ALFSR mode.
Z1 Z2
Q
ZN
/Q
D
Q1
Q
ZN-1
/Q
D
QN-1
Q
/Q
D
Q1
Q
/Q
D
Q2

More Related Content

What's hot

Controller area network (CAN bus) ppt
Controller area network (CAN bus) pptController area network (CAN bus) ppt
Controller area network (CAN bus) pptRaziuddin Khazi
 
Error detection and correction
Error detection and correctionError detection and correction
Error detection and correctionAbdul Razaq
 
Module 4 advanced microprocessors
Module 4 advanced microprocessorsModule 4 advanced microprocessors
Module 4 advanced microprocessorsDeepak John
 
Embedded Systems (18EC62) - ARM Cortex-M3 Instruction Set and Programming (Mo...
Embedded Systems (18EC62) - ARM Cortex-M3 Instruction Set and Programming (Mo...Embedded Systems (18EC62) - ARM Cortex-M3 Instruction Set and Programming (Mo...
Embedded Systems (18EC62) - ARM Cortex-M3 Instruction Set and Programming (Mo...Shrishail Bhat
 
Can network development using arm cortex m3
Can network development using arm cortex m3Can network development using arm cortex m3
Can network development using arm cortex m3Ankur Rastogi
 
Introduction to ARM LPC2148
Introduction to ARM LPC2148Introduction to ARM LPC2148
Introduction to ARM LPC2148Veera Kumar
 
Embedded os
Embedded osEmbedded os
Embedded oschian417
 
Amplitude shift keying (ask).pptx
Amplitude shift keying (ask).pptxAmplitude shift keying (ask).pptx
Amplitude shift keying (ask).pptxLamisaFaria
 
8086 modes
8086 modes8086 modes
8086 modesPDFSHARE
 
Lte rrc-connection-setup-messaging
Lte rrc-connection-setup-messagingLte rrc-connection-setup-messaging
Lte rrc-connection-setup-messagingPrashant Sengar
 
Interrupt in real time system
Interrupt in real time system Interrupt in real time system
Interrupt in real time system ali jawad
 
WSN network architecture -Sensor Network Scenarios & Transceiver Design Consi...
WSN network architecture -Sensor Network Scenarios & Transceiver Design Consi...WSN network architecture -Sensor Network Scenarios & Transceiver Design Consi...
WSN network architecture -Sensor Network Scenarios & Transceiver Design Consi...ArunChokkalingam
 
Pic microcontroller architecture
Pic microcontroller architecturePic microcontroller architecture
Pic microcontroller architectureDominicHendry
 

What's hot (20)

Controller area network (CAN bus) ppt
Controller area network (CAN bus) pptController area network (CAN bus) ppt
Controller area network (CAN bus) ppt
 
Switching systems lecture4
Switching  systems lecture4Switching  systems lecture4
Switching systems lecture4
 
Error detection and correction
Error detection and correctionError detection and correction
Error detection and correction
 
Module 4 advanced microprocessors
Module 4 advanced microprocessorsModule 4 advanced microprocessors
Module 4 advanced microprocessors
 
Rake Receiver
Rake ReceiverRake Receiver
Rake Receiver
 
Bus system
Bus systemBus system
Bus system
 
06. thumb instructions
06. thumb instructions06. thumb instructions
06. thumb instructions
 
Embedded Systems (18EC62) - ARM Cortex-M3 Instruction Set and Programming (Mo...
Embedded Systems (18EC62) - ARM Cortex-M3 Instruction Set and Programming (Mo...Embedded Systems (18EC62) - ARM Cortex-M3 Instruction Set and Programming (Mo...
Embedded Systems (18EC62) - ARM Cortex-M3 Instruction Set and Programming (Mo...
 
Can network development using arm cortex m3
Can network development using arm cortex m3Can network development using arm cortex m3
Can network development using arm cortex m3
 
Introduction to ARM LPC2148
Introduction to ARM LPC2148Introduction to ARM LPC2148
Introduction to ARM LPC2148
 
Embedded os
Embedded osEmbedded os
Embedded os
 
Communication protocols - Embedded Systems
Communication protocols - Embedded SystemsCommunication protocols - Embedded Systems
Communication protocols - Embedded Systems
 
Amplitude shift keying (ask).pptx
Amplitude shift keying (ask).pptxAmplitude shift keying (ask).pptx
Amplitude shift keying (ask).pptx
 
8086 modes
8086 modes8086 modes
8086 modes
 
Lte rrc-connection-setup-messaging
Lte rrc-connection-setup-messagingLte rrc-connection-setup-messaging
Lte rrc-connection-setup-messaging
 
8051 timer counter
8051 timer counter8051 timer counter
8051 timer counter
 
Interrupt in real time system
Interrupt in real time system Interrupt in real time system
Interrupt in real time system
 
WSN network architecture -Sensor Network Scenarios & Transceiver Design Consi...
WSN network architecture -Sensor Network Scenarios & Transceiver Design Consi...WSN network architecture -Sensor Network Scenarios & Transceiver Design Consi...
WSN network architecture -Sensor Network Scenarios & Transceiver Design Consi...
 
ARM Processors
ARM ProcessorsARM Processors
ARM Processors
 
Pic microcontroller architecture
Pic microcontroller architecturePic microcontroller architecture
Pic microcontroller architecture
 

Similar to Bilbo 1

Spartan-II FPGA (xc2s30)
Spartan-II FPGA (xc2s30)Spartan-II FPGA (xc2s30)
Spartan-II FPGA (xc2s30)A B Shinde
 
UNIT-II CPLD & FPGA Architectures and Applications
UNIT-II CPLD & FPGA  Architectures   and ApplicationsUNIT-II CPLD & FPGA  Architectures   and Applications
UNIT-II CPLD & FPGA Architectures and ApplicationsDr.YNM
 
Adding a BOLT pass
Adding a BOLT passAdding a BOLT pass
Adding a BOLT passAmir42407
 
Design of a Digital Baseband Processor for UWB Transceiver on RFID Tag
Design of a Digital Baseband Processor for UWB Transceiver on RFID TagDesign of a Digital Baseband Processor for UWB Transceiver on RFID Tag
Design of a Digital Baseband Processor for UWB Transceiver on RFID Tagtheijes
 
VLSI Experiments I
VLSI Experiments IVLSI Experiments I
VLSI Experiments IGouthaman V
 
LE1201-XJLink2
LE1201-XJLink2LE1201-XJLink2
LE1201-XJLink2Mark Chien
 
Lab ObjectivesThe objective for this lab is to review the Motoro.docx
Lab ObjectivesThe objective for this lab is to review the Motoro.docxLab ObjectivesThe objective for this lab is to review the Motoro.docx
Lab ObjectivesThe objective for this lab is to review the Motoro.docxjesseniasaddler
 
Lecture Slide (1).pptx
Lecture Slide (1).pptxLecture Slide (1).pptx
Lecture Slide (1).pptxBilalMumtaz9
 
Xilinx-LCD-bst-only
Xilinx-LCD-bst-onlyXilinx-LCD-bst-only
Xilinx-LCD-bst-onlyMark Chien
 
Seminar on field programmable gate array
Seminar on field programmable gate arraySeminar on field programmable gate array
Seminar on field programmable gate arraySaransh Choudhary
 
System Development for Verification of General Purpose Input Output
System Development for Verification of General Purpose Input OutputSystem Development for Verification of General Purpose Input Output
System Development for Verification of General Purpose Input OutputRSIS International
 
User guide wishbone serializer
User guide wishbone serializerUser guide wishbone serializer
User guide wishbone serializerdragonvnu
 
A Quick Introduction to Programmable Logic
A Quick Introduction to Programmable LogicA Quick Introduction to Programmable Logic
A Quick Introduction to Programmable LogicOmer Kilic
 
Implementation of CAN on FPGA for Security Evaluation Purpose
Implementation of CAN on FPGA for Security Evaluation PurposeImplementation of CAN on FPGA for Security Evaluation Purpose
Implementation of CAN on FPGA for Security Evaluation PurposeIRJET Journal
 
IRJET- UART Testing under Built-In-Self-Test(BIST) using Verilog on FPGA
IRJET-  	  UART Testing under Built-In-Self-Test(BIST) using Verilog on FPGAIRJET-  	  UART Testing under Built-In-Self-Test(BIST) using Verilog on FPGA
IRJET- UART Testing under Built-In-Self-Test(BIST) using Verilog on FPGAIRJET Journal
 

Similar to Bilbo 1 (20)

Spartan-II FPGA (xc2s30)
Spartan-II FPGA (xc2s30)Spartan-II FPGA (xc2s30)
Spartan-II FPGA (xc2s30)
 
UNIT-II CPLD & FPGA Architectures and Applications
UNIT-II CPLD & FPGA  Architectures   and ApplicationsUNIT-II CPLD & FPGA  Architectures   and Applications
UNIT-II CPLD & FPGA Architectures and Applications
 
Introducing ELK
Introducing ELKIntroducing ELK
Introducing ELK
 
Adding a BOLT pass
Adding a BOLT passAdding a BOLT pass
Adding a BOLT pass
 
scan_IEEE
scan_IEEEscan_IEEE
scan_IEEE
 
Fpga
FpgaFpga
Fpga
 
Design of a Digital Baseband Processor for UWB Transceiver on RFID Tag
Design of a Digital Baseband Processor for UWB Transceiver on RFID TagDesign of a Digital Baseband Processor for UWB Transceiver on RFID Tag
Design of a Digital Baseband Processor for UWB Transceiver on RFID Tag
 
VLSI Experiments I
VLSI Experiments IVLSI Experiments I
VLSI Experiments I
 
LE1201-XJLink2
LE1201-XJLink2LE1201-XJLink2
LE1201-XJLink2
 
FPGA
FPGAFPGA
FPGA
 
Lab ObjectivesThe objective for this lab is to review the Motoro.docx
Lab ObjectivesThe objective for this lab is to review the Motoro.docxLab ObjectivesThe objective for this lab is to review the Motoro.docx
Lab ObjectivesThe objective for this lab is to review the Motoro.docx
 
Lecture Slide (1).pptx
Lecture Slide (1).pptxLecture Slide (1).pptx
Lecture Slide (1).pptx
 
Xilinx-LCD-bst-only
Xilinx-LCD-bst-onlyXilinx-LCD-bst-only
Xilinx-LCD-bst-only
 
Seminar on field programmable gate array
Seminar on field programmable gate arraySeminar on field programmable gate array
Seminar on field programmable gate array
 
System Development for Verification of General Purpose Input Output
System Development for Verification of General Purpose Input OutputSystem Development for Verification of General Purpose Input Output
System Development for Verification of General Purpose Input Output
 
User guide wishbone serializer
User guide wishbone serializerUser guide wishbone serializer
User guide wishbone serializer
 
A Quick Introduction to Programmable Logic
A Quick Introduction to Programmable LogicA Quick Introduction to Programmable Logic
A Quick Introduction to Programmable Logic
 
Implementation of CAN on FPGA for Security Evaluation Purpose
Implementation of CAN on FPGA for Security Evaluation PurposeImplementation of CAN on FPGA for Security Evaluation Purpose
Implementation of CAN on FPGA for Security Evaluation Purpose
 
Smart logic
Smart logicSmart logic
Smart logic
 
IRJET- UART Testing under Built-In-Self-Test(BIST) using Verilog on FPGA
IRJET-  	  UART Testing under Built-In-Self-Test(BIST) using Verilog on FPGAIRJET-  	  UART Testing under Built-In-Self-Test(BIST) using Verilog on FPGA
IRJET- UART Testing under Built-In-Self-Test(BIST) using Verilog on FPGA
 

Recently uploaded

Internship report on mechanical engineering
Internship report on mechanical engineeringInternship report on mechanical engineering
Internship report on mechanical engineeringmalavadedarshan25
 
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130Suhani Kapoor
 
power system scada applications and uses
power system scada applications and usespower system scada applications and uses
power system scada applications and usesDevarapalliHaritha
 
Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.eptoze12
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile servicerehmti665
 
IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024Mark Billinghurst
 
Heart Disease Prediction using machine learning.pptx
Heart Disease Prediction using machine learning.pptxHeart Disease Prediction using machine learning.pptx
Heart Disease Prediction using machine learning.pptxPoojaBan
 
Biology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxBiology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxDeepakSakkari2
 
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130Suhani Kapoor
 
GDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentationGDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentationGDSCAESB
 
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfCCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfAsst.prof M.Gokilavani
 
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur EscortsHigh Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escortsranjana rawat
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacingjaychoudhary37
 
main PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidmain PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidNikhilNagaraju
 
College Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service NashikCollege Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service NashikCall Girls in Nagpur High Profile
 
Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024hassan khalil
 
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort serviceGurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort servicejennyeacort
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AIabhishek36461
 

Recently uploaded (20)

Internship report on mechanical engineering
Internship report on mechanical engineeringInternship report on mechanical engineering
Internship report on mechanical engineering
 
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
VIP Call Girls Service Kondapur Hyderabad Call +91-8250192130
 
power system scada applications and uses
power system scada applications and usespower system scada applications and uses
power system scada applications and uses
 
Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.Oxy acetylene welding presentation note.
Oxy acetylene welding presentation note.
 
Call Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile serviceCall Girls Delhi {Jodhpur} 9711199012 high profile service
Call Girls Delhi {Jodhpur} 9711199012 high profile service
 
IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024IVE Industry Focused Event - Defence Sector 2024
IVE Industry Focused Event - Defence Sector 2024
 
🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...
🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...
🔝9953056974🔝!!-YOUNG call girls in Rajendra Nagar Escort rvice Shot 2000 nigh...
 
Heart Disease Prediction using machine learning.pptx
Heart Disease Prediction using machine learning.pptxHeart Disease Prediction using machine learning.pptx
Heart Disease Prediction using machine learning.pptx
 
Biology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptxBiology for Computer Engineers Course Handout.pptx
Biology for Computer Engineers Course Handout.pptx
 
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
VIP Call Girls Service Hitech City Hyderabad Call +91-8250192130
 
GDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentationGDSC ASEB Gen AI study jams presentation
GDSC ASEB Gen AI study jams presentation
 
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfCCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
 
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur EscortsHigh Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
High Profile Call Girls Nagpur Isha Call 7001035870 Meet With Nagpur Escorts
 
microprocessor 8085 and its interfacing
microprocessor 8085  and its interfacingmicroprocessor 8085  and its interfacing
microprocessor 8085 and its interfacing
 
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptxExploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
 
main PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfidmain PPT.pptx of girls hostel security using rfid
main PPT.pptx of girls hostel security using rfid
 
College Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service NashikCollege Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
College Call Girls Nashik Nehal 7001305949 Independent Escort Service Nashik
 
Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024
 
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort serviceGurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
Gurgaon ✡️9711147426✨Call In girls Gurgaon Sector 51 escort service
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AI
 

Bilbo 1

  • 1. EE4 Digital Electronics BILBO R. Scaife I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 1 of 6 BILBO (Built-in Logic Block Observer) (Hobbit). Adopting Conway-Mead partitioning approach, we re-design registers so that they may (at different times) be a normal register, a shift reg. (for scan path), a parallel signature analyser or an autonomous LFSR (for test vector generation). Can now apply Signature Analysis methods to the combinational logic block between 2 registers, using SISO to get data in/out. Most of hardware for testing is now designed into the logic system. Use standard Scan Path (such as JTAG) to control and examine results of built-in test. BILBO A BILBO B COMBNL. LOGIC config. as t.p.g. (ALFSR) config. as S.A. SCAN IN SCAN OUT COMBNL. LOGIC
  • 2. EE4 Digital Electronics BILBO R. Scaife I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 2 of 6 Full BILBO Register: Z1 Q /Q D Q Z2 Q /Q D Q Z Q /Q D QN ZN-1 Q /Q D QN-1 /SO 0 1 SI B1 B2
  • 3. EE4 Digital Electronics BILBO R. Scaife I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 3 of 6 Normal Register Operation (B1= B2 =1): Acts as normal register. Z1 Q /Q D Q1 Z2 Q /Q D Q2 ZNZN-1 Q /Q D QN-1 Q /Q D QN
  • 4. EE4 Digital Electronics BILBO R. Scaife I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 4 of 6 Shift Register (Scan) Mode (B1= B2 =0): Used either to drive {Qi} to particular values or read {Qi}, via serial scan-path. Q /Q D Q1 Q /Q D QN-1 Q /Q D Q2 Q /Q DSI SO QN
  • 5. EE4 Digital Electronics BILBO R. Scaife I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 5 of 6 Autonomous LFSR (ALFSR) Mode (B1= 1, B2= 0): Used to Generate Test Sequences. Q /Q D Q /Q D Q /Q D Q /Q D QNQN-1Q1 Q2
  • 6. EE4 Digital Electronics BILBO R. Scaife I:ee4slidesolddocsBILBO.DOC edited: 09 March 2000 page 6 of 6 Multiple-Input Shift Register (MISR) mode (B1= 1, B2= 0): Used in Signature Analyser mode to process output of combinational logic block in response to signals generated by BILBO in ALFSR mode. Z1 Z2 Q ZN /Q D Q1 Q ZN-1 /Q D QN-1 Q /Q D Q1 Q /Q D Q2