1. The document describes characterizing the output power, power added efficiency (PAE), and noise figure of a NE721 GaAs MESFET as a function of input and output matching conditions using load pull and noise figure measurements. 2. The optimum output match for gain is found to be Γout = 0.66/52° at Pin = -27dBm, but shifts to Γout = 0.66/36° at Pin = -4dBm (3dB compression point). 3. The optimum conditions are found to be Γout = 0.66/36° and Γin = 0.76/42° at Pin = -4dBm, producing

1. Jr.’s Source & Load Pull Imran Bashir, David Seymour (Grand Pa), Chris Kamilar, David Mize

3. Load Pull Setup

4. Step1: Measure your board. Lab Board TI Board

5. Step1: Measure your board. Lab board has severe discontinuities at SMA connector.

7. Step2: Calibration Source Tuner Load Tuner Barrel Barrel DUT Board FET BIAS-T BIAS-T VNA Power Supply Vdrain=3V Vgate=-0.9V Tuner1 file Tuner2 file Contents of typical tuner file Position 1 mag(s11) phase (s11).. Position 2 mag(s11) phase (s11).. Position 3 mag(s11) phase (s11).. .. s2p S2p #1 S2p #2 s2p

8. Step2: Calibration DUT Board Barrel Barrel VNA 1. Apply port extension on a calibrated VNA up-to the open end of the TL. The DUT board is not populated with any MESFET. 340ps 340ps DUT Board Barrel Barrel VNA 340ps S2p file 1 2. Connect another DUT board with thru connection. Disengage port extension on P2 ONLY and measure S-parameters between P1 and P2. Repeat the same process for generating s2p for the other half of the board. P1 P2 P1 P2

9. Step2: Calibration Before De-embedding After De-embedding Increasing the path loss to/from the DUT shrinks the coverage of impedances that can be presented to the MESFET at the source and drain.

10. Error in Calibration Source Tuner Load Tuner Barrel Barrel DUT Board BIAS-T BIAS-T VNA Power Supply Port1 Ext. Port2 S11 Δ e Source -0.4 ˚ Load 10˚ Source -5 ˚ Load -5˚ Source -2 ˚ Load -8˚ Source 4 ˚ Load 9˚

12. Setup Noise Figure Measurement Source Tuner Load Tuner Barrel Barrel DUT Board MESFET BIAS-T BIAS-T Noise Diode ENR = 21.4dB Power Supply Vdrain=3V Vgate=-0.9V Spectrum Analyzer

13. Step3: Determine Γ out,gain , P in =-27dBm F = 2.5GHz VDD = 3.0V Idd = 10mA Vgs = -0.97V Γ in =0.76 ∕ 42˚ P in =-27dBm Γ out,gain =0.66 ∕ 52˚

14. Step4: Measure Linearity & AM-PM @ Γ out,gain P 3dB,in = -4 dBm, P 1dB,in = -7 dBm, Gain = 17dB. Higher the gain, worse the linearity.

15. Step5: Determine Γ out,gain , P in =-4dBm F = 2.5GHz VDD = 3.0V Idd = 10mA Vgs = -0.97V Γ in=0.76 ∕ 42˚ P in =-4dBm Γ out,gain =0.66 ∕ 36˚ Gain = 14.5dB @ 1.5dB better than Γ out,gain @ Pin = -27dBm The optimum Γ out,gain is changing as device is driven into compression.

16. Step6: Determine Γ out,pout & Γ out,PAE , P in =-4dBm Γ out,pout =0.66 ∕ 36˚ P out = 10dBm Γ out,PAE =0.66 ∕ 36˚ PAE = 28%

17. Γ out,pout & Γ out,PAE , P in =+5dBm Γ out,pout =0.58 ∕ 13˚ P out = 13.2dBm Γ out,PAE =0.58 ∕ 13˚ PAE = 38%

19. Step7: Determine Γ in,NF F = 2.5GHz VDD = 3.0V Idd = 10mA Vgs = -0.97V Γ out =0.66 ∕ 36˚ Γ in,NF =0.85∕ 43˚ NF = 5.1dB Γ in,NF =0.76∕ 42˚ NF = 5.9dB There is a slight offset between optimum Γ in,gain and Γ in,NF . Preference is given to gain and therefore the noise figure degrades by 0.8dB.