Two Stage Amplifier

Final Lab Design – Two-Stage Amplifier M. Do & J. Ramey
11
EGRE 224 –
Introduction to Microelectronics
Final Design Project
Two-Stage Amplifier
Lab Section: Wednesday 1pm
Report submitted on: December 12, 2014
Marian Do
Jacob Ramey
PLEDGE:_______________________________________
“On my honor, I have neither given nor received unauthorized aid on this assignment”
Introduction:
In this final design project, we design, simulate, build and test a two-stage amplifier using
two NMOS (2N7000) transistors, and a given topology. We use the equations in the Background
and Theory section to calculate for operation in the saturation region to ensure that our amplifier
is operating as it should. Then using the data from the transistors from Lab 6, we design the two-
stage amplifier with specific given values by completing DC and small signal analyses based on

22
the theoretical behavior of the transistors. After the first calculations, we then simulate the
amplifier in Multisim, comparing our simulation results to that of our calculated theoretical
results. After running the simulations, we build and test the amplifier, using standard capacitor
and resistor values, to get a voltage gain of +/- 25V/V +/- 2V.
Backgroundand Theory:
The negative-channel metal oxide semiconductor (NMOS) transistor is a type of metal
oxide semiconductor field effect transistor (MOSFET). This type of transistor is negatively
charged so the transistor turns on with the movement of electrons, as the source of n-channel
carriers are electrons. PMOS transistors are opposite and the source carriers are holes.
For MOSFETs, there are three modes or regions; cutoff, triode, and saturation. For this
lab, we will be focusing mostly on the saturation region and some on the triode and region. The
following equations define the current ID at each of the regions,
Triode: 𝐼 𝐷 = 𝑘′
𝑛 (
𝑊
𝐿
)(( 𝑉𝐺𝑆 − 𝑉𝑡) 𝑉𝐷𝑆 −
𝑉𝐷𝑆
2
2
)
Saturation: 𝐼 𝐷 =
1
2
𝑘′
𝑛
(
𝑊
𝐿
)(( 𝑉𝐺𝑆 − 𝑉𝑡)2(1− 𝜆))
where k’n= electron mobility, W = gate width, L = gate length, VGS = gate to source voltage, Vt =
threshold voltage, VDS = drain to source voltage, and λ = channel length parameter. If the
condition 𝑉𝐺𝑆 > 𝑉𝑡 is not met, or 𝑉𝐺𝑆 < 𝑉𝑡 is met, the transistor is considered to be off, or in the
cutoff region, where the current is 0. In the triode region, two conditions must be met, 𝑉𝐺𝑆 > 𝑉𝑡
and 𝑉𝐷𝑆 < ( 𝑉𝐺𝑆– 𝑉𝑡). When the conditions, 𝑉𝐺𝑆 > 𝑉𝑡 and 𝑉𝐷𝑆 ≥ ( 𝑉𝐺𝑆–𝑉𝑡) are met, it is in the
saturation region.
From the equations shown above, we can see that when we change one variable, then we
must change the other variables to make sure that the transistor’s region stays the same or if we
want to have a specific ID. This makes the circuit able to be manipulated quite easily to get the
output ID that you need necessary for your application.
The NMOS transistors that we use for this lab are 2N7000 n-channel MOSFETs, which
have a max rating of 60V and 200mA. The pin assignment and typical I-V curves, as per lab
information and the datasheet, are shown in figures B1 and B2, respectively.
Figure B1: Pin assignment

33
Figure B2: Typical I-V Characteristics
In this final design, we look at the cascode and its characteristics. The cascode is a two-
stage amplifier that is composed of a transconductance amplifier, which is then followed by
another amplifier, which buffers the output. The first stage of the amplifier is a common source
amplifier. The drain of the first amplifier is connected to the gate of the second amplifier. The
cascode’s characteristics include high input impedance, high gain, high bandwidth, and high
stability, however, it usually requires a high voltage supply, meaning that the two transistors
must be biased with a relatively high voltage at the drain (in this case, 15V). The gain of the
cascode can be found by finding the gain of the first amplifier and then finding the gain of the
second amplifier and multiplying the two.
Figure B3: Two-Stage Amplifier Topology
To design an amplifier, both a DC circuit analysis and an AC circuit analysis are
required. In the DC analysis, the capacitors react as open circuits. This reduces the circuit to just
resistors, the transistors, and VDD, as shown in Figure B4.

44
Figure B4: Modified circuit for DC analysis – Transistor 1
Figure B5: Modified circuit for DC analysis – Transistor 2
Using the given values for VDD, VSS, RG, Vt, VGS from data, kn’, W, L, and VA, the
overdrive voltage VOV, the channel modulation length λ, the current ID, the transconductance gm,

55
the output resistance ro, and the source resistance RS can all be determined using the following
equations. From this circuit, we can see that the voltage at the gate 𝑉𝐺 = 0. Therefore:
𝑉𝑆 = 𝑉𝐺 − 𝑉𝐺𝑆
𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡
𝜆 =
1
𝑉𝐴
Because DC circuit analysis occurs in the saturation region,
𝐼 𝐷 =
1
2
𝑘 𝑛′(
𝑊
𝐿
) ( 𝑉𝑂𝑉)2(1 + 𝜆)
𝑔 𝑚 =
2𝐼 𝐷
𝑉𝑂𝑉
𝑟𝑜 =
1
𝜆𝐼 𝐷
𝑉𝑆 + 𝑉𝐷𝐷 = 𝑅 𝑆( 𝐼 𝐷)
𝑅 𝑆 =
𝑉𝑆 + 𝑉𝐷𝐷
𝐼 𝐷
For the AC analysis, we can use a small signal model, as seen in figure B5, first shorting
the capacitors, as they as have infinite capacitance, and ignore all DC sources, as there is no
more need to look at the DC portion of the circuit, since DC analysis was already performed.
Then all that is left of the circuit is the AC or small signal components.
Using the following equations and the values given and found previously for gm, RG, Rsig, and
RL, the values for the ratio of vi/Vsig, where vi is the voltage at the gate, the gain Av, the
resistance at the drain RD, the DC voltage at the drain VD, and the output resistance ro, as seen
from the load resistor ca be determined.
𝑣𝑖 =
𝑅 𝐺
𝑅 𝐺 + 𝑅 𝑠𝑖𝑔
( 𝑉𝑠𝑖𝑔)

66
𝑣𝑖
𝑉𝑠𝑖𝑔
=
𝑅 𝐺
𝑅 𝐺 + 𝑅 𝑠𝑖𝑔
𝐴 𝑉 =
𝑉𝑜𝑢𝑡
𝑣
𝐴 𝑉 =
𝑣𝑔𝑠 (−𝑔 𝑚)( 𝑅 𝐷 ∨ 𝑟𝑜 ∨ 𝑅 𝐿)
𝑣𝑔𝑠
𝐴 𝑉 = (−𝑔 𝑚)( 𝑅 𝐷 ∨ 𝑟𝑜 ∨ 𝑅 𝐿)
𝐴 𝑉 = (−𝑔 𝑚)
(
((
𝑟𝑜 𝑅 𝐿
𝑟𝑜 + 𝑅 𝐿
) 𝑅 𝐷)
(
𝑟𝑜 𝑅 𝐿
𝑟𝑜 + 𝑅 𝐿
) + 𝑅 𝐷
)
Using the previous equation to solve for RD, then VD can then be determined.
𝑉𝐷𝐷 − 𝑉𝐷 = 𝐼 𝐷( 𝑅 𝐷)
−𝑉𝐷 = 𝐼 𝐷( 𝑅 𝐷)− 𝑉𝐷𝐷
𝑉𝐷 = 𝑉𝐷𝐷 − 𝐼 𝐷( 𝑅 𝐷)
Procedure:
Figure P1: Two-Stage Amplifier Topology
First we built the topology in Figure P1 in Multisim so that we have our circuit ready and built
for testing. Then using figure P1, we drew the DC model of the two-stage amplifier so that we
can calculate the necessary values. Our DC models can be seen in Figure P2 and P3.

77
Figure P2: Modified circuit for DC analysis – Transistor 1
Figure P3: Modified circuit for DC analysis – Transistor 2
Since there are two transistors, we have two DC models. Using the transistors and data
from Lab 6, we input the equations into Excel to do our calculations.

88
Next, we draw the AC model of the two stage amplifier, seen in Figure P4.
Figure P4: AC model
Shown in P4, we then make an AC model of our amplifier. Using this model, we can then
calculate for our gain in Excel.
In order to properly bias the transistors to get the right gain, the most important factor is
the resistor values. The DC voltage of the Gate, Drain, and Source we use mainly voltage and
current division.
To find the voltage at the first gate VG1,
𝑉𝐺1 = 𝑉𝐷𝐷 (
𝑅 𝐺1𝐵
𝑅 𝐺1𝐴 + 𝑅 𝐺1𝐵
)
And similarly we can find the voltage at the source using voltage division
𝑉𝑆1 = 𝑉𝐷𝐷 (
𝑅 𝑆1𝐵
𝑅 𝑆1𝐴 + 𝑅 𝑆1𝐵 + 𝑅 𝐷1
)
After finding the gate and source voltage, we determine VGS1 and then VOV1
𝑉𝐺𝑆1 = 𝑉𝐺1 − 𝑉𝑆1
𝑉𝑜𝑣1 = 𝑉𝐺𝑆1 − 𝑉𝑡
This overdrive voltage is important because it is one part of the test for saturation- the
mode of operation we need for proper amplification. The drain current is a function of the
overdrive voltage some constants defined by the design of the transistor. In order to find the
drain current through the first transistor, the following equation was applied
𝐼 𝐷1 =
1
2
𝑘 𝑛 𝑉𝑜𝑣
2 =
1
2
𝑘 𝑛( 𝑉𝐺𝑆1 − 𝑉𝑡)2

99
The drain current is used to then solve for the transconductance of the transistor, gm
𝑔 𝑚 =
2𝐼 𝐷
𝑉𝑜𝑣
Which is an important variable when determining the gain. The current through the drain
is then given by
𝐼 𝐷 = −𝑔 𝑚 𝑉𝐺𝑆
To calculate the voltage the second transistors gate, we use voltage division like at the
first transistor taking advantage of the following equation
𝑉𝐺2 = 𝑉𝐷𝐷 (
𝑅 𝐺2𝐵
)
The drain of the second transistor is connected directly to the DC voltage source, so its
voltage is a constant 15V
𝑉𝐷2 = 15𝑉
To calculate the voltage at the source of the second transistor, we use Ohm’s Law
𝑉𝑆2 = 𝐼 𝐷2 𝑅𝑠2
To calculate the gain, we need to find the ratio of the output voltage to the input voltage,
where the output is measured across a 100Ω load resistor and the input is a 100mV 10 kHz
sinusoidal signal. The gain is more easily calculated by finding the gain from A to B, then from
B to C, then the total gain is simply the product of the individual gains. The gain resulting from
the signal is given by voltage division
𝑉𝐺1 = 𝑉𝑠𝑖𝑔 (
𝑅 𝐺1𝐴 + 𝑅 𝐺1𝐵 + 𝑅 𝑠𝑖𝑔
)
𝐺0 =
𝑉𝐺1
𝑉𝑠𝑖𝑔
=
𝑅 𝐺1𝐴 + 𝑅 𝐺1𝐵 + 𝑅 𝑠𝑖𝑔
The gain given by the first transistor is given by
𝐺1 =
1( 𝑅 𝑆1𝐴 ∨ 𝑅 𝑆1𝐵)
𝑉𝐺1
Then the gain for the second transistor
𝐺2 =
𝐼 𝐷2 𝑅 𝑆2
𝑉𝐺2
Then the overall gain G is equal to the product of the gain
𝐺 𝑇 = 𝐺0 𝐺1 𝐺2
After checking that the design is correct in Excel, that both transistors are operating in
saturation and that our calculations in Excel match that of the results in Multisim, we build the
circuit, using the PXI system, a power supply, two oscilloscope probes, DMM probes, a function

1010
generator cable, a power supply cable, two specified 2N7000 transistors, standard resistors to
match the design, four 47uF capacitors, some wires, and a breadboard.
Before the power supply is connected to the board, make sure that that the power supply
is supplying 15V. It is always possible that the voltage shown on the power supply is more or
less than the voltage you need, in this case, 15V. Then build the circuit. The input voltage fed
into the circuit from the function generator should be set to 50mV at 10kHz.Then take a
screenshot of the output, showing 25V/V +/- 2V. To ensure that the amplifier follows the criteria,
test the circuit at 200Hz. The cutoff frequency should be less than 200Hz, showing a gain of less
than 17.6V/V.
Experimental Results:
Data Table 1: Resistances
Resistors
RG1a 2050000 Stage 2 RG2a 100000
RG1b 2000000 RG2b 51000
RD1 10000 RS2 51
RS1a 100 GainS2 626.8533703
RS1b 15000 ID2 0.043211123
GainS1 0.2968461 I2 9.93377E-05
ID1 0.00035531 Req 9.8944
I1 3.7037E-06
Data Table 2: Voltages
Voltages
Stage 1 VG1 7.40740741 Stage 2 VG2 5.066225166
VS1 5.33 VS2 2.2
VD1 11.4468765 VD2 15
Vt1 1.9235 Vt2 1.5
Vov1 0.15390741 Vov2 1.366225166
VGS1 2.07740741 VGS2 2.866225166
VDS1 6.11687649 VDS2 12.8
VGD1 2.07740741 VGD2 -9.93377483
Data Table 3: Test for Saturation
Test
q1 q2 Kn1 0.03
state Kn2 0.0463
off 0 0 gm1 0.02368749
triode 0 0 gm2 1.866571203
saturation 1 1

1111
Figure E1: Gain at 10kHz, with each voltage and current labeled
In Figure E1, each probe shows the values that we have calculated in Excel. We placed
the probes to ensure that our design was correct, with both values matching Excel and Multisim.
Figure E2: Gain at 10kHz
Figure E2 shows the output from the built circuit using the PXI systems at 10kHz. Here,
we have a gain of about 25V/V.

1212
Figure E3: Gain at 200 Hz
To show that our design is operating correctly, the input signal frequency was changed to
200Hz to show that the cutoff frequency is below 200Hz. This shows a gain of below 17.6V/V.
Summary and Conclusions:
Transistors are an essential building block in any circuit that has even basic complexity.
The vast amount of things that can be accomplished using these transistors in different ways has
been advancing electronics since transistors were invented. The focus of this lab report was to
use our knowledge of how transistors work to create an amplifier with very specific design
restrictions. The gain was to be around 25V/V which is impossible to achieve with properly
biasing the transistors.
The resistors determine the voltages that are at each of the terminals, and thus determine
the mode of operation the transistor is in. Amplification of a signal occurs in the saturation
region and we want to design our circuit such that it is in this region and, when a sinusoidal
source is applied, the waveform is not chopped off. The most difficult part in designing this
amplifier is finding the values for the resistors. Numerical solutions were used to help us achieve
the voltages and gains we needed. Excel is a useful tool in that we can do fast calculations with a
range of numbers and find the right value for our project. I had never used conditional logic in
Excel but this proved to be very useful (and easy to implement) because I could see a real time
test as to whether or not the transistor was biased correctly.
The correct configuration of an amplifier does not necessarily imply it will give the right
results. It is difficult to change one value without severely affecting another. When choosing
values for the resistor at the first gate we saw that adding 50k to a 2M ohm resistor we nearly
took the transistor out the saturated region. Changing a value could bring the gain closer to your
desired, but there would come a certain point where it didn’t matter how much you increased or
decreased it- the change either had no effect or it took us out of saturation. Often times changing

1313
one values changes multiple other ones and we faced issues with circular references when
defining the variables. The key to solving this is to choose a current that is consistent with data
from the previous lab that shows it is in the saturation region with a certain VGS. After using this
constant throughout the excel sheet, we can solve for values that work using that drain current,
then use those new relations to define the current through the drain. The voltage gain of the
circuit is very sensitive to the value of the gate voltage of the first transistor. The use of voltage
division is the best way to get exactly the voltage you design by choosing a resistor such that a
certain voltage will be dropped across with leaving you with what you need exactly.
By cascoding transistors, we are able to get a much larger gain than with single stage
amplifiers and also we can more specifically define the cutoff regions using the capacitors. The
larger capacitor values determine the lower cutoff frequency and when the capacitors are large
enough they behave as short circuits at relatively low frequencies. The gain of the circuit by
cascoding resulted in a positive waveform as well, whereas single stage amplifier generally result
in negative gains.

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