In this deck from ATPESC 2019, James Moawad and Greg Nash from Intel present: FPGAs and Machine Learning.
"Neural networks are inspired by biological systems, in particular the human brain. Through the combination of powerful computing resources and novel architectures for neurons, neural networks have achieved state-of-the-art results in many domains such as computer vision and machine translation. FPGAs are a natural choice for implementing neural networks as they can handle different algorithms in computing, logic, and memory resources in the same device. Faster performance comparing to competitive implementations as the user can hardcore operations into the hardware. Software developers can use the OpenCL device C level programming standard to target FPGAs as accelerators to standard CPUs without having to deal with hardware level design."
Watch the video: https://wp.me/p3RLHQ-lnc
Learn more: https://extremecomputingtraining.anl.gov/archive/atpesc-2019/agenda-2019/
and
https://www.intel.com/content/www/us/en/products/programmable/fpga.html
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
The document describes how the latest Intel® Advanced Vector Extensions 512 (Intel® AVX-512) instructions and Intel® Advanced Encryption Standard New Instructions (Intel® AES-NI) enabled in the latest Intel® 3rd Generation Xeon® Scalable Processor are used to significantly increase and achieve 1 Tb of IPsec throughput.
Elijah Charles from Intel presented this deck at the 2016 HPC Advisory Council Switzerland Conference.
"The Exascale computing challenge is the current Holy Grail for high performance computing. It envisages building HPC systems capable of 10^18 floating point operations under a power input in the range of 20-40 MW. To achieve this feat, several barriers need to be overcome. These barriers or “walls” are not completely independent of each other, but present a lens through which HPC system design can be viewed as a whole, and its composing sub-systems optimized to overcome the persistent bottlenecks."
Watch the video presentation: http://wp.me/p3RLHQ-f7X
See more talks in the Switzerland HPC Conference Video Gallery: http://insidehpc.com/2016-swiss-hpc-conference/
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
What are latest new features that DPDK brings into 2018?Michelle Holley
We will provide an overview of the new features of the latest DPDK release including source code browsing and API listing of top two new features of latest DPDK release. And on top of that, there will be a hands-on lab, on the Intel® microarchitecture servers, to learn how getting started with DPDK will become much simpler and powerful.
In this deck from ATPESC 2019, James Moawad and Greg Nash from Intel present: FPGAs and Machine Learning.
"Neural networks are inspired by biological systems, in particular the human brain. Through the combination of powerful computing resources and novel architectures for neurons, neural networks have achieved state-of-the-art results in many domains such as computer vision and machine translation. FPGAs are a natural choice for implementing neural networks as they can handle different algorithms in computing, logic, and memory resources in the same device. Faster performance comparing to competitive implementations as the user can hardcore operations into the hardware. Software developers can use the OpenCL device C level programming standard to target FPGAs as accelerators to standard CPUs without having to deal with hardware level design."
Watch the video: https://wp.me/p3RLHQ-lnc
Learn more: https://extremecomputingtraining.anl.gov/archive/atpesc-2019/agenda-2019/
and
https://www.intel.com/content/www/us/en/products/programmable/fpga.html
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
The document describes how the latest Intel® Advanced Vector Extensions 512 (Intel® AVX-512) instructions and Intel® Advanced Encryption Standard New Instructions (Intel® AES-NI) enabled in the latest Intel® 3rd Generation Xeon® Scalable Processor are used to significantly increase and achieve 1 Tb of IPsec throughput.
Elijah Charles from Intel presented this deck at the 2016 HPC Advisory Council Switzerland Conference.
"The Exascale computing challenge is the current Holy Grail for high performance computing. It envisages building HPC systems capable of 10^18 floating point operations under a power input in the range of 20-40 MW. To achieve this feat, several barriers need to be overcome. These barriers or “walls” are not completely independent of each other, but present a lens through which HPC system design can be viewed as a whole, and its composing sub-systems optimized to overcome the persistent bottlenecks."
Watch the video presentation: http://wp.me/p3RLHQ-f7X
See more talks in the Switzerland HPC Conference Video Gallery: http://insidehpc.com/2016-swiss-hpc-conference/
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
What are latest new features that DPDK brings into 2018?Michelle Holley
We will provide an overview of the new features of the latest DPDK release including source code browsing and API listing of top two new features of latest DPDK release. And on top of that, there will be a hands-on lab, on the Intel® microarchitecture servers, to learn how getting started with DPDK will become much simpler and powerful.
Cost-Effective System Continuation using Xilinx FPGAs and Legacy Processor IPCAST, Inc.
Presented at X-Day 2011, Israel: Many systems produced 10 or 20 years ago are still viable, but finding parts to replace their old processors is often impossible. An excellent solution is to use legacy IP cores -- such as for a 68000 -- implemented in modern Xilinx FPGAs. Moreover, the great capacity, high speed, and low power consumption of Xilinx devices can provide easy opportunities for significantly improving the competitiveness of existing products.
Using a Field Programmable Gate Array to Accelerate Application PerformanceOdinot Stanislas
Intel s'intéresse tout particulièrement aux FPGA et notamment au potentiel qu'ils apportent lorsque les ISV et développeurs ont des besoins très spécifiques en Génomique, traitement d'images, traitement de bases de données, et même dans le Cloud. Dans ce document vous aurez l'occasion d'en savoir plus sur notre stratégie, et sur un programme de recherche lancé par Intel et Altera impliquant des Xeon E5 équipés... de FPGA
Intel is looking at FPGA and what they bring to ISVs and developers and their very specific needs in genomics, image processing, databases, and even in the cloud. In this document you will have the opportunity to learn more about our strategy, and a research program initiated by Intel and Altera involving Xeon E5 with... FPGA inside.
Auteur(s)/Author(s):
P. K. Gupta, Director of Cloud Platform Technology, Intel Corporation
Improving Quality of Service via Intel RDTLiz Warner
Intel® Resource Director Technology (Intel® RDT) provides monitoring and control over shared platform resources per application, container, virtual machine (VM), or even per-thread if necessary. See a demonstration on how to allocate memory bandwidth via Intel RDT and demonstrate how Intel RDT can improve performance where shared resources come under pressure with a Redis* in-memory data store workload.
Introduction to the DAOS Scale-out object store (HLRS Workshop, April 2017)Johann Lombardi
DAOS is a open-source storage stack designed from the ground up to address many of the problems that arise when scaling out storage. DAOS takes advantage of next generation non-volatile memory technologies while presenting a rich and scalable storage interface providing features such as transactional non-blocking list I/O, data resiliency on top of commodity hardware, fine grained data control, and storage tiering to optimize performance and cost. Check out https://github.com/daos-stack for more information.
Build a Deep Learning Video Analytics Framework | SIGGRAPH 2019 Technical Ses...Intel® Software
Explore how to build a unified framework based on FFmpeg and GStreamer to enable video analytics on all Intel® hardware, including CPUs, GPUs, VPUs, FPGAs, and in-circuit emulators.
Hands-on Lab: How to Unleash Your Storage Performance by Using NVM Express™ B...Odinot Stanislas
(FR)
Voici un excellent document qui explique étape après étape comment installer, monitorer et surtout correctement benchmarker ses SSD PCIe/NVMe (pas si simple que ça). Autre élément clé : comment analyser la charge I/O de véritables applications? Combien d'IOPS, en read, en write, quelle bande passante et surtout quel impact sur la durée de vie des SSD? Bref à mettre en toute les mains, et un merci à mon collègue Andrey Kudryavtsev.
(EN)
An excellent content which describe step by step how to install, monitor and benchmark PCIe/NVMe SSD (many trick not so simple). Another key learning: how to measure real I/O activities on a real workload? How many R/W IOPS, block size, throughtput, and finally what's the impact on SSD endurance and (real)life? A must read, and a huge thanks to my colleague Andrey Kudryavtsev.
Auteurs/Authors:
Andrey Kudryavtsev, SSD Solution Architect, Intel Corporation
Zhdan Bybin, Application Engineer, Intel Corporation
The field of machine programming — the automation of the development of software — is making notable research advances. This is, in part, due to the emergence of a wide range of novel techniques in machine learning. In today’s technological landscape, software is integrated into almost everything we do, but maintaining software is a time-consuming and error-prone process. When fully realized, machine programming will enable everyone to express their creativity and develop their own software without writing a single line of code. Intel realizes the pioneering promise of machine programming, which is why it created the Machine Programming Research (MPR) team in Intel Labs. The MPR team’s goal is to create a society where everyone can create software, but machines will handle the “programming” part.
In this deck from the Argonne Training Program on Extreme-Scale Computing 2019, Howard Pritchard from LANL and Simon Hammond from Sandia present: NNSA Explorations: ARM for Supercomputing.
"The Arm-based Astra system at Sandia will be used by the National Nuclear Security Administration (NNSA) to run advanced modeling and simulation workloads for addressing areas such as national security, energy and science.
"By introducing Arm processors with the HPE Apollo 70, a purpose-built HPC architecture, we are bringing powerful elements, like optimal memory performance and greater density, to supercomputers that existing technologies in the market cannot match,” said Mike Vildibill, vice president, Advanced Technologies Group, HPE. “Sandia National Laboratories has been an active partner in leveraging our Arm-based platform since its early design, and featuring it in the deployment of the world’s largest Arm-based supercomputer, is a strategic investment for the DOE and the industry as a whole as we race toward achieving exascale computing.”
Watch the video: https://wp.me/p3RLHQ-l29
Learn more: https://insidehpc.com/2018/06/arm-goes-big-hpe-builds-petaflop-supercomputer-sandia/
and
https://extremecomputingtraining.anl.gov/agenda-2019/
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
Review state-of-the-art techniques that use neural networks to synthesize motion, such as mode-adaptive neural network and phase-functioned neural networks. See how next-generation CPUs with reinforcement learning can offer better performance.
In this deck from the UK HPC Conference, Gunter Roeth from NVIDIA presents: Hardware & Software Platforms for HPC, AI and ML.
"Data is driving the transformation of industries around the world and a new generation of AI applications are effectively becoming programs that write software, powered by data, vs by computer programmers. Today, NVIDIA’s tensor core GPU sits at the core of most AI, ML and HPC applications, and NVIDIA software surrounds every level of such a modern application, from CUDA and libraries like cuDNN and NCCL embedded in every deep learning framework and optimized and delivered via the NVIDIA GPU Cloud to reference architectures designed to streamline the deployment of large scale infrastructures."
Watch the video: https://wp.me/p3RLHQ-l2Y
Learn more: http://nvidia.com
and
http://hpcadvisorycouncil.com/events/2019/uk-conference/agenda.php
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
Yesterday's thinking may still believe NVMe (NVM Express) is in transition to a production ready solution. In this session, we will discuss how the evolution of NVMe is ready for production, the history and evolution of NVMe and the Linux stack to address where NVMe has progressed today to become the low latency, highly reliable database key value store mechanism that will drive the future of cloud expansion. Examples of protocol efficiencies and types of storage engines that are optimizing for NVMe will be discussed. Please join us for an exciting session where in-memory computing and persistence have evolved.
RenderMan*: The Role of Open Shading Language (OSL) with Intel® Advanced Vect...Intel® Software
This talk focuses on the newest release in RenderMan* 22.5 and its adoption at Pixar Animation Studios* for rendering future movies. With native support for Intel® Advanced Vector Extensions, Intel® Advanced Vector Extensions 2, and Intel® Advanced Vector Extensions 512, it includes enhanced library features, debugging support, and an extensive test framework.
Ray Tracing with Intel® Embree and Intel® OSPRay: Use Cases and Updates | SIG...Intel® Software
Explore practical examples of Intel® Embree and Intel® OSPRay in production rendering and the best practices of using the kernels in typical rendering pipelines.
Under the Armor of Knights Corner: Intel MIC Architecture at Hotchips 2012Intel IT Center
George Chrysos, the leading architect of Intel Xeon Phi co-processor shared the new architecture details of upcoming Intel's HPC powerhouse. Designed for highly-parallel applications, Intel Xeon Phi co-processor based on Intel Mani Integrated Core architecture will deliver the combination of industry leading performance per watt with the ability to re-use the existing code and applications without necessity of re-writing them. Equipped with more than 50 cores and built using Intel's latest 22nm 3D Tri-gate transistor technology, new co-processors will be in production this year with first supercomputers from top500 list already taking advantage of this technology.
VEDLIoT at FPL'23_Accelerators for Heterogenous Computing in AIoTVEDLIoT Project
VEDLIoT took part in the 33rd International Conference on Field-Programmable Logic and Applications (FPL 2023), in Gothenburg, Sweden. René Griessl (UNIBI) presented VEDLIoT and our latest achievements in the Research Projects Event session, giving a presentation entitled "Accelerators for Heterogenous Computing in AIoT".
Cost-Effective System Continuation using Xilinx FPGAs and Legacy Processor IPCAST, Inc.
Presented at X-Day 2011, Israel: Many systems produced 10 or 20 years ago are still viable, but finding parts to replace their old processors is often impossible. An excellent solution is to use legacy IP cores -- such as for a 68000 -- implemented in modern Xilinx FPGAs. Moreover, the great capacity, high speed, and low power consumption of Xilinx devices can provide easy opportunities for significantly improving the competitiveness of existing products.
Using a Field Programmable Gate Array to Accelerate Application PerformanceOdinot Stanislas
Intel s'intéresse tout particulièrement aux FPGA et notamment au potentiel qu'ils apportent lorsque les ISV et développeurs ont des besoins très spécifiques en Génomique, traitement d'images, traitement de bases de données, et même dans le Cloud. Dans ce document vous aurez l'occasion d'en savoir plus sur notre stratégie, et sur un programme de recherche lancé par Intel et Altera impliquant des Xeon E5 équipés... de FPGA
Intel is looking at FPGA and what they bring to ISVs and developers and their very specific needs in genomics, image processing, databases, and even in the cloud. In this document you will have the opportunity to learn more about our strategy, and a research program initiated by Intel and Altera involving Xeon E5 with... FPGA inside.
Auteur(s)/Author(s):
P. K. Gupta, Director of Cloud Platform Technology, Intel Corporation
Improving Quality of Service via Intel RDTLiz Warner
Intel® Resource Director Technology (Intel® RDT) provides monitoring and control over shared platform resources per application, container, virtual machine (VM), or even per-thread if necessary. See a demonstration on how to allocate memory bandwidth via Intel RDT and demonstrate how Intel RDT can improve performance where shared resources come under pressure with a Redis* in-memory data store workload.
Introduction to the DAOS Scale-out object store (HLRS Workshop, April 2017)Johann Lombardi
DAOS is a open-source storage stack designed from the ground up to address many of the problems that arise when scaling out storage. DAOS takes advantage of next generation non-volatile memory technologies while presenting a rich and scalable storage interface providing features such as transactional non-blocking list I/O, data resiliency on top of commodity hardware, fine grained data control, and storage tiering to optimize performance and cost. Check out https://github.com/daos-stack for more information.
Build a Deep Learning Video Analytics Framework | SIGGRAPH 2019 Technical Ses...Intel® Software
Explore how to build a unified framework based on FFmpeg and GStreamer to enable video analytics on all Intel® hardware, including CPUs, GPUs, VPUs, FPGAs, and in-circuit emulators.
Hands-on Lab: How to Unleash Your Storage Performance by Using NVM Express™ B...Odinot Stanislas
(FR)
Voici un excellent document qui explique étape après étape comment installer, monitorer et surtout correctement benchmarker ses SSD PCIe/NVMe (pas si simple que ça). Autre élément clé : comment analyser la charge I/O de véritables applications? Combien d'IOPS, en read, en write, quelle bande passante et surtout quel impact sur la durée de vie des SSD? Bref à mettre en toute les mains, et un merci à mon collègue Andrey Kudryavtsev.
(EN)
An excellent content which describe step by step how to install, monitor and benchmark PCIe/NVMe SSD (many trick not so simple). Another key learning: how to measure real I/O activities on a real workload? How many R/W IOPS, block size, throughtput, and finally what's the impact on SSD endurance and (real)life? A must read, and a huge thanks to my colleague Andrey Kudryavtsev.
Auteurs/Authors:
Andrey Kudryavtsev, SSD Solution Architect, Intel Corporation
Zhdan Bybin, Application Engineer, Intel Corporation
The field of machine programming — the automation of the development of software — is making notable research advances. This is, in part, due to the emergence of a wide range of novel techniques in machine learning. In today’s technological landscape, software is integrated into almost everything we do, but maintaining software is a time-consuming and error-prone process. When fully realized, machine programming will enable everyone to express their creativity and develop their own software without writing a single line of code. Intel realizes the pioneering promise of machine programming, which is why it created the Machine Programming Research (MPR) team in Intel Labs. The MPR team’s goal is to create a society where everyone can create software, but machines will handle the “programming” part.
In this deck from the Argonne Training Program on Extreme-Scale Computing 2019, Howard Pritchard from LANL and Simon Hammond from Sandia present: NNSA Explorations: ARM for Supercomputing.
"The Arm-based Astra system at Sandia will be used by the National Nuclear Security Administration (NNSA) to run advanced modeling and simulation workloads for addressing areas such as national security, energy and science.
"By introducing Arm processors with the HPE Apollo 70, a purpose-built HPC architecture, we are bringing powerful elements, like optimal memory performance and greater density, to supercomputers that existing technologies in the market cannot match,” said Mike Vildibill, vice president, Advanced Technologies Group, HPE. “Sandia National Laboratories has been an active partner in leveraging our Arm-based platform since its early design, and featuring it in the deployment of the world’s largest Arm-based supercomputer, is a strategic investment for the DOE and the industry as a whole as we race toward achieving exascale computing.”
Watch the video: https://wp.me/p3RLHQ-l29
Learn more: https://insidehpc.com/2018/06/arm-goes-big-hpe-builds-petaflop-supercomputer-sandia/
and
https://extremecomputingtraining.anl.gov/agenda-2019/
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
Review state-of-the-art techniques that use neural networks to synthesize motion, such as mode-adaptive neural network and phase-functioned neural networks. See how next-generation CPUs with reinforcement learning can offer better performance.
In this deck from the UK HPC Conference, Gunter Roeth from NVIDIA presents: Hardware & Software Platforms for HPC, AI and ML.
"Data is driving the transformation of industries around the world and a new generation of AI applications are effectively becoming programs that write software, powered by data, vs by computer programmers. Today, NVIDIA’s tensor core GPU sits at the core of most AI, ML and HPC applications, and NVIDIA software surrounds every level of such a modern application, from CUDA and libraries like cuDNN and NCCL embedded in every deep learning framework and optimized and delivered via the NVIDIA GPU Cloud to reference architectures designed to streamline the deployment of large scale infrastructures."
Watch the video: https://wp.me/p3RLHQ-l2Y
Learn more: http://nvidia.com
and
http://hpcadvisorycouncil.com/events/2019/uk-conference/agenda.php
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
Yesterday's thinking may still believe NVMe (NVM Express) is in transition to a production ready solution. In this session, we will discuss how the evolution of NVMe is ready for production, the history and evolution of NVMe and the Linux stack to address where NVMe has progressed today to become the low latency, highly reliable database key value store mechanism that will drive the future of cloud expansion. Examples of protocol efficiencies and types of storage engines that are optimizing for NVMe will be discussed. Please join us for an exciting session where in-memory computing and persistence have evolved.
RenderMan*: The Role of Open Shading Language (OSL) with Intel® Advanced Vect...Intel® Software
This talk focuses on the newest release in RenderMan* 22.5 and its adoption at Pixar Animation Studios* for rendering future movies. With native support for Intel® Advanced Vector Extensions, Intel® Advanced Vector Extensions 2, and Intel® Advanced Vector Extensions 512, it includes enhanced library features, debugging support, and an extensive test framework.
Ray Tracing with Intel® Embree and Intel® OSPRay: Use Cases and Updates | SIG...Intel® Software
Explore practical examples of Intel® Embree and Intel® OSPRay in production rendering and the best practices of using the kernels in typical rendering pipelines.
Under the Armor of Knights Corner: Intel MIC Architecture at Hotchips 2012Intel IT Center
George Chrysos, the leading architect of Intel Xeon Phi co-processor shared the new architecture details of upcoming Intel's HPC powerhouse. Designed for highly-parallel applications, Intel Xeon Phi co-processor based on Intel Mani Integrated Core architecture will deliver the combination of industry leading performance per watt with the ability to re-use the existing code and applications without necessity of re-writing them. Equipped with more than 50 cores and built using Intel's latest 22nm 3D Tri-gate transistor technology, new co-processors will be in production this year with first supercomputers from top500 list already taking advantage of this technology.
VEDLIoT at FPL'23_Accelerators for Heterogenous Computing in AIoTVEDLIoT Project
VEDLIoT took part in the 33rd International Conference on Field-Programmable Logic and Applications (FPL 2023), in Gothenburg, Sweden. René Griessl (UNIBI) presented VEDLIoT and our latest achievements in the Research Projects Event session, giving a presentation entitled "Accelerators for Heterogenous Computing in AIoT".
Ceph on Intel: Intel Storage Components, Benchmarks, and ContributionsRed_Hat_Storage
At Red Hat Storage Day Minneapolis on 4/12/16, Intel's Dan Ferber presented on Intel storage components, benchmarks, and contributions as they relate to Ceph.
Ceph on Intel: Intel Storage Components, Benchmarks, and ContributionsColleen Corrice
At Red Hat Storage Day Minneapolis on 4/12/16, Intel's Dan Ferber presented on Intel storage components, benchmarks, and contributions as they relate to Ceph.
Forwarding Plane Opportunities: How to Accelerate DeploymentCharo Sanchez
Intel® Select Solution for NFVI Forwarding Platform (NFVI FP) is an enhanced NFVI solution for 4G or 5G core User Plane Functions (UPF), broadband use cases, such as virtual Broadband Network Gateway (vBNG), network services such as virtual Evolved Packet Core (vEPC), IPsec Gateways (vSecGW), and cable use cases such as virtual Cable Modem Termination System (vCMTS) that demand high performance and packet processing throughput. The Advantech SKY-8101D server is a verified Intel Select Solution for NFVI FP plus, base and controller node with Red Hat Enterprise Linux and Red Hat OpenStack tuned to meet a performance threshold capable of serving large numbers of subscribers thanks to a more efficient use of the infrastructure for lower TCO.
DPDK Summit 2015 - NTT - Yoshihiro NakajimaJim St. Leger
DPDK Summit 2015 in San Francisco.
NTT presentation by Yoshihiro Nakajima.
For additional details and the video recording please visit www.dpdksummit.com.
Netronome invented the flexible network flow processor and hardware-accelerated server-based networking. Learn more from Netronome's Corporate Brochure.
Fórum E-Commerce Brasil | Tecnologias NVIDIA aplicadas ao e-commerce. Muito a...E-Commerce Brasil
Tecnologias NVIDIA aplicadas ao e-commerce. Muito além do hardware.
Jomar Silva
Gerente de relacionamento com desenvolvedores para a América Latina - NVIDIA
https://eventos.ecommercebrasil.com.br/forum/
NFV and SDN: 4G LTE and 5G Wireless Networks on Intel(r) ArchitectureMichelle Holley
The Presentation will outline the KPIs and key optimizations at the platform, NFVi and Stack level in implementing wireless base station stack and Telco Edge cloud on Intel Architecture. The presentation will use the FlexRAN LTE Reference PHY and NEV SDK for MEC to outline the NFV and 5G use cases like network slicing.
Optimized HPC/AI cloud with OpenStack acceleration service and composable har...Shuquan Huang
Today data scientist is turning to cloud for AI and HPC workloads. However, AI/HPC applications require high computational throughput where generic cloud resources would not suffice. There is a strong demand for OpenStack to support hardware accelerated devices in a dynamic model.
In this session, we will introduce OpenStack Acceleration Service – Cyborg, which provides a management framework for accelerator devices (e.g. FPGA, GPU, NVMe SSD). We will also discuss Rack Scale Design (RSD) technology and explain how physical hardware resources can be dynamically aggregated to meet the AI/HPC requirements. The ability to “compose on the fly” with workload-optimized hardware and accelerator devices through an API allow data center managers to manage these resources in an efficient automated manner.
We will also introduce an enhanced telemetry solution with Gnnochi, bandwidth discovery and smart scheduling, by leveraging RSD technology, for efficient workloads management in HPC/AI cloud.
Disrupt Hackers With Robust User AuthenticationIntel IT Center
Hacks are constantly in the headlines, and a clear-cut strategy is needed to proactively secure large enterprises from intrusions before they happen. This session reveals a new approach to user authentication. Attendees will learn how to 1) leverage hardware for authentication, 2) utilize existing network environments to better protect user credentials and authentication policies and 3) provide an intuitive experience for end users.
Strengthen Your Enterprise Arsenal Against Cyber Attacks With Hardware-Enhanc...Intel IT Center
With new “Hacked!” headlines happening every day, modernizing your companies’ endpoint security strategy has never been more important. Software alone is not enough. For cybersecurity, the way forward requires help from the hardware. This session will equip you with an understanding of one of the most promising approaches to enterprise security: hardware-enhanced identity protection and data protection, at the core of your fleet of end point devices.
Harness Digital Disruption to Create 2022’s Workplace TodayIntel IT Center
As the modern workplace evolves, modern devices play a critical role in simplifying work and creating an immersive, seamless experience. This session offers guidance on things to consider as you update your workplace into the secure, managed, collaborative environment employees demand and you require.
Don't Rely on Software Alone.Protect Endpoints with Hardware-Enhanced Security.Intel IT Center
Learn how security solutions built into Intel® Core™ vPro™ processors address top threat vectors. Our comprehensive approach to hardware-enhanced security starts with identity protection with Intel® Authenticate delivering customizable multi factor authentication options, and supports remote remediation with Intel® Active Management Technology.
Achieve Unconstrained Collaboration in a Digital WorldIntel IT Center
Technology is at the center of every digitally-savvy workplace, yet organizations are constrained with bridging current tools to more modern solutions. This session from Gartner Digital Workplace Summit will cover a new way to facilitate employee collaboration that is easy, engaging and gives IT an uncompromised security and management experience.
Intel® Xeon® Scalable Processors Enabled Applications Marketing GuideIntel IT Center
The Future-Ready Data Center platform is here. Whether you navigate in the High Performance Computing, Enterprise, Cloud, or Communications spheres, you will find an Intel® Xeon® processor that is ready to power your data center now and well into the future. An innovative approach to platform design in the Intel® Xeon® Scalable processor platform unlocks the power of scalable performance for today’s data centers—from the smallest workloads to your most mission-critical applications. Powerful convergence and capabilities across compute, storage, memory, network and security deliver unprecedented scale and highly optimized performance across a broad range of workloads—from high performance computing (HPC) and network functions virtualization, to advanced analytics and artificial intelligence (AI). Many examples here show how our software partner ecosystem has optimized their applications and/or taken advantage of inherent platform enhancements to deliver dramatic performance gains, that can translate into tangible business benefits.
#NABshow: National Association of Broadcasters 2017 Super Session Presentatio...Intel IT Center
At NAB, this session covered how technology will transform the way content is created and distributed and accelerate the rate of innovation in the industry. Intel, a revolutionary leader in technology and in transforming industries since 1968, works with other industry partners to enable the transition to new paradigms, infrastructures and technologies.
Join Jim Blakley, General Manager of Intel's Visual Cloud Division, and guests including Dave Ward (Chief Technology Officer, Cisco), AR Rahman (two-time Academy and Grammy Award winner), and Dave Andersen (School of Computer Science, Carnegie Mellon University) to learn more about how this revolution will make amazing visual cloud experiences possible for every person on Earth.
Making the digital workplace a reality requires a modern and strategic approach to identity protection. You will discover ways to build an IAM program that moves you from defense to offense. This presentation will offer practical guidance on how a hardware-based multi-factor authentication strategy is the future for identity protection.
Three Steps to Making a Digital Workplace a RealityIntel IT Center
The workplace is undergoing a dramatic evolution. Work styles are more mobile, changing the way we collaborate and share information while a more mobile workforce means a greater need to thwart cyber-attacks. You'll learn about Intel's three-part approach to help IT leaders sustainably embrace mobility and increase your security posture.
Three Steps to Making The Digital Workplace a Reality - by Intel’s Chad Const...Intel IT Center
The workplace is undergoing a dramatic evolution. Workstyles are more mobile, changing the way we collaborate and share information while a more mobile workforce means a greater need to thwart cyber-attacks. In this presentation, you'll learn about Intel's three-part approach to help IT leaders sustainably embrace mobility and increase your security posture.
Intel® Xeon® Processor E7-8800/4800 v4 EAMG 2.0Intel IT Center
This set of Intel® Xeon® processor E7-8800/4800 v4 family proof points spans several key business segments. The Intel® Xeon® processor E7-8800/4800 v4 product family delivers the horsepower for real-time, high-capacity data analysis that can help businesses derive rapid actionable insights to deliver innovative new services and customer experiences. With high performance, industry’s largest memory, robust reliability, and hardware-enhanced security features, the E7-8800/4800 v4 is optimal for scale-up platforms, delivering rapid in-memory computing for today’s most demanding real-time data and transaction-intensive workloads.
Intel® Xeon® Processor E5-2600 v4 Enterprise Database Applications ShowcaseIntel IT Center
The Intel Xeon processor E5-2600 v4 product family delivers the high performance, increased memory, and I/O bandwidth required for all forms of enterprise databases, is ideal for next-generation application workloads, and is the powerhouse for software-defined infrastructure (SDI) environments where automation and orchestration capabilities are foundational. See how database solutions deployed on the Intel® Xeon® processor E5 v4 product family can deliver increased performance and throughput, as demonstrated by key software partners.
Intel® Xeon® Processor E5-2600 v4 Core Business Applications ShowcaseIntel IT Center
Designed for architecting next-generation, software-defined data centers, the Intel® Xeon® processor E5-2600 v4 product family is supercharged for efficiency, performance, and agile services delivery across cloud-native and traditional applications. Intel® Intelligent Power Technology automatically regulates power consumption to combine industry-leading energy efficiency with intelligent performance that adapts to your workloads.
Intel® Xeon® Processor E5-2600 v4 Financial Security Applications ShowcaseIntel IT Center
The Intel® Xeon® processor E5-2600 v4 product family delivers efficient resource utilization, service tiering, and optimal quality of service (QoS) levels for financial applications by processing faster transactions and delivering exceptional uptime and availability and reduced latency, providing a high-performing, highly scalable system for your most demanding workloads. Enhanced cryptographic speed with two new instructions for Intel® AES-NI for improved security, and the Intel® SSD Data Center Family for NVMe represents optimized management for the future software-defined data centers with industry standard software and drivers.
Intel® Xeon® Processor E5-2600 v4 Telco Cloud Digital Applications ShowcaseIntel IT Center
Cloud and telecommunication companies can deliver better end user experiences while improving cost models across their data centers with the Intel® Xeon® processor E5-2600 v4 product family. See how innovative technologies can deliver high throughput, low latency and more agile delivery of network services to the software-defined data center. Additionally, unparalleled versatility across diverse workloads, such as 4K video processing, editing, and decoding and encoding where improved bandwidth and reduced latency provide noticeable performance improvements.
Intel® Xeon® Processor E5-2600 v4 Tech Computing Applications ShowcaseIntel IT Center
Where breakthrough performance is expected, the Intel® Xeon® processor E5-2600 v4 product family, a key ingredient of the Intel® Scalable System Framework and the software-defined data center, is designed to deliver better performance and performance per watt than ever before. The combination of Intel Xeon processors, Intel® Omni-Path Architecture, Intel Solutions for Lustre* software, and storage technologies improves bandwidth and reduces latency, providing a high-performing, highly scalable system for your most demanding workloads.
Intel® Xeon® Processor E5-2600 v4 Big Data Analytics Applications ShowcaseIntel IT Center
Deeper insights in less time at lower costs are made possible by the Intel® Xeon® processor E5-2600 v4 product family, delivering critical performance enhancements through key platform technologies that benefit the software-defined data center. See how leading software vendors are leveraging these for optimum performance.
Intel® Xeon® Processor E5-2600 v4 Product Family EAMGIntel IT Center
See why the new Intel® Xeon® processor E5-2600 v4 product family is ideal for next-generation application workloads and is the powerhouse for software-defined infrastructure (SDI) environments where automation and orchestration capabilities are foundational. Higher core counts, enhanced virtualization capabilities, and increased memory bandwidth provide the resources that are necessary to drive improvements in performance across a wide range of workloads. These processors also include technologies that can help IT organizations and cloud providers orchestrate resources more intelligently so they can optimize performance, agility, and efficiency. From 3-D data visualization and virtual prototyping, to personalized content delivery, new software capabilities provide the foundation for smarter, faster, and more agile business solutions.
Intel IT empowers business units to easily make rapid, impactful business decisions. Ingesting a variety of internal/external data sources has challenges. This slideset covers how Intel IT overcame the issues with Hadoop and Gobblin. Learn more at http://www.intel.com/itcenter
Transcript: Selling digital books in 2024: Insights from industry leaders - T...BookNet Canada
The publishing industry has been selling digital audiobooks and ebooks for over a decade and has found its groove. What’s changed? What has stayed the same? Where do we go from here? Join a group of leading sales peers from across the industry for a conversation about the lessons learned since the popularization of digital books, best practices, digital book supply chain management, and more.
Link to video recording: https://bnctechforum.ca/sessions/selling-digital-books-in-2024-insights-from-industry-leaders/
Presented by BookNet Canada on May 28, 2024, with support from the Department of Canadian Heritage.
GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using Deplo...James Anderson
Effective Application Security in Software Delivery lifecycle using Deployment Firewall and DBOM
The modern software delivery process (or the CI/CD process) includes many tools, distributed teams, open-source code, and cloud platforms. Constant focus on speed to release software to market, along with the traditional slow and manual security checks has caused gaps in continuous security as an important piece in the software supply chain. Today organizations feel more susceptible to external and internal cyber threats due to the vast attack surface in their applications supply chain and the lack of end-to-end governance and risk management.
The software team must secure its software delivery process to avoid vulnerability and security breaches. This needs to be achieved with existing tool chains and without extensive rework of the delivery processes. This talk will present strategies and techniques for providing visibility into the true risk of the existing vulnerabilities, preventing the introduction of security issues in the software, resolving vulnerabilities in production environments quickly, and capturing the deployment bill of materials (DBOM).
Speakers:
Bob Boule
Robert Boule is a technology enthusiast with PASSION for technology and making things work along with a knack for helping others understand how things work. He comes with around 20 years of solution engineering experience in application security, software continuous delivery, and SaaS platforms. He is known for his dynamic presentations in CI/CD and application security integrated in software delivery lifecycle.
Gopinath Rebala
Gopinath Rebala is the CTO of OpsMx, where he has overall responsibility for the machine learning and data processing architectures for Secure Software Delivery. Gopi also has a strong connection with our customers, leading design and architecture for strategic implementations. Gopi is a frequent speaker and well-known leader in continuous delivery and integrating security into software delivery.
Builder.ai Founder Sachin Dev Duggal's Strategic Approach to Create an Innova...Ramesh Iyer
In today's fast-changing business world, Companies that adapt and embrace new ideas often need help to keep up with the competition. However, fostering a culture of innovation takes much work. It takes vision, leadership and willingness to take risks in the right proportion. Sachin Dev Duggal, co-founder of Builder.ai, has perfected the art of this balance, creating a company culture where creativity and growth are nurtured at each stage.
The Art of the Pitch: WordPress Relationships and SalesLaura Byrne
Clients don’t know what they don’t know. What web solutions are right for them? How does WordPress come into the picture? How do you make sure you understand scope and timeline? What do you do if sometime changes?
All these questions and more will be explored as we talk about matching clients’ needs with what your agency offers without pulling teeth or pulling your hair out. Practical tips, and strategies for successful relationship building that leads to closing the deal.
Kubernetes & AI - Beauty and the Beast !?! @KCD Istanbul 2024Tobias Schneck
As AI technology is pushing into IT I was wondering myself, as an “infrastructure container kubernetes guy”, how get this fancy AI technology get managed from an infrastructure operational view? Is it possible to apply our lovely cloud native principals as well? What benefit’s both technologies could bring to each other?
Let me take this questions and provide you a short journey through existing deployment models and use cases for AI software. On practical examples, we discuss what cloud/on-premise strategy we may need for applying it to our own infrastructure to get it to work from an enterprise perspective. I want to give an overview about infrastructure requirements and technologies, what could be beneficial or limiting your AI use cases in an enterprise environment. An interactive Demo will give you some insides, what approaches I got already working for real.
Slack (or Teams) Automation for Bonterra Impact Management (fka Social Soluti...Jeffrey Haguewood
Sidekick Solutions uses Bonterra Impact Management (fka Social Solutions Apricot) and automation solutions to integrate data for business workflows.
We believe integration and automation are essential to user experience and the promise of efficient work through technology. Automation is the critical ingredient to realizing that full vision. We develop integration products and services for Bonterra Case Management software to support the deployment of automations for a variety of use cases.
This video focuses on the notifications, alerts, and approval requests using Slack for Bonterra Impact Management. The solutions covered in this webinar can also be deployed for Microsoft Teams.
Interested in deploying notification automations for Bonterra Impact Management? Contact us at sales@sidekicksolutionsllc.com to discuss next steps.
Epistemic Interaction - tuning interfaces to provide information for AI supportAlan Dix
Paper presented at SYNERGY workshop at AVI 2024, Genoa, Italy. 3rd June 2024
https://alandix.com/academic/papers/synergy2024-epistemic/
As machine learning integrates deeper into human-computer interactions, the concept of epistemic interaction emerges, aiming to refine these interactions to enhance system adaptability. This approach encourages minor, intentional adjustments in user behaviour to enrich the data available for system learning. This paper introduces epistemic interaction within the context of human-system communication, illustrating how deliberate interaction design can improve system understanding and adaptation. Through concrete examples, we demonstrate the potential of epistemic interaction to significantly advance human-computer interaction by leveraging intuitive human communication strategies to inform system design and functionality, offering a novel pathway for enriching user-system engagements.
Neuro-symbolic is not enough, we need neuro-*semantic*Frank van Harmelen
Neuro-symbolic (NeSy) AI is on the rise. However, simply machine learning on just any symbolic structure is not sufficient to really harvest the gains of NeSy. These will only be gained when the symbolic structures have an actual semantics. I give an operational definition of semantics as “predictable inference”.
All of this illustrated with link prediction over knowledge graphs, but the argument is general.
Smart TV Buyer Insights Survey 2024 by 91mobiles.pdf91mobiles
91mobiles recently conducted a Smart TV Buyer Insights Survey in which we asked over 3,000 respondents about the TV they own, aspects they look at on a new TV, and their TV buying preferences.
Essentials of Automations: Optimizing FME Workflows with ParametersSafe Software
Are you looking to streamline your workflows and boost your projects’ efficiency? Do you find yourself searching for ways to add flexibility and control over your FME workflows? If so, you’re in the right place.
Join us for an insightful dive into the world of FME parameters, a critical element in optimizing workflow efficiency. This webinar marks the beginning of our three-part “Essentials of Automation” series. This first webinar is designed to equip you with the knowledge and skills to utilize parameters effectively: enhancing the flexibility, maintainability, and user control of your FME projects.
Here’s what you’ll gain:
- Essentials of FME Parameters: Understand the pivotal role of parameters, including Reader/Writer, Transformer, User, and FME Flow categories. Discover how they are the key to unlocking automation and optimization within your workflows.
- Practical Applications in FME Form: Delve into key user parameter types including choice, connections, and file URLs. Allow users to control how a workflow runs, making your workflows more reusable. Learn to import values and deliver the best user experience for your workflows while enhancing accuracy.
- Optimization Strategies in FME Flow: Explore the creation and strategic deployment of parameters in FME Flow, including the use of deployment and geometry parameters, to maximize workflow efficiency.
- Pro Tips for Success: Gain insights on parameterizing connections and leveraging new features like Conditional Visibility for clarity and simplicity.
We’ll wrap up with a glimpse into future webinars, followed by a Q&A session to address your specific questions surrounding this topic.
Don’t miss this opportunity to elevate your FME expertise and drive your projects to new heights of efficiency.
PHP Frameworks: I want to break free (IPC Berlin 2024)Ralf Eggert
In this presentation, we examine the challenges and limitations of relying too heavily on PHP frameworks in web development. We discuss the history of PHP and its frameworks to understand how this dependence has evolved. The focus will be on providing concrete tips and strategies to reduce reliance on these frameworks, based on real-world examples and practical considerations. The goal is to equip developers with the skills and knowledge to create more flexible and future-proof web applications. We'll explore the importance of maintaining autonomy in a rapidly changing tech landscape and how to make informed decisions in PHP development.
This talk is aimed at encouraging a more independent approach to using PHP frameworks, moving towards a more flexible and future-proof approach to PHP development.
8. ScaleYourInnovation 8
HowIntel®FPGAsenableDEEPLearningI/O
I/O
I/O
I/O
▪ Millions of reconfigurable logic elements & routing
fabric
▪ Thousands of 20Kb memory blocks & MLABs
▪ Thousands of variable precision digital signal
processing (DSP) blocks
▪ Hundreds of configurable I/O & high-speed
transceivers
▪ Programmable Datapath
▪ Customized Memory structure
▪ Configurable compute
9. ScaleYourInnovation 9
Adaptingtoinnovation
Many efforts to improve efficiency
▪ Batching
▪ Reduce bit width
▪ Sparse weights
▪ Sparse activations
▪ Weight sharing
▪ Compact network
SparseCNN
[CVPR’15]
Spatially SparseCNN
[CIFAR-10 winner ‘14]
Pruning
[NIPS’15]
TernaryConnec
t [ICLR’16]
BinaryConnect
[NIPS’15]
DeepComp
[ICLR’16]
HashedNets
[ICML’15]
XNORNet
SqueezeNet
I
X
W
=
···
···
O
3 2
1 3
13
1
3
Shared Weights
LeNet
[IEEE}
AlexNet
[ILSVRC’12}
VGG
[ILSVRC’14}
GoogleNet
[ILSVRC’14}
ResNet
[ILSVRC’15}
I W O
2
3
10. ScaleYourInnovation 10
Performanceimprovementovertime
Model
Sept-17
Baseline
Dec-17 Feb-18 Apr-18 Jun-18 Oct-18 Dec-18 (projected)
SqueezeNet 1x 1.13x 1.75x 2.61x 3.89x 4.33x 4.51x
GoogleNet 1x 1.13x 1.22x 1.46x 3.55x 4.11x 4.50x
▪ Continually adapting
the custom data flow,
memory hierarchy and
compute enables
improved performance
with the same power
footprint
Jun-17 Sep-17 Dec-17 Apr-18 Jul-18 Oct-18 Feb-19
Performance(img/s)
SqueezeNet and Googlenet
Performance over Time, Batch=1
11.
12. ScaleYourInnovation 12
Intel® FPGADeepLearning accelerationsuite
Pre-compiledGraphArchitecture ExampleTopologies
DDR
DDR
DDR
DDR
Configuration
Engine
AlexNet GoogleNet Tiny Yolo
SqueezeNetVGG16 ResNet 18
…*
ResNet 50ResNet 101
Memory
Reader
/Writer
Crossbar
CUST
OM*
PRIM
Conv
PE Array
Feature Map Cache
*Deeper customization options
COMING SOON!
PRIM PRIM
*More topologies added with every release
MobileNet ResNetSSD
SqueezeNet
SDD
13. ScaleYourInnovation 13
OpenvinoTM toolkitforintelfpgas
Anall-in-onesolutiontoeasily
harnessthebenefitsofFPGAs
▪ Enables developers and data scientists to take
their prototype application to production
▪ Utilize API-based & direct coding to maximize
performance
▪ Deeper customization capabilities coming
soon
OpenVINO™ Toolkit
IntelDeepLearning
DeploymentToolkit
Inference
Engine
Model
Optimizer
Intel FPGA DL
Acceleration Suite
TODAY’S INTEL FPGA
SUPPORTED
DEEP LEARNING FRAMEWORKS
Intel
Xeon®
Processor
Intel
FPGAHeterogeneous
CPU/FPGA
Deployment
Free Download
software.intel.com/openvino-toolkit
14. ScaleYourInnovation 14
Yourapplicationaccelerationwithfpgapoweredplatforms
*Please contact Intel representative for complete list of ODM manufacturers. Other names and brands may be claimed as the property of others.
INTERFACE
CURRENTLY MANUFACTURED
BY*
Mustang F-100
PCIe x8
Develop NN Model; Deploy across Intel® CPU, GPU, VPU, FPGA; Leverage common algorithms
SOFTWARE
TOOLS
SUPPORTED
PLATFORMS FOR
FPGA
Intel Programmable
Acceleration Card with
Intel Arria 10
PCIe x8
Intel® Arria® 10
Development Kit
PCIe x8
INTEL® INTEL®
Openvino™toolkit
15. ScaleYourInnovation 15
Usecase1:search
Solution Search
Looking for a quick path to deploy and accelerate instant
reverse image searches of products for retail convenience
Solution Success
Intel® FPGAs offered real-time AI inferencing using OpenVINO™
toolkit. This enabled engineers to map neural networks to FPGA,
accelerating image searches with increased throughput and lower
latency, all without the need for FPGA programming experience
Real-timeaioptimizedforperformance,powerandcost
OpenVINO™ Toolkit
Accelerating workloads,
enabling deep learning
capabilities for smarter and
faster ways to transform data
for competitive edge
Intel Programmable
Acceleration Card with
Intel Arria® 10 FPGA
Deployment ready PCIe-
based card with versatile
built-in multifunction
acceleration capabilities with
low-power dissipation and
low-profile form factor
Acceleration stack for
Intel® Xeon® CPU with
FPGAs
Abstracting programming
complexity and maximizing
ease of use by hot-swapping
accelerators and enabling
application portability for
Intel FPGA based
acceleration solutions
16. ScaleYourInnovation 16
UseCase2:Microsoft’sAIforEarth
Microsoft leverages the multimode
capabilities of Intel FPGAs to push through
the memory wall to maximize performance
Project Brainwave with Intel®
Stratix® 10 gives Performance/$
only $42 of compute*
200M Images, 20TB
Land cover mapping for the whole US
10+ minutes
*Microsoft’s Blog
17. ScaleYourInnovation 17
Summary
Delivering AI+ for Flexible system
level functionality
First to market to accelerate
evolving AI workloads
▪ OpenVINO™ Toolkit is free to download and enables you to deploy on Intel
FPGAs directly from TensorFlow or Caffe
▪ Intel’s FPGA architecture enables programmable datapath, custom
memory structure and configurable compute
INTELFPGASENABLE
18. ScaleYourInnovation 18
resources
Intel FPGA Training
https://www.intel.com/content/www/us/en/programmable/support/training/overview.html
Get started quickly with:
▪ Find out more online at ww w.intel.com/ai and www.intel.com/fpga
▪ Intel Tech.Decoded online webinars, tool
how-tos & quick tips
▪ Hands-on in-person events
Support
▪ Connect with Intel engineers & AI experts via the public Community Forum
Download
Free OPENVINO™ toolkit