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Logic Mind Technologies
Vijayangar (Near Maruthi Medicals), Bangalore-40
Ph: 8123668124 // 8123668066
A Generalized Algorithm and Reconfigurable
Architecture for Efficient and Scalable
Orthogonal Approximation of DCT
Abstract—Approximation of discrete cosine transform (DCT) is useful for
reducing its computational complexity without significant impact on its coding
performance. Most of the existing algorithms for approximation of the DCT target
only the DCT of small transform lengths, and some of them are non-
orthogonal.This paper presents a generalized recursive algorithm to obtain
orthogonal approximation of DCT where an approximate DCT of length could be
derived from a pair of DCTs of lengthat the cost of additions for input
preprocessing. We perform recursive sparse matrix decomposition and make use of
the symmetries of DCT basis vectors for deriving the proposedapproximation
algorithm. Proposed algorithm is highly scalablefor hardware as well as software
implementation of DCT of higherlengths, and it can make use of the existing
approximation of 8-point DCT to obtain approximate DCT of any power of two
length, .We demonstrate that the proposed approximationof DCT provides
comparable or better image and video compression performance than the existing
approximation methods. It is shown that proposed algorithm involves lower
arithmetic complexity compared with the other existing approximation algorithms.
We have presented a fully scalable reconfigurable parallel architecture for the
computation of approximate DCT based on the proposed algorithm. One uniquely
interesting feature of the proposed design is that it could be configured for the
computation of a 32-point DCT or for parallel computation of two 16-point DCTs
or four 8-point DCTs with a marginal control overhead. The proposed architecture
is found to offer many advantages in terms of hardware complexity, regularity and
modularity. Experimental results obtained from FPGA implementation show the
advantage of the proposed method.
SOFTWARE REQUIREMENT:
 ModelSim6.4c.
 Xilinx 9.1/13.2.
HARDWARE REQUIREMENT:
 FPGA Spartan 3.
PROJECT FLOW:
First Review:
Literature Survey
Paper Explanation
Design of Project
Project Enhancement explanation
Second Review:
Implementing 40% of Base Paper
Third Review
Implementing Remaining 60% of Base Paper with Future Enhancement (Modification)
For More Details please contact
Logic Mind Technologies
Vijayangar (NearMaruthi Medicals), Bangalore-40
Ph: 8123668124 // 8123668066
Mail: logicmindtech@gmail.com

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A generalized algorithm and reconfigurable

  • 1. Logic Mind Technologies Vijayangar (Near Maruthi Medicals), Bangalore-40 Ph: 8123668124 // 8123668066 A Generalized Algorithm and Reconfigurable Architecture for Efficient and Scalable Orthogonal Approximation of DCT Abstract—Approximation of discrete cosine transform (DCT) is useful for reducing its computational complexity without significant impact on its coding performance. Most of the existing algorithms for approximation of the DCT target only the DCT of small transform lengths, and some of them are non- orthogonal.This paper presents a generalized recursive algorithm to obtain orthogonal approximation of DCT where an approximate DCT of length could be derived from a pair of DCTs of lengthat the cost of additions for input preprocessing. We perform recursive sparse matrix decomposition and make use of the symmetries of DCT basis vectors for deriving the proposedapproximation algorithm. Proposed algorithm is highly scalablefor hardware as well as software implementation of DCT of higherlengths, and it can make use of the existing approximation of 8-point DCT to obtain approximate DCT of any power of two length, .We demonstrate that the proposed approximationof DCT provides comparable or better image and video compression performance than the existing approximation methods. It is shown that proposed algorithm involves lower arithmetic complexity compared with the other existing approximation algorithms. We have presented a fully scalable reconfigurable parallel architecture for the computation of approximate DCT based on the proposed algorithm. One uniquely interesting feature of the proposed design is that it could be configured for the
  • 2. computation of a 32-point DCT or for parallel computation of two 16-point DCTs or four 8-point DCTs with a marginal control overhead. The proposed architecture is found to offer many advantages in terms of hardware complexity, regularity and modularity. Experimental results obtained from FPGA implementation show the advantage of the proposed method. SOFTWARE REQUIREMENT:  ModelSim6.4c.  Xilinx 9.1/13.2. HARDWARE REQUIREMENT:  FPGA Spartan 3. PROJECT FLOW: First Review: Literature Survey Paper Explanation Design of Project Project Enhancement explanation Second Review: Implementing 40% of Base Paper Third Review Implementing Remaining 60% of Base Paper with Future Enhancement (Modification) For More Details please contact Logic Mind Technologies Vijayangar (NearMaruthi Medicals), Bangalore-40 Ph: 8123668124 // 8123668066 Mail: logicmindtech@gmail.com