Multilevel inverter offers many benefits for high power application compavered to conventional cascaded Multilevel Inverter topology.This paper presents Symmetric CMLI using variable frequency carrier based pulse width modulation techniques. The proposed topology reduces total harmonic distortion and reduced switching losses for seven level inverter. The simulation study of the proposed topology has been carried out in MATLAB/SIMULINK. The main objective of this paper is to achieve number of levels of MLI with reduced number of switches and DC power sources compared to conventional topology.
Prof. Cuk invited talk at APEC 2011 plenary session to celebrate
35 years of his creation of this modeling and analysis method.
This talk was also recorded on video by IEEE.tv and can be viewed together. Here is a link to that video.
https://youtu.be/BLx57J2fF5w
Note: first few minutes of the video is Prof. Cuk's interview made after his presentation. This is thern followed by full 25 minutes presentation, which can be followed by the enclosed 67 slides.
In high power DC applications, the single-phase DC-DC converter will face large voltage and current stress in each control switch and thereby the power handling capacity is less. To overcome this problem, three-phase DC-DC converter is used and it is suitable for high power applications with reduced number of switches as compared with the conventional topologies. The asymmetrical duty cycle control is considered to operate the switches under soft switching and hence the switching losses are reduced. The transformer leakage inductances are used along with junction capacitances in order to form resonance and hence ZVS commutation is possible in a wider load range. The modified phase shift control method is used for the proposed converter.The operational modes and design equations of the proposed converter have been observed. The simulation is carried out with a load of 1000W for validating the proposed work.
A dc-dc zeta converter is a switch mode dc-dc converter that can either step-up or step-down dc input voltage. In order to regulate the dc output voltage, a control subsystem needs to be deployed for the dc-dc zeta converter. This paper presents the dc-dc zeta converter control. Unlike conventional dc-dc zeta converter control which produces a controller based on the nominal value model, we propose a convex polytope model of the dc-dc zeta converter which takes into account parameter uncertainty. A linear matrix inequality (LMI) is formulated based on the linear quadratic regulator (LQR) problem to find the state-feedback controller for the convex polytope model. Simulation results are presented to compare the control performance between the conventional LQR and the proposed LMI based controller on the dc-dc zeta converter. Furthermore, the reduction technique of the convex polytope is proposed and its effect is investigated.
Comparison of PI and PID Controlled Bidirectional DC-DC Converter SystemsIJPEDS-IAES
This paper deals with comparison of responses of the PI and the PID
controlled bidirectional DC-DC converter systems. A coupled inductor is
used in the present work to produce high gain. Open loop and closed loop
controlled systems with PI and PID controllers are designed and simulated
using Matlab tool. The principles of operation and simulation case studies are
discussed in detail. The comparison is made in terms of rise time, fall time,
peak overshoot and steady state error.
Fuzzy Control Based Quadrupler Boost ConverterIJSRD
A voltage quadruple boost converter is presented. This converter is used to obtain higher voltage gain and reduces the voltage stress across the switches and diodes. These voltage multipliers are used in high voltage, low current applications such as for accelerating purpose in a cathode ray tube and also this converter topology is advanced than previous dc-dc converters. Voltage quadruple converter uses parallel-input series-output connection. Comparing with two phase interleaved boost converter one can see that two more capacitors and two more diodes are added so that during the energy transfer period partial inductor stored energy is stored in one capacitor and partial inductor stored energy together with the other capacitor store energy is transferred to the output to achieve much higher voltage gain. However, the proposed voltage gain is twice that of the interleaved two-phase boost converter. Simulation of the converter is carried out using MATLAB/SIMULINK software. The converter is simulated using fuzzy logic control and also the experimental setup was done.
A Low Cost Single-Switch Bridgeless Boost PFC ConverterIJPEDS-IAES
This paper proposes the single-switch bridgeless boost power factor correction (PFC) converter to achieve high efficiency in low cost. The proposed converter utilizes only one active switching device forPFC operation as well as expecting higher efficiency than typical boost PFC converters. On the other hand, the implementation cost is less than traditional bridgeless boost PFC converters, in where two active switching deivces are necessary. The operational principle, the modeling, and the control scheme of the proposed converter arediscussed in detail. In order to verify the operation of the proposed converter, a 500W switching model is built in PSIM software package. The simulation results show that the proposed converter perfectly achieves PFC operation with only a single active switch.
This paper proposes a non-isolated three port SEPIC converter for stand-alone photovoltaic applications. The proposed topology uses the Single Input Multi Output (SIMO) structure. This topology consists of a single photovoltaic source as input and it is a unidirectional power converter. Mathematical analysis for the proposed system is performed and simulations are carried out using MATLAB/Simulink. The design parameters of capacitors and inductors are calculated from small ripple analysis. The simulation analysis for the proposed open loop topology is verified using a real time hardware setup.The entire process is carried out in Continuous Current Mode (CCM) of operation. The experimental results for hardware are verified with simulations and compared.
Multilevel inverters have become popular among high power converters for the past few years due to their high quality output waveform and low total harmonic distortions (THD). In addition, the filter size also reduces significantly to achieve a pure sine wave output. Cascaded H-Bridge topology has been recognized as the most promising among various classical topologies for multi-level inverters on the basis of its modular form and ease of design, troubleshooting, packaging and high power capabilities. However, a large number of switches are required in cascaded H-Bridge multilevel inverter that leads to larger system losses and an increase in cost. In this paper the modified cascaded topology is proposed to reduce the number of controlled switches without affecting the resolution of output waveform or the number of voltage levels. We achieved this by replacing some of the high cost controlled transistor switches with diodes, in the cascaded H-Bridges. Furthermore, equal voltage source sharing is also possible by using the proposed topology. Hence the proposed inverter is a type of cascaded multilevel inverter with reduced switches, better modular structure, low cost and high efficiency. The inverter design is validated using simulations and tested on hardware prototype.
Prof. Cuk invited talk at APEC 2011 plenary session to celebrate
35 years of his creation of this modeling and analysis method.
This talk was also recorded on video by IEEE.tv and can be viewed together. Here is a link to that video.
https://youtu.be/BLx57J2fF5w
Note: first few minutes of the video is Prof. Cuk's interview made after his presentation. This is thern followed by full 25 minutes presentation, which can be followed by the enclosed 67 slides.
In high power DC applications, the single-phase DC-DC converter will face large voltage and current stress in each control switch and thereby the power handling capacity is less. To overcome this problem, three-phase DC-DC converter is used and it is suitable for high power applications with reduced number of switches as compared with the conventional topologies. The asymmetrical duty cycle control is considered to operate the switches under soft switching and hence the switching losses are reduced. The transformer leakage inductances are used along with junction capacitances in order to form resonance and hence ZVS commutation is possible in a wider load range. The modified phase shift control method is used for the proposed converter.The operational modes and design equations of the proposed converter have been observed. The simulation is carried out with a load of 1000W for validating the proposed work.
A dc-dc zeta converter is a switch mode dc-dc converter that can either step-up or step-down dc input voltage. In order to regulate the dc output voltage, a control subsystem needs to be deployed for the dc-dc zeta converter. This paper presents the dc-dc zeta converter control. Unlike conventional dc-dc zeta converter control which produces a controller based on the nominal value model, we propose a convex polytope model of the dc-dc zeta converter which takes into account parameter uncertainty. A linear matrix inequality (LMI) is formulated based on the linear quadratic regulator (LQR) problem to find the state-feedback controller for the convex polytope model. Simulation results are presented to compare the control performance between the conventional LQR and the proposed LMI based controller on the dc-dc zeta converter. Furthermore, the reduction technique of the convex polytope is proposed and its effect is investigated.
Comparison of PI and PID Controlled Bidirectional DC-DC Converter SystemsIJPEDS-IAES
This paper deals with comparison of responses of the PI and the PID
controlled bidirectional DC-DC converter systems. A coupled inductor is
used in the present work to produce high gain. Open loop and closed loop
controlled systems with PI and PID controllers are designed and simulated
using Matlab tool. The principles of operation and simulation case studies are
discussed in detail. The comparison is made in terms of rise time, fall time,
peak overshoot and steady state error.
Fuzzy Control Based Quadrupler Boost ConverterIJSRD
A voltage quadruple boost converter is presented. This converter is used to obtain higher voltage gain and reduces the voltage stress across the switches and diodes. These voltage multipliers are used in high voltage, low current applications such as for accelerating purpose in a cathode ray tube and also this converter topology is advanced than previous dc-dc converters. Voltage quadruple converter uses parallel-input series-output connection. Comparing with two phase interleaved boost converter one can see that two more capacitors and two more diodes are added so that during the energy transfer period partial inductor stored energy is stored in one capacitor and partial inductor stored energy together with the other capacitor store energy is transferred to the output to achieve much higher voltage gain. However, the proposed voltage gain is twice that of the interleaved two-phase boost converter. Simulation of the converter is carried out using MATLAB/SIMULINK software. The converter is simulated using fuzzy logic control and also the experimental setup was done.
A Low Cost Single-Switch Bridgeless Boost PFC ConverterIJPEDS-IAES
This paper proposes the single-switch bridgeless boost power factor correction (PFC) converter to achieve high efficiency in low cost. The proposed converter utilizes only one active switching device forPFC operation as well as expecting higher efficiency than typical boost PFC converters. On the other hand, the implementation cost is less than traditional bridgeless boost PFC converters, in where two active switching deivces are necessary. The operational principle, the modeling, and the control scheme of the proposed converter arediscussed in detail. In order to verify the operation of the proposed converter, a 500W switching model is built in PSIM software package. The simulation results show that the proposed converter perfectly achieves PFC operation with only a single active switch.
This paper proposes a non-isolated three port SEPIC converter for stand-alone photovoltaic applications. The proposed topology uses the Single Input Multi Output (SIMO) structure. This topology consists of a single photovoltaic source as input and it is a unidirectional power converter. Mathematical analysis for the proposed system is performed and simulations are carried out using MATLAB/Simulink. The design parameters of capacitors and inductors are calculated from small ripple analysis. The simulation analysis for the proposed open loop topology is verified using a real time hardware setup.The entire process is carried out in Continuous Current Mode (CCM) of operation. The experimental results for hardware are verified with simulations and compared.
Multilevel inverters have become popular among high power converters for the past few years due to their high quality output waveform and low total harmonic distortions (THD). In addition, the filter size also reduces significantly to achieve a pure sine wave output. Cascaded H-Bridge topology has been recognized as the most promising among various classical topologies for multi-level inverters on the basis of its modular form and ease of design, troubleshooting, packaging and high power capabilities. However, a large number of switches are required in cascaded H-Bridge multilevel inverter that leads to larger system losses and an increase in cost. In this paper the modified cascaded topology is proposed to reduce the number of controlled switches without affecting the resolution of output waveform or the number of voltage levels. We achieved this by replacing some of the high cost controlled transistor switches with diodes, in the cascaded H-Bridges. Furthermore, equal voltage source sharing is also possible by using the proposed topology. Hence the proposed inverter is a type of cascaded multilevel inverter with reduced switches, better modular structure, low cost and high efficiency. The inverter design is validated using simulations and tested on hardware prototype.
Cascaded H-Bridge Multilevel Inverter Using SPWM and MSPWM StrategiesIJERA Editor
Nowadays, the multilevel inverter is growing hugely in medium voltage-high power applications. It produces staircase output voltage near sinusoidal waveform. The multilevel inverter is as compared to a two level inverter has high output voltage at high switching frequency , less EMI (electro-magnetic interference), lower THD (total harmonics distortion), low voltage stress (dv/dt) and it reduces the size of the filter components. In this paper various techniques cascaded H-bridges inverter are designed and implemented. Single phase sinusoidal pulse width modulation (SPWM) and modified sinusoidal pulse width modulation (MSPWM) topologies of (three, five and seven) levels inverters are designed and implemented. The results in percentage value of THD before and after filter are compared. The simulink/matlab and proteus are used to simulate the systems and finally, result are obtained experimentally using microcontroller (arduino mega 2560). When the number of levels is increased using SPWM technique the THD reduced, THD improves in MSPWM technique too, and comparison table II illustrated that.
Analysis of 7-Level Cascaded & MLDCLI with Sinusoidal PWM & Modified Referenc...IJMTST Journal
Multilevel inverter offers several advantages compare to the conventional three phase bridge inverter in terms of lower dv/dt stresses, lower electromagnetic compatibility and better THD features. The primary use of DC to AC conversion & speed control of machines also voltage controller and reduce the harmonics in the levels of inverter by using cascade multilevel inverter. This paper presents a comparison of cascaded and multilevel dc link inverter (MLDCLI) Using only a DC power source and capacitors. A MLDCLI can be constructed by the series connection half and full bridge cells each having its own DC source .A multilevel voltage source inverter can be formed by connecting an MLDCL with a single bridge inverter. The MLDCL provides a DC voltage with the shape of a staircase with or without pulse width modulation (PWM) to the bridge inverter, which in turn alternates the polarity to produce an AC voltage. compared with the cascaded multilevel inverter, The MLDCLI can significantly reduce the switch count as the number of voltage levels increases beyond five for a given number of voltage levels , m , the required number of active switches is 2(m -1) for the existing multilevel inverter but is m+3 for the MLDCL inverters.
This paper presents the performance of a seven level cascaded multilevel inverter &MLDCLI Based on a sinusoidalPWM and modified Reference PWM control techniques. Performance analysis is made based on the results of simulation study conducted on the operation of the cascaded & MLDCLI using MATLAB/SIMULINK. The performance parameters chosen in the work include the waveform pattern harmonic spectrum, fundamental value & total harmonic distortion (THD) of the three phase cascaded H-Bridge MLI & MLDCLI.
New Two Simple Sinusoidal Generators with Four 45 Phase Shifted Voltage Outp...IJECEIAES
Two new 45 o phase shifted sinusoidal oscillator configurations employing single Second Generation Fully Differential Current Conveyor (FDCCII), two grounded capacitors and two grounded resistors are presented. The proposed oscillators can provide four sinusoidal voltage outputs with each a 45 o phase difference. These circuits can also be utilized as voltage-mode quadrature oscillators. Additional output stages incorporation in FDCCII can also result in current outputs spaced 45 degree apart. The proposed circuits enjoy the simplicity and less passive and active component. The Total Harmonic Distortion (THD) of the output waveforms was reasonability values (less than 4.5%). The circuits can supply two equi-quadrature outputs and the Lissajous patterns confirm the quadrature voltage output waveforms. The workability of the circuits is simulated by PSPICE 0.18 µm CMOS technology. The non-ideal analysis and simulation results verifying theoretical analyses are also investigated.
Multilevel inverters offers less distortion and less electro-magnetic interference compared with other conventional inverters and hence, it can be used in many industrial and commercial applications. This paper analyze the performance of the modified single phase seven level symmetrical inverter using minimum number of switches. The proposed topology consists of six switches and two dc sources, and produces seven level output voltage waveform during symmetric operation. The cost and size of the propsoed inverter minimum as it uses minimum number of components, The performance of the proposed multilevel inverter is analysed for different switching angles and the corresponding simulation results are presented. The simulation of the proposed inverter is carried out using MATLAB/Simulink software.
Asymmetrical Nine-level Inverter Topology with Reduce Power Semicondutor DevicesTELKOMNIKA JOURNAL
In this paper a new single-phase multilevel inverter topology is presented. Proposed topology is
capable of producing nine-level output voltage with reduce device counts. It can be achieved by arranging
available switches and dc sources in a fashion such that the maximum combination of addition and
subtraction of the input dc sources can be obtained. To verify the viability of the proposed topology, the
circuit model is developed and simulated in Matlab-Simulink software. Experimental testing results of the
proposed nine-level inverter topology, developed in the laboratory, are presented. A low frequency
switching strategy is employed in this work. The results show that the proposed topology is capable to
produce a nine-level output voltage, capable in handling inductive load and yields acceptable harmonic
distortion content.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Soft Computing Technique for the Control of Triple-Lift Luo ConverterIJERA Editor
Positive output Luo converters are a series of new DC-DC step-up (boost) converters, which were developed from prototypes using voltage lift technique. These converters perform positive to positive DC-DC voltage increasing conversion with high power density, high efficiency and cheap topology in simple structure. They are different from other existing DC-DC step-up converters with a high output voltage and small ripples. Triple lift LUO circuit is derived from positive output elementary Luo converter by adding the lift circuit three times. Due to the time varying and switching nature of the Luo converters, their dynamic behaviour becomes highly nonlinear. The classical control methods employed to design the controllers for Luo converters depend on the operating point so that it is very difficult to select control parameters because of the presence of parasitic elements, time varying loads and variable supply voltages. Conventional controllers require a good knowledge of the system and accurate tuning in order to obtain the desired performances. A fuzzy logic controller is a soft computing technique which neither requires a precise mathematical model of the system nor complex computations. The performances of the Triple-lift Luo converter with fuzzy logic controller are evaluated under line and load disturbances using Matlab-Simulink based simulation. The results are presented and analyzed.
Research Inventy : International Journal of Engineering and Science is published by the group of young academic and industrial researchers with 12 Issues per year. It is an online as well as print version open access journal that provides rapid publication (monthly) of articles in all areas of the subject such as: civil, mechanical, chemical, electronic and computer engineering as well as production and information technology. The Journal welcomes the submission of manuscripts that meet the general criteria of significance and scientific excellence. Papers will be published by rapid process within 20 days after acceptance and peer review process takes only 7 days. All articles published in Research Inventy will be peer-reviewed.
Multilevel inverters (MLI) are becoming more popular over the years for medium and high power applications because of its significant merits over two level inverters. This paper presents an implementation of multicarrier based sinusoidal pulse width modulation technique for three phase seven level diode clamped multilevel inverter. This topology is operated under phase opposition disposition pulse width modulation technique. The performance of three phase seven level diode clamped inverter is analyzed for induction motor (IM) load. Simulation is performed using MATLAB/SIMULINK. Experimental results are presented to validate the effectiveness of the operation of the diode clamped multilevel inverter using field programmable gate array.
Power quality improvement using impedance network based invertereSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
Comparative Steady State Analysis of Boost and Cascaded Boost Converter with ...IAES-IJPEDS
In this paper, an overall comparison between the Boost Converter (BC) &
Cascaded Converter/ Cascaded Boost Converter (CBC) has been depicted in
terms of ideal condition, as well as with the consideration of Equivalent
Series Resistance (ESR) of inductor(s). The loss comparison in the two
converters due to the ESR is also included in this paper. It can be seen that in
CBC, voltage gain is more but the power loss due to ESR is also more
compared to BC. The parameters of the converters are derived with a
consideration of per unit ripple quantity of inductor current and capacitor
voltage. A boundary condition between the continuous conduction mode
(CCM) & discontinuous conduction mode (DCM) of the inductor current is
also shown. The behaviour of the capacitor current for the converters is
discussed during ON and OFF condition of the switch(es) during DCM. At
the end, the simulation results of both the converters are given for a
20V/100V, 100 W output. The analysis and simulation results are presented
in this paper for the verification of the feasibility.
A New Multilevel Inverter Structure For High-Power Applications using Multi-c...IJPEDS-IAES
In recent, several numbers of multilevel inverter structures have been
introduced that the numbers of circuit devices have been reduced. This paper
introduces a new structure for multilevel inverter which can be used in highpower
applications. The proposed topology is based on cascaded connection
of basic units. This topology consists of minimum number of circuit
components such as IGBT, gate driver circuit and antiparallel diode. For
proposed topology, two methods are presented for determination of dc
voltage sources values. Multi-carrier PWM method for 25-level proposed
topology is used. Verification of the analytical results is done using
MATLAB simulation.
Novel Single Phase Full Bridge Inverter Formed by Floating CapacitorsIAES-IJPEDS
In this paper, a new single-phase bridge inverter is described which can
generate a more steps of voltage levels with reduced number of switches,
gate driver circuits and diodes as compare to normal multilevel inverter.
Another feature of this inverter is its ability to prodeuce the voltages from a
single dc-link power supply which enables back-to-back operation of
converter. The proposed method with more number of levels can improve
power quality, lower switching losses and produce high quality voltage
waveforms. Moreover at all load power factors the proposed method can be
operated.The research of the model is done by means of computer simulation
with the software MATLAB/SIMULINK. This topology has very low
common mode voltage variation and dv/dt stress. Also this inverter is help
full for reactive power compensation.
A three level quasi-two-stage single-phase pfc converter with flexible output...LeMeniz Infotech
A three level quasi-two-stage single-phase pfc converter with flexible output voltage and improved conversion efficiency
To Get this projects Call : 9566355386 / 99625 88976
Visit : www.lemenizinfotech.com / www.ieeemaster.com
Mail : projects@lemenizinfotech.com
A New Multilevel Inverter with Reduced Number of SwitchesIAES-IJPEDS
In recent day’s Multilevel inverter (MLI) technologies become a incredibly main choice in the area of high power medium voltage energy control. Though multilevel inverter has a number of advantages it has drawbacks in the vein of higher levels because of using more number of semiconductor switches. This may leads to vast size and price of the inverter is very high. So in order to overcome this problem the new multilevel inverter is proposed with reduced number of switches. The proposed method is well suited for a high power application and it built with three Dc sources and six Switches. Multi carrier pwm technique is used for sine wave generation. The results are validated through the harmonic spectrum of the FFT window by using Matlab/simulink. The result of the proposed MLI is compared with the conventional MLI and other seven level existing topologies.
FPGA Based Design and Validation of Asymmetrical Reduced Switch Multilevel In...IJPEDS-IAES
This paper proposes a new Asymmetrical multilevel inverter topology with
reduced number of switches. This topology is superior to the existing
multilevel inverter (MLI) configurations in terms of lower total harmonic
distortion (THD) value and lower cost. The idea incorporates a new module
setup comprising of four different voltage sources having voltage output
levels in a specific ratio. The proposed topology uses a novel pulse width
modulation (PWM) technique (as presented) to control the gating pulses. The
operation is simulated using MATLAB/SIMULINK and its results are
validated through FPGA Spartan 3 based hardware prototype inverter (using
three voltage sources to produce a 7 level output, which may be extended to
15 level). The circuit complexity is drastically reduced and it is suitable for
medium and high power applications. THD for the output is quite low when
compared with the conventional inverter.This paper proposes a new Asymmetrical multilevel inverter topology with
reduced number of switches. This topology is superior to the existing
multilevel inverter (MLI) configurations in terms of lower total harmonic
distortion (THD) value and lower cost. The idea incorporates a new module
setup comprising of four different voltage sources having voltage output
levels in a specific ratio. The proposed topology uses a novel pulse width
modulation (PWM) technique (as presented) to control the gating pulses. The
operation is simulated using MATLAB/SIMULINK and its results are
validated through FPGA Spartan 3 based hardware prototype inverter (using
three voltage sources to produce a 7 level output, which may be extended to
15 level). The circuit complexity is drastically reduced and it is suitable for
medium and high power applications. THD for the output is quite low when
compared with the conventional inverter.
Cascaded H-Bridge Multilevel Inverter Using SPWM and MSPWM StrategiesIJERA Editor
Nowadays, the multilevel inverter is growing hugely in medium voltage-high power applications. It produces staircase output voltage near sinusoidal waveform. The multilevel inverter is as compared to a two level inverter has high output voltage at high switching frequency , less EMI (electro-magnetic interference), lower THD (total harmonics distortion), low voltage stress (dv/dt) and it reduces the size of the filter components. In this paper various techniques cascaded H-bridges inverter are designed and implemented. Single phase sinusoidal pulse width modulation (SPWM) and modified sinusoidal pulse width modulation (MSPWM) topologies of (three, five and seven) levels inverters are designed and implemented. The results in percentage value of THD before and after filter are compared. The simulink/matlab and proteus are used to simulate the systems and finally, result are obtained experimentally using microcontroller (arduino mega 2560). When the number of levels is increased using SPWM technique the THD reduced, THD improves in MSPWM technique too, and comparison table II illustrated that.
Analysis of 7-Level Cascaded & MLDCLI with Sinusoidal PWM & Modified Referenc...IJMTST Journal
Multilevel inverter offers several advantages compare to the conventional three phase bridge inverter in terms of lower dv/dt stresses, lower electromagnetic compatibility and better THD features. The primary use of DC to AC conversion & speed control of machines also voltage controller and reduce the harmonics in the levels of inverter by using cascade multilevel inverter. This paper presents a comparison of cascaded and multilevel dc link inverter (MLDCLI) Using only a DC power source and capacitors. A MLDCLI can be constructed by the series connection half and full bridge cells each having its own DC source .A multilevel voltage source inverter can be formed by connecting an MLDCL with a single bridge inverter. The MLDCL provides a DC voltage with the shape of a staircase with or without pulse width modulation (PWM) to the bridge inverter, which in turn alternates the polarity to produce an AC voltage. compared with the cascaded multilevel inverter, The MLDCLI can significantly reduce the switch count as the number of voltage levels increases beyond five for a given number of voltage levels , m , the required number of active switches is 2(m -1) for the existing multilevel inverter but is m+3 for the MLDCL inverters.
This paper presents the performance of a seven level cascaded multilevel inverter &MLDCLI Based on a sinusoidalPWM and modified Reference PWM control techniques. Performance analysis is made based on the results of simulation study conducted on the operation of the cascaded & MLDCLI using MATLAB/SIMULINK. The performance parameters chosen in the work include the waveform pattern harmonic spectrum, fundamental value & total harmonic distortion (THD) of the three phase cascaded H-Bridge MLI & MLDCLI.
New Two Simple Sinusoidal Generators with Four 45 Phase Shifted Voltage Outp...IJECEIAES
Two new 45 o phase shifted sinusoidal oscillator configurations employing single Second Generation Fully Differential Current Conveyor (FDCCII), two grounded capacitors and two grounded resistors are presented. The proposed oscillators can provide four sinusoidal voltage outputs with each a 45 o phase difference. These circuits can also be utilized as voltage-mode quadrature oscillators. Additional output stages incorporation in FDCCII can also result in current outputs spaced 45 degree apart. The proposed circuits enjoy the simplicity and less passive and active component. The Total Harmonic Distortion (THD) of the output waveforms was reasonability values (less than 4.5%). The circuits can supply two equi-quadrature outputs and the Lissajous patterns confirm the quadrature voltage output waveforms. The workability of the circuits is simulated by PSPICE 0.18 µm CMOS technology. The non-ideal analysis and simulation results verifying theoretical analyses are also investigated.
Multilevel inverters offers less distortion and less electro-magnetic interference compared with other conventional inverters and hence, it can be used in many industrial and commercial applications. This paper analyze the performance of the modified single phase seven level symmetrical inverter using minimum number of switches. The proposed topology consists of six switches and two dc sources, and produces seven level output voltage waveform during symmetric operation. The cost and size of the propsoed inverter minimum as it uses minimum number of components, The performance of the proposed multilevel inverter is analysed for different switching angles and the corresponding simulation results are presented. The simulation of the proposed inverter is carried out using MATLAB/Simulink software.
Asymmetrical Nine-level Inverter Topology with Reduce Power Semicondutor DevicesTELKOMNIKA JOURNAL
In this paper a new single-phase multilevel inverter topology is presented. Proposed topology is
capable of producing nine-level output voltage with reduce device counts. It can be achieved by arranging
available switches and dc sources in a fashion such that the maximum combination of addition and
subtraction of the input dc sources can be obtained. To verify the viability of the proposed topology, the
circuit model is developed and simulated in Matlab-Simulink software. Experimental testing results of the
proposed nine-level inverter topology, developed in the laboratory, are presented. A low frequency
switching strategy is employed in this work. The results show that the proposed topology is capable to
produce a nine-level output voltage, capable in handling inductive load and yields acceptable harmonic
distortion content.
International Journal of Engineering Research and Applications (IJERA) is an open access online peer reviewed international journal that publishes research and review articles in the fields of Computer Science, Neural Networks, Electrical Engineering, Software Engineering, Information Technology, Mechanical Engineering, Chemical Engineering, Plastic Engineering, Food Technology, Textile Engineering, Nano Technology & science, Power Electronics, Electronics & Communication Engineering, Computational mathematics, Image processing, Civil Engineering, Structural Engineering, Environmental Engineering, VLSI Testing & Low Power VLSI Design etc.
Soft Computing Technique for the Control of Triple-Lift Luo ConverterIJERA Editor
Positive output Luo converters are a series of new DC-DC step-up (boost) converters, which were developed from prototypes using voltage lift technique. These converters perform positive to positive DC-DC voltage increasing conversion with high power density, high efficiency and cheap topology in simple structure. They are different from other existing DC-DC step-up converters with a high output voltage and small ripples. Triple lift LUO circuit is derived from positive output elementary Luo converter by adding the lift circuit three times. Due to the time varying and switching nature of the Luo converters, their dynamic behaviour becomes highly nonlinear. The classical control methods employed to design the controllers for Luo converters depend on the operating point so that it is very difficult to select control parameters because of the presence of parasitic elements, time varying loads and variable supply voltages. Conventional controllers require a good knowledge of the system and accurate tuning in order to obtain the desired performances. A fuzzy logic controller is a soft computing technique which neither requires a precise mathematical model of the system nor complex computations. The performances of the Triple-lift Luo converter with fuzzy logic controller are evaluated under line and load disturbances using Matlab-Simulink based simulation. The results are presented and analyzed.
Research Inventy : International Journal of Engineering and Science is published by the group of young academic and industrial researchers with 12 Issues per year. It is an online as well as print version open access journal that provides rapid publication (monthly) of articles in all areas of the subject such as: civil, mechanical, chemical, electronic and computer engineering as well as production and information technology. The Journal welcomes the submission of manuscripts that meet the general criteria of significance and scientific excellence. Papers will be published by rapid process within 20 days after acceptance and peer review process takes only 7 days. All articles published in Research Inventy will be peer-reviewed.
Multilevel inverters (MLI) are becoming more popular over the years for medium and high power applications because of its significant merits over two level inverters. This paper presents an implementation of multicarrier based sinusoidal pulse width modulation technique for three phase seven level diode clamped multilevel inverter. This topology is operated under phase opposition disposition pulse width modulation technique. The performance of three phase seven level diode clamped inverter is analyzed for induction motor (IM) load. Simulation is performed using MATLAB/SIMULINK. Experimental results are presented to validate the effectiveness of the operation of the diode clamped multilevel inverter using field programmable gate array.
Power quality improvement using impedance network based invertereSAT Publishing House
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
Comparative Steady State Analysis of Boost and Cascaded Boost Converter with ...IAES-IJPEDS
In this paper, an overall comparison between the Boost Converter (BC) &
Cascaded Converter/ Cascaded Boost Converter (CBC) has been depicted in
terms of ideal condition, as well as with the consideration of Equivalent
Series Resistance (ESR) of inductor(s). The loss comparison in the two
converters due to the ESR is also included in this paper. It can be seen that in
CBC, voltage gain is more but the power loss due to ESR is also more
compared to BC. The parameters of the converters are derived with a
consideration of per unit ripple quantity of inductor current and capacitor
voltage. A boundary condition between the continuous conduction mode
(CCM) & discontinuous conduction mode (DCM) of the inductor current is
also shown. The behaviour of the capacitor current for the converters is
discussed during ON and OFF condition of the switch(es) during DCM. At
the end, the simulation results of both the converters are given for a
20V/100V, 100 W output. The analysis and simulation results are presented
in this paper for the verification of the feasibility.
A New Multilevel Inverter Structure For High-Power Applications using Multi-c...IJPEDS-IAES
In recent, several numbers of multilevel inverter structures have been
introduced that the numbers of circuit devices have been reduced. This paper
introduces a new structure for multilevel inverter which can be used in highpower
applications. The proposed topology is based on cascaded connection
of basic units. This topology consists of minimum number of circuit
components such as IGBT, gate driver circuit and antiparallel diode. For
proposed topology, two methods are presented for determination of dc
voltage sources values. Multi-carrier PWM method for 25-level proposed
topology is used. Verification of the analytical results is done using
MATLAB simulation.
Novel Single Phase Full Bridge Inverter Formed by Floating CapacitorsIAES-IJPEDS
In this paper, a new single-phase bridge inverter is described which can
generate a more steps of voltage levels with reduced number of switches,
gate driver circuits and diodes as compare to normal multilevel inverter.
Another feature of this inverter is its ability to prodeuce the voltages from a
single dc-link power supply which enables back-to-back operation of
converter. The proposed method with more number of levels can improve
power quality, lower switching losses and produce high quality voltage
waveforms. Moreover at all load power factors the proposed method can be
operated.The research of the model is done by means of computer simulation
with the software MATLAB/SIMULINK. This topology has very low
common mode voltage variation and dv/dt stress. Also this inverter is help
full for reactive power compensation.
A three level quasi-two-stage single-phase pfc converter with flexible output...LeMeniz Infotech
A three level quasi-two-stage single-phase pfc converter with flexible output voltage and improved conversion efficiency
To Get this projects Call : 9566355386 / 99625 88976
Visit : www.lemenizinfotech.com / www.ieeemaster.com
Mail : projects@lemenizinfotech.com
A New Multilevel Inverter with Reduced Number of SwitchesIAES-IJPEDS
In recent day’s Multilevel inverter (MLI) technologies become a incredibly main choice in the area of high power medium voltage energy control. Though multilevel inverter has a number of advantages it has drawbacks in the vein of higher levels because of using more number of semiconductor switches. This may leads to vast size and price of the inverter is very high. So in order to overcome this problem the new multilevel inverter is proposed with reduced number of switches. The proposed method is well suited for a high power application and it built with three Dc sources and six Switches. Multi carrier pwm technique is used for sine wave generation. The results are validated through the harmonic spectrum of the FFT window by using Matlab/simulink. The result of the proposed MLI is compared with the conventional MLI and other seven level existing topologies.
FPGA Based Design and Validation of Asymmetrical Reduced Switch Multilevel In...IJPEDS-IAES
This paper proposes a new Asymmetrical multilevel inverter topology with
reduced number of switches. This topology is superior to the existing
multilevel inverter (MLI) configurations in terms of lower total harmonic
distortion (THD) value and lower cost. The idea incorporates a new module
setup comprising of four different voltage sources having voltage output
levels in a specific ratio. The proposed topology uses a novel pulse width
modulation (PWM) technique (as presented) to control the gating pulses. The
operation is simulated using MATLAB/SIMULINK and its results are
validated through FPGA Spartan 3 based hardware prototype inverter (using
three voltage sources to produce a 7 level output, which may be extended to
15 level). The circuit complexity is drastically reduced and it is suitable for
medium and high power applications. THD for the output is quite low when
compared with the conventional inverter.This paper proposes a new Asymmetrical multilevel inverter topology with
reduced number of switches. This topology is superior to the existing
multilevel inverter (MLI) configurations in terms of lower total harmonic
distortion (THD) value and lower cost. The idea incorporates a new module
setup comprising of four different voltage sources having voltage output
levels in a specific ratio. The proposed topology uses a novel pulse width
modulation (PWM) technique (as presented) to control the gating pulses. The
operation is simulated using MATLAB/SIMULINK and its results are
validated through FPGA Spartan 3 based hardware prototype inverter (using
three voltage sources to produce a 7 level output, which may be extended to
15 level). The circuit complexity is drastically reduced and it is suitable for
medium and high power applications. THD for the output is quite low when
compared with the conventional inverter.
A Novel Topology of Multilevel Inverter with Reduced Number of Switches and D...IAES-IJPEDS
This paper introduces new topology of cascaded multilevel inverter, with considerable reduction in the number of switches and DC voltage sources. The proposed topology is based on asymmetrical multilevel inverter which produces 21 levels of output with the use of 11 unidirectional switches, 3 diodes and 4 DC voltage sources. The advantages of this topology are reduction in the number of switches (2 nos.) and gate driver circuits (2 nos.), reduction in the number of DC sources (2 nos.) also cost, complexity, and space required for hardware is reduced without sacrificing the quality output of the inverter. To reduce the THD further Level shifting SPWM techniques such as PD, POD & APOD are used and comparison is shown on the basis of THDs obtained from the above SPWM techniques. Frequency of carrier waves is 1KHz, and modulation index is 1.0. To validate the proposed topology the circuit is simulated and verified by using MATLAB/Simulink.
As multilevel inverters are gaining increasing importance .New topologies are being proposed in order to achieve large number of levels in output voltage. A simplified MLI topology has been presented with both symmetrical and asymmetrical configurations. This paper represents a comprehensive analysis of above mentioned topology with FFT analysis,switching and conduction losses of the inverter.Hence efficiency at different carrier frequencies has been calculated successfully.Results are verified with simulation studies.Multilevel inverters are currently considered as a better industrial solution for high dynamic performance and power-quality demanding applications, covering a wide power range.
This paper proposes implementation of coupled inductor based 7 level inverter with reduced number switches. The inverter which generates the sinusoidal output voltage by the use of coupled inductor with reduced total harmonic distortion. The voltage stress on each switching devices, capacitor balancing and common mode voltage can be minimized. The proposed system which gives better controlled output current and improved output voltage with diminished THD value. The switching devices of the system are controlled by using hysteresis current control algorithm by comparing the carrier signals with constant pulses with enclosed hysteresis band value. The simulation and experimental results of the proposed system outputs are verified using matlab/Simulink and TMS320F3825 dsp controller respectively.
A three-phase bidirectional isolated dc-dc converter consists of two six-pulse two-level active converters that enable bidirectional power flow by introducing a lag phase-shift angle of one converter with respect to the other converter. This paper explains the operating modes of a three-phase bidirectional isolated dc-dc converter in detail, taking into account the transfer of energy between the dc voltage sources and high-frequency ac inductances in the three-phase bidirectional isolated dc-dc converter. The power flow of the dc-dc converter is also examined based on the operating modes.
This paper presents combinations of level shifted pulse-width modulation algorithm with conventional discontinuous pulse-width modulation methods for cascaded multilevel inverters. In the proposed DPWM a zero sequence signal is injected in sinusoidal reference signal to generate various modulators with easier implementation. The analysis four various control strategies namely Common Carrier (CC), Inverted Carrier (IC), Phase Shifted (PS) and Inverted Phase Shift (IPS) for cascaded multilevel inverter fed induction motor drive has been illustrated. To validate the proposed work experimental tests has been carried out using dSPACE controller. Experimental study proves that using proposed algorithms reduction in common-mode voltage with fewer harmonics along with reduced switching loss for a cascaded multilevel inverter fed motor drive has been achieved.
In the recent years, three-level rectifier becomes an attractive rectifier replaced the two-level rectifiers. This rectifier provides many advantages, such as sinusoidal input current which contains low harmonics, unity power factor, bi-directional power flow, low voltage and switching loss for each switch. This paper presents a modelling and execution of the three-level rectifier for improvement of power quality under different loading based on voltage oriented control. The mathematical model and the control design were presented in this paper for the current inner loop and voltage outer loop, respectively. In order to evaluate the operation of the three-level rectifier under different conditions, the model was simulated by using MATLAB/Simulink. The experiment has been used to confirm the operation of the rectifier and its controller. The simulation and experimental results show that the excellent performance under steady-state and dynamic load variations was achieved; the unity power factor and pure sinusoidal in the grid side has also been accomplished.
Comparative Analysis and Simulation of Diode Clamped & Cascaded H-Bridge Mult...IJERA Editor
Multilevel inverters have become more popular over the years in high power medium voltage applications without the use of a transformer and with promise of less disturbance & reduced harmonic distortion. In this paper, two types of multilevel converter in three phase configuration, cascaded H-Bridge multilevel inverter (CMLI) and diode clamped multilevel inverter (DCMLI) of 5 and 7-level are modelled and compared in the case of feeding of a three phase squirrel cage induction motor. Here, carrier based sinusoidal pulse width modulation (SPWM) technique is used as the modulation strategy. These modulation strategy include phase disposition technique (PD), phase opposition disposition technique (POD), and an alternative phase opposition disposition technique (APOD). A detailed study of the modulation technique has been carried out through MATLAB/SIMULINK for both multilevel converters and a comparative evaluation between DCMLI and CMLI using SPWM technique in terms of THD%.
Use of multilevel inverters have been widely accepted as an effective solution for high power and high voltage applications. The performance of a multilevel inverter is superior to that of traditional inverters due to their advantages such as, reduced THD, less switching stress, lower EMI. Different types of topologies and modulation techniques for multilevel inverters have been discussed in the recent literature. In this paper three phase multilevel inverter based on Diode Clamped Multilevel DC Link (DC-MLDCL) and full bridge inverter has been proposed to reduce switch count and THD using multi reference based modulation techniques. The proposed multi reference modulation techniques are based on sinusoidal and third harmonic reference wave compared with U-type carrier wave. The performance parameters for the proposed DC-MLDCL inverter are analyzed in terms of THD, fundamental output line voltage and output line current for R and RL loads. The results are verified through MATLAB/simulation tool to verify the results of the proposed three phase seven level DC-MLDCL inverter .
This paper proposes an asymmetrical cascaded single phase H-bridge inverter. The proposed inverter consists of two modules with unequal and isolated dc sources. Each module is composed of dc source, conventional four switches H-bridge and single bidirectional switch. To increase the output voltage levels, the tertiary ratio, 1:3, between its two dc sources is adopted. Both the fundamental frequency and the multicarrier pulse width modulation (PWM) control schemes are employed to generate switches signals. By controlling the inverter modulation index, the proposed inverter can generate an output voltage having up to seventeen levels by using only two modules. The proposed topology has also the feature of modularity which means that it can be extended to any levels by adding new modules. The proposed topology is simulated using an inductive load and some selected simulation results have been provided to validate the proposed inverter.
Design and Simulation of Novel 11-level Inverter Scheme with Reduced Switches IJECEIAES
This work recommends the performance of coupled inductor based novel 11-level inverter with reduced number of switches. The inverter which engender the sinusoidal output voltage by the use of split inductor with minimised total harmonic distortion (THD). The voltage stress on each controlled switching devices, capacitor balancing and switching losses can be reduced. The proposed system which gives better controlled output current and improved output voltage with moderate THD value. The switching devices of the system are controlled by using multicarrier sinusoidal pulse width modulation algorithm by comparing the carrier signals with sinusoidal signal. The simulation and experimental results of the proposed 11-level inverter system outputs are established using matlab/Simulink and dsPIC microcontroller respectively.
Modified T-type topology of three-phase multi-level inverter for photovoltaic...IJECEIAES
In this article, a three-phase multilevel neutral-point-clamped inverter with a modified t-type structure of switches is proposed. A pulse width modulation (PWM) scheme of the proposed inverter is also developed. The proposed topology of the multilevel inverter has the advantage of being simple, on the one hand since it does contain only semiconductors in reduced number (corresponding to the number of required voltage levels), and no other components such as switching or flying capacitors, and on the other hand, the control scheme is much simpler and more suitable for variable frequency and voltage control. The performances of this inverter are analyzed through simulations carried out in the MATLAB/Simulink environment on a threephase inverter with 9 levels. In all simulations, the proposed topology is connected with R-load or RL-load without any output filter.
Transformerless Topology for Grid-Conected Inverters With Unipolar PWM ControlIJERA Editor
Most of the PV systems are designed with transformer for safety purpose with galvanic isolation. However, the transformer is big, heavy and expensive. Also, it reduces the overall frequency of the conversion stage. Generally PV inverter with transformer is having good efficiency. To overcome these problems, transformer less PV system is introduced. It is smaller, lighter, cheaper and higher in efficiency. However, dangerous leakage current will flow between PV array and the grid due to the stray capacitance. There are different types of configurations available for transformer less inverters like H5, H6, HERIC, and Dual paralleled buck inverter. But each configuration is suffering from its own disadvantages like high conduction losses, shoot-through issues of switches, dead-time requirements at zero crossing instants of grid voltage to avoid grid shoot-through faults and MOSFET reverse recovery issues. The main objective of the proposed transformer less inverter is to address two key issues: One key issue for a transformer less inverter is that it is necessary to achieve high efficiency compared to other existing inverter topologies. Another key issue is that the inverter configuration should not have any shoot-through issues for higher reliability.
IJRET : International Journal of Research in Engineering and Technology is an international peer reviewed, online journal published by eSAT Publishing House for the enhancement of research in various disciplines of Engineering and Technology. The aim and scope of the journal is to provide an academic medium and an important reference for the advancement and dissemination of research results that support high-level learning, teaching and research in the fields of Engineering and Technology. We bring together Scientists, Academician, Field Engineers, Scholars and Students of related fields of Engineering and Technology.
A new cascaded multilevel inverter with less no of switcheseSAT Journals
Abstract In this paper proposed a new topology for cascaded multi level inverters. This structure consists of series connection of proposed basic unit blocks which are built with both unidirectional and bidirectional switches. The proposed structure has some advantages including: reduction in the number of switches and driver circuits, cost and installation area. Three algorithms for determination of dc voltages sources’ magnitudes have also been proposed. The algorithms can produce all odd and even levels at the output voltage the proposed structure also has fewer dc voltage sources variety and less maximum blocking voltage of switches compared to conventional inverters. The capability of proposed structure This paper propose a new topology for cascaded multilevel in producing all odd and even output voltage levels is proved by simulation result for a 21-level inverter. Keywords: Multilevel inverters, symmetric multilevel, asymmetric multilevel
Similar to A Comparative Studies of Cascaded Multilevel Inverters Having Reduced Number of Switches with R and RL-Load (20)
The aim of this research is the speed tracking of the permanent magnet synchronous motor (PMSM) using an intelligent Neural-Network based adapative backstepping control. First, the model of PMSM in the Park synchronous frame is derived. Then, the PMSM speed regulation is investigated using the classical method utilizing the field oriented control theory. Thereafter, a robust nonlinear controller employing an adaptive backstepping strategy is investigated in order to achieve a good performance tracking objective under motor parameters changing and external load torque application. In the final step, a neural network estimator is integrated with the adaptive controller to estimate the motor parameters values and the load disturbance value for enhancing the effectiveness of the adaptive backstepping controller. The robsutness of the presented control algorithm is demonstrated using simulation tests. The obtained results clearly demonstrate that the presented NN-adaptive control algorithm can provide good trackingperformances for the speed trackingin the presence of motor parameter variation and load application.
This paper presents a fast and accurate fault detection, classification and direction discrimination algorithm of transmission lines using one-dimensional convolutional neural networks (1D-CNNs) that have ingrained adaptive model to avoid the feature extraction difficulties and fault classification into one learning algorithm. A proposed algorithm is directly usable with raw data and this deletes the need of a discrete feature extraction method resulting in more effective protective system. The proposed approach based on the three-phase voltages and currents signals of one end at the relay location in the transmission line system are taken as input to the proposed 1D-CNN algorithm. A 132kV power transmission line is simulated by Matlab simulink to prepare the training and testing data for the proposed 1D- CNN algorithm. The testing accuracy of the proposed algorithm is compared with other two conventional methods which are neural network and fuzzy neural network. The results of test explain that the new proposed detection system is efficient and fast for classifying and direction discrimination of fault in transmission line with high accuracy as compared with other conventional methods under various conditions of faults.
Among the most widespread renewable energy sources is solar energy; Solar panels offer a green, clean, and environmentally friendly source of energy. In the presence of several advantages of the use of photovoltaic systems, the random operation of the photovoltaic generator presents a great challenge, in the presence of a critical load. Among the most used solutions to overcome this problem is the combination of solar panels with generators or with the public grid or both. In this paper, an energy management strategy is proposed with a safety aspect by using artificial neural networks (ANNs), in order to ensure a continuous supply of electricity to consumers with a maximum solicitation of renewable energy.
In this paper, the artificial neural network (ANN) has been utilized for rotating machinery faults detection and classification. First, experiments were performed to measure the lateral vibration signals of laboratory test rigs for rotor-disk-blade when the blades are defective. A rotor-disk-blade system with 6 regular blades and 5 blades with various defects was constructed. Second, the ANN was applied to classify the different x- and y-axis lateral vibrations due to different blade faults. The results based on training and testing with different data samples of the fault types indicate that the ANN is robust and can effectively identify and distinguish different blade faults caused by lateral vibrations in a rotor. As compared to the literature, the present paper presents a novel work of identifying and classifying various rotating blade faults commonly encountered in rotating machines using ANN. Experimental data of lateral vibrations of the rotor-disk-blade system in both x- and y-directions are used for the training and testing of the network.
This paper focuses on the artificial bee colony (ABC) algorithm, which is a nonlinear optimization problem. is proposed to find the optimal power flow (OPF). To solve this problem, we will apply the ABC algorithm to a power system incorporating wind power. The proposed approach is applied on a standard IEEE-30 system with wind farms located on different buses and with different penetration levels to show the impact of wind farms on the system in order to obtain the optimal settings of control variables of the OPF problem. Based on technical results obtained, the ABC algorithm is shown to achieve a lower cost and losses than the other methods applied, while incorporating wind power into the system, high performance would be gained.
The significance of the solar energy is to intensify the effectiveness of the Solar Panel with the use of a primordial solar tracking system. Here we propounded a solar positioning system with the use of the global positioning system (GPS) , artificial neural network (ANN) and image processing (IP) . The azimuth angle of the sun is evaluated using GPS which provide latitude, date, longitude and time. The image processing used to find sun image through which centroid of sun is calculated and finally by comparing the centroid of sun with GPS quadrate to achieve optimum tracking point. Weather conditions and situation observed through AI decision making with the help of IP algorithms. The presented advance adaptation is analyzed and established via experimental effects which might be made available on the memory of the cloud carrier for systematization. The proposed system improve power gain by 59.21% and 10.32% compare to stable system (SS) and two-axis solar following system (TASF) respectively. The reduced tracking error of IoT based Two-axis solar following system (IoT-TASF) reduces their azimuth angle error by 0.20 degree.
Kosovo has limited renewable energy resources and its power generation sector is based on fossil fuels. Such a situation emphasizes the importance of active research and efficient use of renewable energy potential. According to the analysis of meteorological data for Kosovo, it can be concluded that among the most attractive potential wind power sites are the locations known as Kitka (42° 29' 41" N and 21° 36' 45" E) and Koznica (42° 39′ 32″ N, 21° 22′30″E). The two terrains in which the analysis was carried out are mountain areas, with altitudes of 1142 m (Kitka) and 1230 m (Koznica). the same measuring height, about 84 m above the ground, is obtained for these average wind speeds: Kitka 6,667 m/s and Koznica 6,16 m/s. Since the difference in wind speed is quite large versus a difference in altitude that is not being very large, analyses are made regarding the terrain characteristics including the terrain relief features. In this paper it will be studied how much the roughness of the terrain influences the output energy. Also, that the assumption to be taken the same as to how much they will affect the annual energy produced.
Large-scale grid-tied photovoltaic (PV) station are increasing rapidly. However, this large penetration of PV system creates frequency fluctuation in the grid due to the intermittency of solar irradiance. Therefore, in this paper, a robust droop control mechanism of the battery energy storage system (BESS) is developed in order to damp the frequency fluctuation of the multi-machine grid system due to variable active power injected from the PV panel. The proposed droop control strategy incorporates frequency error signal and dead-band for effective minimization of frequency fluctuation. The BESS system is used to consume/inject an effective amount of active power based upon the frequency oscillation of the grid system. The simulation analysis is carried out using PSCAD/EMTDC software to prove the effectiveness of the proposed droop control-based BESS system. The simulation result implies that the proposed scheme can efficiently curtail the frequency oscillation.
This study investigates experimentally the performance of two-dimensional solar tracking systems with reflector using commercial silicon based photovoltaic module, with open and closed loop control systems. Different reflector materials were also investigated. The experiments were performed at the Hashemite University campus in Zarqa at a latitude of 32⁰, in February and March. Photovoltaic output power and performance were analyzed. It was found that the modified photovoltaic module with mirror reflector generated the highest value of power, while the temperature reached a maximum value of 53 ̊ C. The modified module suggested in this study produced 5% more PV power than the two-dimensional solar tracking systems without reflector and produced 12.5% more PV power than the fixed PV module with 26⁰ tilt angle.
This paper focuses on the modeling and control of a wind energy conversion chain using a permanent magnet synchronous machine. This system behaves a turbine, a generator, DC/DC and DC/AC power converters. These are connected on both sides to the DC bus, where the inverter is followed by a filter which is connected to the grid. In this paper, we have been used two types of controllers. For the stator side converter, we consider the Takagi-Sugeno approach where the parameters of controller have been computed by the theory of linear matrix inequalities. The stability synthesis has been checked using the Lyapunov theory. According to the grid side converter, the proportional integral controller is exploited to keep a constant voltage on the DC bus and control both types of powers. The simulation results demonstrate the robustness of the approach used.
The development of modeling wind speed plays a very important in helping to obtain the actual wind speed data for the benefit of the power plant planning in the future. The wind speed in this paper is obtained from a PCE-FWS 20 type measuring instrument with a duration of 30 minutes which is accumulated into monthly data for one year (2019). Despite the many wind speed modeling that has been done by researchers. Modeling wind speeds proposed in this study were obtained from the modified Rayleigh distribution. In this study, the Rayleigh scale factor (Cr) and modified Rayleigh scale factor (Cm) were calculated. The observed wind speed is compared with the predicted wind characteristics. The data fit test used correlation coefficient (R2), root means square error (RMSE), and mean absolute percentage error (MAPE). The results of the proposed modified Rayleigh model provide very good results for users.
This paper deals with an advanced design for a pump powered by solar energyto supply agricultural lands with water and also the maximum power point is used to extract the maximum value of the energy available inside the solar panels and comparing between techniques MPPT such as Incremental conductance, perturb & observe, fractional short current circuit, and fractional open voltage circuit to find the best technique among these. The solar system is designed with main parts: photovoltaic (PV) panel, direct current/direct current (DC/DC) converter, inverter, filter, and in addition, the battery is used to save energy in the event that there is an increased demand for energy and not to provide solar radiation, as well as saving energy in the case of generation more than demand. This work was done using the matrix laboratory (MATLAB) simulink program.
The objective of this paper is to provide an overview of the current state of renewable energy resources in Bangladesh, as well as to examine various forms of renewable energies in order to gain a comprehensive understanding of how to address Bangladesh's power crisis issues in a sustainable manner. Electricity is currently the most useful kind of energy in Bangladesh. It has a substantial influence on a country's socioeconomic standing and living standards. Maintaining a stable source of energy at a cost that is affordable to everyone has been a constant battle for decades. Bangladesh is blessed with a wealth of natural resources. Bangladesh has a huge opportunity to accelerate its economic development while increasing energy access, livelihoods, and health for millions of people in a sustainable way due to the renewable energy system.
When the irradiance distribution over the photovoltaic panels is uniform, the pursuit of the maximum power point is not reached, which has allowed several researchers to use traditional MPPT techniques to solve this problem Among these techniques a PSO algorithm is used to have the maximum global power point (GMPPT) under partial shading. On the other hand, this one is not reliable vis-à-vis the pursuit of the MPPT. Therefore, in this paper we have treated another technique based on a new modified PSO algorithm so that the power can reach its maximum point. The PSO algorithm is based on the heuristic method which guarantees not only the obtaining of MPPT but also the simplicity of control and less expensive of the system. The results are obtained using MATLAB show that the proposed modified PSO algorithm performs better than conventional PSO and is robust to different partial shading models.
A stable operation of wind turbines connected to the grid is an essential requirement to ensure the reliability and stability of the power system. To achieve such operational objective, installing static synchronous compensator static synchronous compensator (STATCOM) as a main compensation device guarantees the voltage stability enhancement of the wind farm connected to distribution network at different operating scenarios. STATCOM either supplies or absorbs reactive power in order to ensure the voltage profile within the standard-margins and to avoid turbine tripping, accordingly. This paper present new study that investigates the most suitable-location to install STATCOM in a distribution system connected wind farm to maintain the voltage-levels within the stability margins. For a large-scale squirrel cage induction generator squirrel-cage induction generator (SCIG-based) wind turbine system, the impact of STATCOM installation was tested in different places and voltage-levels in the distribution system. The proposed method effectiveness in enhancing the voltage profile and balancing the reactive power is validated, the results were repeated for different scenarios of expected contingencies. The voltage profile, power flow, and reactive power balance of the distribution system are observed using MATLAB/Simulink software.
The electrical and environmental parameters of polymer solar cells (PSC) provide important information on their performance. In the present article we study the influence of temperature on the voltage-current (I-V) characteristic at different temperatures from 10 °C to 90 °C, and important parameters like bandgap energy Eg, and the energy conversion efficiency η. The one-diode electrical model, normally used for semiconductor cells, has been tested and validated for the polemeral junction. The PSC used in our study are formed by the poly(3-hexylthiophene) (P3HT) and [6,6]-phenyl C61-butyric acid methyl ester (PCBM). Our technique is based on the combination of two steps; the first use the Least Mean Squares (LMS) method while the second use the Newton-Raphson algorithm. The found results are compared to other recently published works, they show that the developed approach is very accurate. This precision is proved by the minimal values of statistical errors (RMSE) and the good agreement between both the experimental data and the I-V simulated curves. The obtained results show a clear and a monotonic dependence of the cell efficiency on the studied parameters.
The inverter is the principal part of the photovoltaic (PV) systems that assures the direct current/alternating current (DC/AC) conversion (PV array is connected directly to an inverter that converts the DC energy produced by the PV array into AC energy that is directly connected to the electric utility). In this paper, we present a simple method for detecting faults that occurred during the operation of the inverter. These types of faults or faults affect the efficiency and cost-effectiveness of the photovoltaic system, especially the inverter, which is the main component responsible for the conversion. Hence, we have shown first the faults obtained in the case of the short circuit. Second, the open circuit failure is studied. The results demonstrate the efficacy of the proposed method. Good monitoring and detection of faults in the inverter can increase the system's reliability and decrease the undesirable faults that appeared in the PV system. The system behavior is tested under variable parameters and conditions using MATLAB/Simulink.
The electrical distribution network is undergoing tremendous modifications with the introduction of distributed generation technologies which have led to an increase in fault current levels in the distribution network. Fault current limiters have been developed as a promising technology to limit fault current levels in power systems. Though, quite a number of fault current limiters have been developed; the most common are the superconducting fault current limiters, solid-state fault current limiters, and saturated core fault current limiters. These fault current limiters present potential fault current limiting solutions in power systems. Nevertheless, they encounter various challenges hindering their deployment and commercialization. This research aimed at designing a bridge-type nonsuperconducting fault current limiter with a novel topology for distribution network applications. The proposed bridge-type nonsuperconducting fault current limiter was designed and simulated using PSCAD/EMTDC. Simulation results showed the effectiveness of the proposed design in fault current limiting, voltage sag compensation during fault conditions, and its ability not to affect the load voltage and current during normal conditions as well as in suppressing the source powers during fault conditions. Simulation results also showed very minimal power loss by the fault current limiter during normal conditions.
This paper provides a new approach to reducing high-order harmonics in 400 Hz inverter using a three-level neutral-point clamped (NPC) converter. A voltage control loop using the harmonic compensation combined with NPC clamping diode control technology. The capacitor voltage imbalance also causes harmonics in the output voltage. For 400 Hz inverter, maintain a balanced voltage between the two input (direct current) (DC) capacitors is difficult because the pulse width modulation (PWM) modulation frequency ratio is low compared to the frequency of the output voltage. A method of determining the current flowing into the capacitor to control the voltage on the two balanced capacitors to ensure fast response reversal is also given in this paper. The combination of a high-harmonic resonator controller and a neutral-point voltage controller working together on the 400 Hz NPC inverter structure is given in this paper.
Direct current (DC) electronic load is a useful equipment for testing the electrical system. It can emulate various load at a high rating. The electronic load requires a power converter to operate and a linear regulator is a common option. Nonetheless, it is hard to control due to the temperature variation. This paper proposed a DC electronic load using the boost converter. The proposed electronic load operates in the continuous current mode and control using the integral controller. The electronic load using the boost converter is compared with the electronic load using the linear regulator. The results show that the boost converter able to operate as an electronic load with an error lower than 0.5% and response time lower than 13 ms.
More from International Journal of Power Electronics and Drive Systems (20)
About
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Technical Specifications
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
Key Features
Indigenized remote control interface card suitable for MAFI system CCR equipment. Compatible for IDM8000 CCR. Backplane mounted serial and TCP/Ethernet communication module for CCR remote access. IDM 8000 CCR remote control on serial and TCP protocol.
• Remote control: Parallel or serial interface
• Compatible with MAFI CCR system
• Copatiable with IDM8000 CCR
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
Application
• Remote control: Parallel or serial interface.
• Compatible with MAFI CCR system.
• Compatible with IDM8000 CCR.
• Compatible with Backplane mount serial communication.
• Compatible with commercial and Defence aviation CCR system.
• Remote control system for accessing CCR and allied system over serial or TCP.
• Indigenized local Support/presence in India.
• Easy in configuration using DIP switches.
Student information management system project report ii.pdfKamal Acharya
Our project explains about the student management. This project mainly explains the various actions related to student details. This project shows some ease in adding, editing and deleting the student details. It also provides a less time consuming process for viewing, adding, editing and deleting the marks of the students.
Courier management system project report.pdfKamal Acharya
It is now-a-days very important for the people to send or receive articles like imported furniture, electronic items, gifts, business goods and the like. People depend vastly on different transport systems which mostly use the manual way of receiving and delivering the articles. There is no way to track the articles till they are received and there is no way to let the customer know what happened in transit, once he booked some articles. In such a situation, we need a system which completely computerizes the cargo activities including time to time tracking of the articles sent. This need is fulfilled by Courier Management System software which is online software for the cargo management people that enables them to receive the goods from a source and send them to a required destination and track their status from time to time.
Immunizing Image Classifiers Against Localized Adversary Attacksgerogepatton
This paper addresses the vulnerability of deep learning models, particularly convolutional neural networks
(CNN)s, to adversarial attacks and presents a proactive training technique designed to counter them. We
introduce a novel volumization algorithm, which transforms 2D images into 3D volumetric representations.
When combined with 3D convolution and deep curriculum learning optimization (CLO), itsignificantly improves
the immunity of models against localized universal attacks by up to 40%. We evaluate our proposed approach
using contemporary CNN architectures and the modified Canadian Institute for Advanced Research (CIFAR-10
and CIFAR-100) and ImageNet Large Scale Visual Recognition Challenge (ILSVRC12) datasets, showcasing
accuracy improvements over previous techniques. The results indicate that the combination of the volumetric
input and curriculum learning holds significant promise for mitigating adversarial attacks without necessitating
adversary training.
TECHNICAL TRAINING MANUAL GENERAL FAMILIARIZATION COURSEDuvanRamosGarzon1
AIRCRAFT GENERAL
The Single Aisle is the most advanced family aircraft in service today, with fly-by-wire flight controls.
The A318, A319, A320 and A321 are twin-engine subsonic medium range aircraft.
The family offers a choice of engines
Saudi Arabia stands as a titan in the global energy landscape, renowned for its abundant oil and gas resources. It's the largest exporter of petroleum and holds some of the world's most significant reserves. Let's delve into the top 10 oil and gas projects shaping Saudi Arabia's energy future in 2024.
Final project report on grocery store management system..pdfKamal Acharya
In today’s fast-changing business environment, it’s extremely important to be able to respond to client needs in the most effective and timely manner. If your customers wish to see your business online and have instant access to your products or services.
Online Grocery Store is an e-commerce website, which retails various grocery products. This project allows viewing various products available enables registered users to purchase desired products instantly using Paytm, UPI payment processor (Instant Pay) and also can place order by using Cash on Delivery (Pay Later) option. This project provides an easy access to Administrators and Managers to view orders placed using Pay Later and Instant Pay options.
In order to develop an e-commerce website, a number of Technologies must be studied and understood. These include multi-tiered architecture, server and client-side scripting techniques, implementation technologies, programming language (such as PHP, HTML, CSS, JavaScript) and MySQL relational databases. This is a project with the objective to develop a basic website where a consumer is provided with a shopping cart website and also to know about the technologies used to develop such a website.
This document will discuss each of the underlying technologies to create and implement an e- commerce website.
Forklift Classes Overview by Intella PartsIntella Parts
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2. IJPEDS ISSN: 2088-8694
A Comparative Studies of Cascaded Multilevel Inverters Having Reduced Number .... (Lipika Nanda)
41
2. EXISTING TOPOLOGIES
Conventional cascaded seven level multilevel inverter require twelve switches and 3 dc sources
separately [4]. To overcome the drawbacks of it next topologies are made with seven level nine switches
3 dc sources, seven level seven switches and 3 dc sources etc [7]. The proposed topologies are designed for
seven level, 6 switches with 4 dc and 3 dc sources respectively with bidirectional switches where the
harmonics are reduced.
2.1. Proposed Topology-I
The proposed topology is designed with six switches without H-bridge and four dc sources as shown
in Figure 1. The proposed topology is simple in design compared to the existing topologies. Switches S6
and S7 are used for generating the pulses in positive and negative sequence and switch S1 is connected to the
load. It is used only when all the switches are open to produce zero voltage level. Switch S2, S3, and S4 are
used to generate the levels Vdc, 2Vdc, 3Vdc in both positive and negative levels.
The generalized expression for the number of switches and the number of Dc sources are
S=(N+5)/2 and V=(N+1)/2
Where N=Number of levels, S= No. of switches and V=No. of DC sources.
Both the carrier based PWM techniques i.e IPD PWM and APOD PWM methods are analyzed with
resistive and RL-type load.
Figure 1. Configuration of seven level six switches with 4 DC sources proposed Topology
Table 1. Switching pattern for seven level six switches 4 Dc sources
SL.No S1 S2 S3 S4 S5 S6 D1D4 D2D3 D5D8 D6D7 D9D12
Output
Voltage
1 Off Off Off On On Off Off Off Off Off On Vdc
2 Off Off On Off On Off Off Off On Off Off 2Vdc
3 Off On Off Off On Off On Off Off Off Off 3Vdc
4 On Off Off Off Off Off Off Off Off Off Off 0
5 Off On Off Off Off On Off On Off Off Off -Vdc
6 Off Off On Off Off On Off Off Off On Off -2Vdc
7 Off Off Off On Off On Off Off Off Off Off -3Vdc
2.2. Proposed Topology-II
It is simple in design and compared to other existing topologies. It consists of three DC sources
and six switches.the generalized expression for the number of switches ad number of Dc sources for the
topology is given by
S=(N+5)/2 and V==(N-1)/2.
DC
V
DC
V
DC
V
DC
V
2
S
3
S
4
S
5
S
6
S
1
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
9
D 10
D
11
D 12
D
LOAD
3. ISSN: 2088-8694
IJPEDS Vol. 8, No. 1, March 2017 : 40 – 50
42
Both the carrier based PWM techniques i.e IPD and APOD PWM methods are analyzed with
resistive load type.
Figure 2. Configuration of seven level six switches with 3 DC sources proposed Topology
Table 2. Configuration of 7 level 6 switches and 3Dc sources
SL.No S1 S2 S3 S4 S5 S6 D1D4 D2D3 D5D8 D6D7
Output
Voltage
1 Off On Off Off Off On Off Off On Off Vdc
2 On Off Off Off Off On On Off Off Off 2Vdc
3 Off Off On Off Off On Off Off Off Off 3Vdc
4 Off Off Off Off Off Off Off Off Off Off 0
5 On Off Off On Off Off Off On Off Off -Vdc
6 Off On Off On Off Off Off Off Off On -2Vdc
7 Off Off Off On On Off Off Off Off Off -3Vdc
3. MODES OF OPERATION
3.1. Topology -1
Mode 1 Mode 2
1
S
2
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
LOAD
DC
V
DC
V
DC
V
3
S
6
S
4
S
5
S
DC
V
DC
V
DC
V
DC
V
2
S
3
S
4
S
5
S
6
S
1
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
9
D 10
D
11
D 12
D
LOAD
DC
V
2
S
3
S
4
S
5
S
6
S
1
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
9
D 10
D
11
D 12
D
LOAD
DC
V
DC
V
DC
V
4. IJPEDS ISSN: 2088-8694
A Comparative Studies of Cascaded Multilevel Inverters Having Reduced Number .... (Lipika Nanda)
43
Mode 3 Mode 4
Mode 5 Mode 6
Mode 7
Figure 3. Different modes of operation of 7 levels, 6 switches and 4 DC sources CMLI
DC
V
2
S
3
S
4
S
5
S
6
S
1
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
9
D 10
D
11
D 12
D
LOAD
DC
V
DC
V
DC
V
DC
V
2
S
3
S
4
S
5
S
6
S
1
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
9
D 10
D
11
D 12
D
LOAD
DC
V
DC
V
DC
V
DC
V
2
S
3
S
4
S
5
S
6
S
1
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
9
D 10
D
11
D 12
D
LOAD
DC
V
DC
V
DC
V
DC
V
2
S
3
S
4
S
5
S
6
S
1
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
9
D 10
D
11
D 12
D
LOAD
DC
V
DC
V
DC
V
DC
V
2
S
3
S
4
S
5
S
6
S
1
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
9
D 10
D
11
D 12
D
LOAD
DC
V
DC
V
DC
V
5. ISSN: 2088-8694
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44
3.2. Topology –II
Mode 1 Mode 2
Mode 3 Mode 4
Mode 5 Mode 6
Mode 7
Figure 4. Different modes of operation of 7 levels, 6 switches and 3 Dc sources CMLI
1
S
2
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
LOAD
DC
V
DC
V
DC
V
3
S
6
S
4
S
5
S
1
S
2
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
LOAD
DC
V
DC
V
DC
V
3
S
6
S
4
S
5
S
1
S
2
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
LOAD
DC
V
DC
V
DC
V
3
S
6
S
4
S
5
S
1
S
2
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
LOAD
DC
V
DC
V
DC
V
3
S
6
S
4
S
5
S
1
S
2
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
LOAD
DC
V
DC
V
DC
V
3
S
6
S
4
S
5
S
1
S
2
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
LOAD
DC
V
DC
V
DC
V
3
S
6
S
4
S
5
S
1
S
2
S
1
D 2
D
3
D 4
D
5
D 6
D
7
D 8
D
LOAD
DC
V
DC
V
DC
V
3
S
6
S
4
S
5
S
6. IJPEDS ISSN: 2088-8694
A Comparative Studies of Cascaded Multilevel Inverters Having Reduced Number .... (Lipika Nanda)
45
4. PWM TECHNIQUES
The carrier based modulation techniques for multilevel inverters can be generally classified into two
categories: phase shifted and level shifted modulations. Both modulation schemes can be applied to the
cascaded multilevel inverter [8]-[9]. Total harmonic distortion of phase shifted modulation is much higher
than level shifted modulation. Hence level shifted modulation technique is being chosen. In this paper
SPWM method with different carrier based disposition as PDPWM and APODPWM have been analyzed.
Figure 5. APOD and IPD PWM Switching Schemes
5. SIMULATION RESULTS
5.1. Topology - I
All the switches used in this circuit are MOSFETS. The switches S2, S3, S4 are bidirectional and
remaining switches are unidirectional.the loads are resistive and RL-load. The DC sources are 10V.
Figure 6. Simulation Diagram of Proposed Topology 1
Sine and triangular carriers are compared and 7 levels are generated. Both the Dc and different
levels generated are fed to logic gates to produce gate signals. These gate signals are fed to switches S1 to S7
respectively.
7. ISSN: 2088-8694
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46
Figure 7. Different levels generation
Figure 8. Gate Pulse Generation
Figure 9(a). Output voltage and current with Resistive load (b) with RL -Load
8. IJPEDS ISSN: 2088-8694
A Comparative Studies of Cascaded Multilevel Inverters Having Reduced Number .... (Lipika Nanda)
47
(a) (b)
Figure 10(a). APOD switching scheme (b) IPD switching scheme
5.2. Topology II
All the switches used in this circuit are unidirectional except switches S1 and S2 of circuit
diagram.All the Dc sources are taken as 10 Vdc and Resistance as 80 ohms.
Figure 11. Simulation of 7 levels six switches and 3 Dc sources topology
Figure 12. IPD PWM switching scheme, 7 levels, 6 switches, 3 DC sources
Comments: Vout=30V at R=80ohms and carrier frequency=5KHz
9. ISSN: 2088-8694
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48
Figure 13. THD Analysis
At R=80 ohms, THD=20%, Fundamental output voltage=28.9V
6. COMPARISON OF TWO TOPOLOGIES
6.1. THD Analysis
Table 3. Comparison of two topologies with APOD and IPD switching schemes
7 levels, 6 switches, 4 DC sources Topology
PWM MI THD Fundamental (Simulated) Fundamental (Calculated)
APOD 0.8 23.73 22.46 23.7
0.9 23.15 24.98 25.6
1 19 27.8 28.3
IPD 0.8 23.48 22.53 23.4
0.9 23.11 25.09 25.9
1 19.08 27.94 29.3
7 levels, 6 switches, 3 DC sources Topology
PWM MI THD Fundamental (Simulated) Fundamental (Calculated)
APOD 0.8 24.87 22.69 24.2
0.9 24.72 25.66 26.3
1 20.29 28.9 30
IPD 0.8 24.82 22.82 24.2
0.9 24.6 25.73 26.4
1 19.8 29.01 29.9
Figure 14. THD Vs Modulation Index of 7 level 6 switches and 4 Dc sources, Comment: With increase of
Modulation index THD reduced
Modulation index
THD
D
10. IJPEDS ISSN: 2088-8694
A Comparative Studies of Cascaded Multilevel Inverters Having Reduced Number .... (Lipika Nanda)
49
6.2. Voltage Stress Across Switches
It has been observed that reduced number of switches give more voltage stress compared to
conventional CMLI.
Table 4. Voltage stresses across the switches
Conventional 7 levels 4 DC sources in V 7 levels 3 DC sources in V
10V (Across all switches)
S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6
28.4 20 10 20 40 40 18.2 18.2 30 30 30 30
Figure 15. Carrier frequency Vs Switching loss of 7 level 6 switches 4Dc sources
7. LOSS CALCULATION
Each Mosfet loss has been calculated from simulation result. The voltage and current wave forms
are observed from simulation diagram of each switch and thus power is being calculated. From power pulse
of each switch at different carrier frequencies the switching and conduction losses are calculated. At carrier
frequency 1 KHz, different losses are calculated as shown below.
Table 5. Calculation of Switching, Conduction and Total Circuit loss at different Carrier Frequencies
S1 S2 S3 S4 S5 S6 Total
Swtching loss (in W) 0.035 0.0016 0.0012 0.0023 0.05 0.0489 0.0489
Conduction Loss (in W) 0.0045 0.0042 0.004 0.0042 0.0045 0.0041 0.005
Total Loss (in W) 0.0395 0.0058 0.0052 0.0065 0.0545 0.053 0.0539
Table 6. Loss at different carrier frequencies
Carrier
Frequencies
(in KHz)
Input
Voltage
(in Volt)
Input
Current
(in Amp)
Input Power
(in Watt)
Output
Voltage
(in Volt)
Output
Current
(in Amp)
Output
Power
(in Watt)
Circuit
Total Loss
(in Watt)
1 40 0.354 14.16 28.35 0.351 9.95 4.05
2 40 0.35 14 28.35 0.35 9.92 4.08
5 40 0.351 14.04 28.35 0.3482 9.87 4.13
10 40 0.3458 13.83 28.35 0.354 10.03 3.97
20 40 0.35 14 28.35 0.3475 9.85 4.15
It shows with increase of carrier frequencies switching losses increases.
8. CONCLUSION
Inverter operation of 6 switches and 4 DC sources based topology was carried out and the required
objective of low harmonics and 7 level output at THD is19.08% & Fundamental output at 27.9V at MI=1.
Inverter operation of 6 switches and 3 DC sources based topology was carried out and the required objective
of low harmonics and 7 level output at THD is 19.8% & Fundamental output at 29.01V at MI=1. Switching
Loss, Conduction Loss and total circuit loss at different carrier frequencies are carried out successfully.
Voltage stress of conventional and modified topologies are compared.
11. ISSN: 2088-8694
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50
REFERENCES
[1] R. H. Baker, “High Voltage converter circuit,” U.S. patent number 4, 2013.
[2] M. N. A. Kadir, et al., “Voltage vector control of a hybrid three stage eighteen level inverter by vector
decomposition,” IET Trans.Power electron, vol/issue: 3(4), pp, 601-611, 2010.
[3] J. Rodriguez, et al., “Multilevel voltage source converter topologies for industrial medium voltage drives,” IEEE
Trans.Ind.Electron, vol/issue: 54(6), pp. 2930-2945, 2007.
[4] J. Podriguez, et al., “Multilevel inverters: Sourvey of topology control and applications,” IEEE trans.ind.applicat,
vol/issue: 49(4), pp. 724-738, 2002.
[5] E. Babaei, et al., “A new general topology for cascaded multilevel inverters with reduced number of components
based on developed H-bridge,” IEEE trans.Ind.Electron, vol/issue: 61(8), pp. 3932-3939, 2014.
[6] L. M. Tolbert and T. G. Habetler, “Novel multilevel inverter carrier based PWM method,” IEEE Transaction on
Industrial application, vol/issue: 35(5), pp. 1098-1107, 1999.
[7] G. Carnara, et al., “A new multilevel PWM method: a Theoritical analysis,” IEEE Transactions on Power
Electronics, vol/issue: 7(3), pp. 497-505, 1992.
[8] G. Prakash M., et al., “A new multilevel inverter with reduced number of switches,” International journal of Power
Electronics and Drives system, vol/issue: 5(1), pp. 63-70, 2014.
[9] M. Kavitha, et al., “New Cascaded H-Bridge multilevel Inverter topology with reduced number of switches and
sources,” IOSR-JEEE, vol/issue: 2(6), pp. 26-36, 2012.
BIOGRAPHIES OF AUTHORS
Lipika Nanda is a Ph.D research scholar in school of Electrical Engineering ,KIIT University,
Bhubanswar and has 10years of teaching experiences in the field of Power Electronics and
Drives,Energy Systems etc. At present she is Asst. professor, School of Electrical Engineering,
KIIT University,Bhubaneswar, India.She has published a number of papers in conferences and
journal related to converters ,inverters and application of solar photovoltaics.
Abhijit Dasgupta graduated in Electrical Engg from Regional Engineering College (NIT),
Durgapur in the year 1977, post-graduated from Indian Institute of Technology, Kanpur, in
Power Electronics in 1980. He has 21 years of industrial experience and 13 years of academic
experience. At present he is professor, School of Electrical Engineering, KIIT
University,Bhubaneswar, India. He has authored more than 17 research papers in the areas of
power electronics, Automatic Generation control, and implementation of new optimization
techniques.
Dr.-Ing. Ullash Kumar Rout is currently working in the post of Associate Professor in School of
Electrical Engineering, KIIT University, Bhubaneswar. He received his B. Tech. in Electrical
Engineering from Utkal University, M. Tech. in Power System from IIT Kanpur, and Ph.D. in
Energy System from University of Stuttgart, Germany. Ha has around 11 years research
experience in energy system modelling and 7 years in teaching. His research interest includes
energy system and power system.