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A 30-W 90% Efficiency Dual-Mode Controlled DC–DC
Controller With Power Over Ethernet Interface for Power
Device
ABSTRACT:
A dual-mode controlled dc–dc controller with power over Ethernet (PoE) interface
for power device (PD) is presented that is designed to support drawing power
either from an Ethernet cable or from an external auxiliary supply support (ASS).
PoE interface supports all the functions that comply with the IEEE802.3af/at
standard. Based on band gap reference structure, a detection comparator is
provided to detect input voltage without extra voltage reference. Using a low offset
voltage amplifier, a low loss current-limiting technique is proposed to achieve a
high precision current-limit point. Based on a high-speed comparator and two
timing capacitors, an oscillator (OSC) is implemented for better accuracy, and
provides the maximum duty cycle (Dmax) and external frequency synchronization.
The chip is fabricated in a 0.5-µm 65 V BCD process and occupies a die size (with
pads) of 1.79 × 2.76 mm2. The experimental results are measured for an active
clamp forward converter with a wide range of dc input voltages from 33 to 57 V,
an output voltage of 12 V, and an output power of 30 W. The chip achieves peak
power efficiency of 90% and 90.63% on DC and ASS, respectively. The load
regulation at different input voltages can be measured to be within ±0.11%.
Measurements further show that the peak-to-peak ripple voltage of the chip is 161
mV and the recovery time is less than 1.2 ms for the 2-A load step.
SOFTWARE IMPLEMENTATION:
 Tanner

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A 30-W 90% Efficiency Dual-Mode Controlled DC–DC Controller With Power Over Ethernet Interface for Power Device

  • 1. A 30-W 90% Efficiency Dual-Mode Controlled DC–DC Controller With Power Over Ethernet Interface for Power Device ABSTRACT: A dual-mode controlled dc–dc controller with power over Ethernet (PoE) interface for power device (PD) is presented that is designed to support drawing power either from an Ethernet cable or from an external auxiliary supply support (ASS). PoE interface supports all the functions that comply with the IEEE802.3af/at standard. Based on band gap reference structure, a detection comparator is provided to detect input voltage without extra voltage reference. Using a low offset voltage amplifier, a low loss current-limiting technique is proposed to achieve a high precision current-limit point. Based on a high-speed comparator and two timing capacitors, an oscillator (OSC) is implemented for better accuracy, and provides the maximum duty cycle (Dmax) and external frequency synchronization. The chip is fabricated in a 0.5-µm 65 V BCD process and occupies a die size (with pads) of 1.79 × 2.76 mm2. The experimental results are measured for an active clamp forward converter with a wide range of dc input voltages from 33 to 57 V, an output voltage of 12 V, and an output power of 30 W. The chip achieves peak power efficiency of 90% and 90.63% on DC and ASS, respectively. The load regulation at different input voltages can be measured to be within ±0.11%.
  • 2. Measurements further show that the peak-to-peak ripple voltage of the chip is 161 mV and the recovery time is less than 1.2 ms for the 2-A load step. SOFTWARE IMPLEMENTATION:  Tanner